Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal
Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture
HPCA, 2003.
@inproceedings{HPCA-2003-TaylorLAA,
author = "Michael Bedford Taylor and Walter Lee and Saman P. Amarasinghe and Anant Agarwal",
booktitle = "{Proceedings of the Ninth International Symposium on High-Performance Computer Architecture}",
doi = "10.1109/HPCA.2003.1183551",
isbn = "0-7695-1871-0",
pages = "341--353",
publisher = "{IEEE Computer Society}",
title = "{Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture}",
year = 2003,
}