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Travelled to:
1 × USA
Collaborated with:
D.Lustig Andrew Wright O.Giroux D.Chen W.W.Hwu J.Cong Y.Liang
Talks about:
throughput (1) comprehens (1) synthesi (1) orient (1) memori (1) litmus (1) kernel (1) model (1) fpgas (1) autom (1)

Person: Alexandros Papakonstantinou

DBLP DBLP: Papakonstantinou:Alexandros

Contributed to:

DAC 20132013
ASPLOS 20172017

Wrote 2 papers:

DAC-2013-PapakonstantinouCHCL #kernel #migration
Throughput-oriented kernel porting onto FPGAs (AP, DC, WmWH, JC, YL), p. 10.
ASPLOS-2017-LustigWPG #automation #memory management #synthesis #testing
Automated Synthesis of Comprehensive Memory Model Litmus Test Suites (DL, AW, AP, OG), pp. 661–675.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.