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Travelled to:
1 × Israel
1 × The Netherlands
2 × USA
Collaborated with:
G.Barrett C.Eisner D.Fisman J.Havlicek D.V.Campenhout Y.Lustig F.Casaubieilh M.Benjamin M.Bartley F.Pogodalla F.Rocheteau M.Belhadj J.Eggleton G.Mas C.Berthet
Talks about:
tempor (2) microprocessor (1) methodolog (1) processor (1) chameleon (1) function (1) truncat (1) project (1) definit (1) reason (1)

Person: Anthony McIsaac

DBLP DBLP: McIsaac:Anthony

Contributed to:

CAV 20032003
ICALP 20032003
CAV 19971997
DAC 19961996

Wrote 4 papers:

CAV-2003-EisnerFHLMC #logic #reasoning
Reasoning with Temporal Logic on Truncated Paths (CE, DF, JH, YL, AM, DVC), pp. 27–39.
The Definition of a Temporal Clock Operator (CE, DF, JH, AM, DVC), pp. 857–870.
CAV-1997-BarrettM #design #model checking
Model Checking in a Microprocessor Design Project (GB, AM), pp. 214–225.
DAC-1996-CasaubieilhMBBPRBEMBB #functional #verification
Functional Verification Methodology of Chameleon Processor (FC, AM, MB, MB, FP, FR, MB, JE, GM, GB, CB), pp. 421–426.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.