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Travelled to:
1 × USA
Collaborated with:
L.T.Pillage J.T.Rahmeh
Talks about:
connect (1) compon (1) simul (1) logic (1) level (1) evalu (1) part (1) mix (1)

Person: Dah-Cherng Yuan

DBLP DBLP: Yuan:Dah=Cherng

Contributed to:

DAC 19931993

Wrote 1 papers:

DAC-1993-YuanPR #component #evaluation #logic #simulation
Evaluation of Parts by Mixed-Level DC-Connected Components in Logic Simulation (DCY, LTP, JTR), pp. 367–372.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.