BibSLEIGH — level stem

Used together with:

high (440)
system (380)
model (245)
use (208)
base (192)

Stem level$ (all stems)

1979 papers:

ECSA-2015-AlvaresRS #architecture #component #configuration management: High-Level Language Support for Reconfiguration Control in Component-Based Architectures (FA, ÉR, LS), pp. 3–19.
CASE-2015-AicherRV #abstraction #automation #simulation #towards #verification: Towards finding the appropriate level of abstraction to model and verify automated production systems in discrete event simulation (TA, SR, BVH), pp. 1048–1053.
CASE-2015-ForstnerM #optimisation #safety #using: Using simulation-based optimization to determine production strategies and safety stock levels in semiconductor supply chains (LF, LM), pp. 655–656.
CASE-2015-JiaJCS #locality #named #using: SoundLoc: Accurate room-level indoor localization using acoustic signatures (RJ, MJ, ZC, CJS), pp. 186–193.
CASE-2015-JinDAWBBBL #distributed #framework: A comprehensive framework of factory-to-factory dynamic fleet-level prognostics and operation management for geographically distributed assets (CJ, DD, HDA, KW, MB, BB, PB, JL), pp. 225–230.
CASE-2015-PanciroliTBBF #realtime #simulation: Overcoming real time bond in high level simulation environments (RP, CT, GB, RB, CF), pp. 1644–1648.
DAC-2015-CampbellLMC #debugging #detection #fault #hybrid #synthesis #using #validation: Hybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles (KAC, DL, SM, DC), p. 6.
DAC-2015-CampbellVPC #detection #fault #low cost #synthesis: High-level synthesis of error detecting cores through low-cost modulo-3 shadow datapaths (KAC, PV, DZP, DC), p. 6.
DAC-2015-CiesielskiYBLR #verification: Verification of gate-level arithmetic circuits by function extraction (MJC, CY, WB, DL, AR), p. 6.
DAC-2015-GuoWHWLC #design #latency #named #novel #reduction: FlexLevel: a novel NAND flash storage system design for LDPC latency reduction (JG, WW, JH, DW, HL, YC), p. 6.
DAC-2015-LiLSH #approximate #optimisation #precise #synthesis: Joint precision optimization and high level synthesis for approximate computing (CL, WL, SSS, JH), p. 6.
DAC-2015-TashjianD #identification #on the #using: On using control signals for word-level identification in a gate-level netlist (ET, AD), p. 6.
DAC-2015-TatsuokaWOHZOLT #design #synthesis: Physically aware high level synthesis design flow (MT, RW, TO, TH, QZ, RO, XL, TT), p. 6.
DAC-2015-TziantzioulisGF #correlation #fault #float #integer #named: b-HiVE: a bit-level history-based error model with value correlation for voltage-scaled integer and floating point units (GT, AMG, SMF, NH, SOM, SP), p. 6.
DAC-2015-ZhangHXHC #compilation #framework #named: CMOST: a system-level FPGA compilation framework (PZ, MH, BX, HH, JC), p. 6.
DAC-2015-ZhaoTDZ #pipes and filters #synthesis: Area-efficient pipelining for FPGA-targeted high-level synthesis (RZ, MT, SD, ZZ), p. 6.
DATE-2015-BergmanBKKMNOPR #experience #industrial #verification: Designer-level verification: an industrial experience story (SB, GB, WK, SK, SM, ZN, AO, VP, WR, GS, VV), pp. 410–411.
DATE-2015-CakirM #clustering #correlation #detection #hardware #using: Hardware Trojan detection for gate-level ICs using signal correlation based clustering (BÇ, SM), pp. 471–476.
DATE-2015-ChenYCK #migration #named: PWL: a progressive wear leveling to minimize data migration overheads for nand flash devices (FHC, MCY, YHC, TWK), pp. 1209–1212.
DATE-2015-GarciaMSN #multi #performance: High performance single supply CMOS inverter level up shifter for multi: supply voltages domains (JCG, JAMN, JS, SN), pp. 1273–1276.
DATE-2015-GerumBR #gpu #performance #simulation: Source level performance simulation of GPU cores (CG, OB, WR), pp. 217–222.
DATE-2015-HadjisCSHTA #multi #synthesis: Profiling-driven multi-cycling in FPGA high-level synthesis (SH, AC, RS, YHA, HT, JA), pp. 31–36.
DATE-2015-JoostenS #architecture #automation #communication #design #modelling: Automatic extraction of micro-architectural models of communication fabrics from register transfer level designs (SJCJ, JS), pp. 1413–1418.
DATE-2015-KhanhSKA #dependence #design #synthesis: Exploiting loop-array dependencies to accelerate the design space exploration with high level synthesis (PNK, AKS, AK, KMMA), pp. 157–162.
DATE-2015-KomalanTPFC: System level exploration of a STT-MRAM based level 1 data-cache (MPK, CT, JIGP, FTF, FC), pp. 1311–1316.
DATE-2015-KroeningLMST #bytecode #effectiveness #low level #verification: Effective verification of low-level software with nested interrupts (DK, LL, TM, PS, MT), pp. 229–234.
DATE-2015-LinH #memory management #named: HLC: software-based half-level-cell flash memory (HYL, JWH), pp. 936–941.
DATE-2015-OyaSYT #classification #identification: A score-based classification method for identifying hardware-trojans at gate-level netlists (MO, YS, MY, NT), pp. 465–470.
DATE-2015-PsarrasSND #named #network #performance #scheduling: PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation (AP, IS, CN, GD), pp. 1090–1095.
DATE-2015-WeiDC #architecture #memory management #multi #scalability: A scalable and high-density FPGA architecture with multi-level phase change memory (CW, AD, DC), pp. 1365–1370.
DATE-2015-YinLLWG15a #policy: Cooperatively managing dynamic writeback and insertion policies in a last-level DRAM cache (SY, JL, LL, SW, YG), pp. 187–192.
DocEng-2015-WalgerH #multi: Hiding Information in Multiple Level-line Moirés (TW, RDH), pp. 21–24.
HT-2015-ApaolazaHJ #analysis #behaviour #interactive #low level #web: Longitudinal Analysis of Low-Level Web Interaction through Micro Behaviours (AA, SH, CJ), pp. 337–340.
PODS-2015-CateCST #ontology #using: High-Level Why-Not Explanations using Ontologies (BtC, CC, ES, WCT), pp. 31–43.
SIGMOD-2015-HuYCX #community: Community Level Diffusion Extraction (ZH, JY, BC, EPX), pp. 1555–1569.
FASE-2015-LiuPL #energy #optimisation: Data-Oriented Characterization of Application-Level Energy Optimization (KL, GP, YDL), pp. 316–331.
TACAS-2015-DjoudiB #analysis #low level #named: BINSEC: Binary Code Analysis with Low-Level Regions (AD, SB), pp. 212–217.
SANER-2015-SaiedBAS #api #mining #multi: Mining Multi-level API Usage Patterns (MAS, OB, HA, HAS), pp. 23–32.
PLDI-2015-LongfieldNMT #self #specification: Preventing glitches and short circuits in high-level self-timed chip specifications (SLJ, BN, RM, RT), pp. 270–279.
SAS-2015-AldousM #low level #static analysis: Static Analysis of Non-interference in Expressive Low-Level Languages (PA, MM), pp. 1–17.
STOC-2015-GorbunovVW #standard: Leveled Fully Homomorphic Signatures from Standard Lattices (SG, VV, DW), pp. 469–477.
DLT-2015-AlmeidaBKK #decidability #on the: On Decidability of Intermediate Levels of Concatenation Hierarchies (JA, JB, OK, MK), pp. 58–70.
ICFP-2015-SteuwerFLD #functional #generative #performance #using: Generating performance portable code using rewrite rules: from high-level functional expressions to high-performance OpenCL code (MS, CF, SL, CD), pp. 205–217.
CHI-2015-DittmarH #design: Two-Level Personas for Nested Design Spaces (AD, MH), pp. 3265–3274.
CHI-2015-RaganGT #how #memory management #process #visual notation: Evaluating How Level of Detail of Visual History Affects Process Memory (EDR, JRG, AT), pp. 2711–2720.
CHI-2015-SchmidtKMUKCB #artificial reality #named #simulation: Level-Ups: Motorized Stilts that Simulate Stair Steps in Virtual Reality (DS, RK, VM, UU, SK, LPC, PB), pp. 2157–2160.
CHI-2015-Vicencio-Moreira #game studies: Now You Can Compete With Anyone: Balancing Players of Different Skill Levels in a First-Person Shooter Game (RVM, RLM, CG), pp. 2255–2264.
DHM-EH-2015-CheffiRBBS #approach #cost analysis #feedback #optimisation: A Bi-level Optimization Approach to Get an Optimal Combination of Cost Functions for Pilot’s Arm Movement: The Case of Helicopter’s Flying Aid Functions with Haptic Feedback (SC, TR, LB, PB, JCS), pp. 248–257.
DHM-HM-2015-EndoYASSH #difference #process: Effect of Skill Level Difference in the Polishing Process of the Maki-e Making Technique (AE, HY, CA, TS, YS, HH), pp. 24–34.
DUXU-DD-2015-Liang #industrial #metaprogramming #on the #online: On Chinese Online P2P Lender’s Model Building on the Macro, Micro and Industry Level (QL), pp. 315–327.
HCI-IT-2015-DibitontoM #automation #performance: Improving User Performance in a Smart Surveillance Scenario through Different Levels of Automation (MD, CMM), pp. 706–716.
HCI-IT-2015-SakoNK #estimation #random: Violin Fingering Estimation According to the Performer’s Skill Level Based on Conditional Random Field (SS, WN, TK), pp. 485–494.
HIMI-IKC-2015-MakhtarI #analysis #evaluation: An Analysis of Ear Plethysmogram for Evaluation of Driver’s Mental Workload Level (AKM, MI), pp. 213–224.
HIMI-IKD-2015-KalkattawiN #ubiquitous #using: Ubiquitous Healthcare Systems: Improving the Adherence Level within Diabetic Medication Using Cloud-Based Reminder System (MK, TN), pp. 535–546.
CAiSE-2015-OrtegaGTRC #modelling #outsourcing #process: Modelling Service Level Agreements for Business Process Outsourcing Services (AdRO, AMG, ADT, MR, ARC), pp. 485–500.
ICEIS-v1-2015-AbakumovK #performance: Approaches to Enhancing Efficiency of Production Management on Shop Floor Level (EMA, SBK), pp. 559–564.
ICEIS-v2-2015-ThommazoCHGPBF #complexity #dependence #requirements #testing #using: Using the Dependence Level Among Requirements to Priorize the Regression Testing Set and Characterize the Complexity of Requirements Change (ADT, KC, EMH, GG, JP, AB, SF), pp. 231–241.
ICEIS-v3-2015-Syynimaa #architecture #enterprise #modelling: Modelling the Resistance of Enterprise Architecture Adoption — Linking Strategic Level of Enterprise Architecture to Organisational Changes and Change Resistance (NS), pp. 143–153.
ECIR-2015-BouchouchaLN #query #towards: Towards Query Level Resource Weighting for Diversified Query Expansion (AB, XL, JYN), pp. 1–12.
ECIR-2015-HuynhHR #analysis #learning #sentiment #strict: Learning Higher-Level Features with Convolutional Restricted Boltzmann Machines for Sentiment Analysis (TH, YH, SMR), pp. 447–452.
SEKE-2015-LiuH #petri net #pipes and filters #verification: PIPE+Verifier — A Tool for Analyzing High Level Petri Nets (SL, XH), pp. 575–580.
SEKE-2015-MokniHUVZ #architecture #component #evolution #multi: An evolution management model for multi-level component-based software architectures (AM, MH, CU, SV, HYZ), pp. 674–679.
SEKE-2015-PereiraSA #interface #sql #standard: Endowing NoSQL DBMS with SQL Features Through Standard Call Level Interfaces (ÓMP, DS, RLA), pp. 201–207.
ICMT-J-2012-AtkinsonGT15 #model transformation #modelling #multi: Enhancing classic transformation languages to support multi-level modeling (CA, RG, CVT), pp. 645–666.
AMT-2015-DyckGLSG #automation #behaviour #model transformation #towards #verification: Towards the Automatic Verification of Behavior Preservation at the Transformation Level for Operational Model Transformations (JD, HG, LL, SS, SG), pp. 36–45.
ECMFA-2015-RossiniLGN #comparison #modelling #multi: A Comparison of Two-Level and Multi-level Modelling for Cloud-Based Applications (AR, JdL, EG, NN), pp. 18–32.
MoDELS-2015-AtkinsonGK15a #approach #modelling #multi: A unifying approach to connections for multi-level modeling (CA, RG, TK), pp. 216–225.
POPL-2015-Tobisawa #λ-calculus: A Meta λ Calculus with Cross-Level Computation (KT), pp. 383–393.
SAC-2015-ByunC #automation #constraints #operating system #safety #testing #using: Automated system-level safety testing using constraint patterns for automotive operating systems (TB, YC), pp. 1815–1822.
SAC-2015-FerreiraMME #analysis #comparison #kernel #memory management: An experimental comparison analysis of kernel-level memory allocators (TBF, RM, AM, BEC), pp. 2054–2059.
SAC-2015-ShahzadJKKKH #execution #in the cloud #mobile: Application-level task execution issues in mobile cloud computing (AS, HJ, PK, HK, BKK, JH), pp. 2285–2287.
ESEC-FSE-2015-Vost #industrial #integration: Vehicle level continuous integration in the automotive industry (SV), pp. 1026–1029.
ICSE-v2-2015-HallR #education #re-engineering #student: Masters-Level Software Engineering Education and the Enriched Student Context (JGH, LR), pp. 311–314.
SPLC-2015-SteffenLM #constraints #product line #synthesis: User-level synthesis: treating product lines as systems of constraints (BS, ALL, TMS), pp. 427–431.
ASPLOS-2015-XuLWZ #automation #power management #runtime: Automated OS-level Device Runtime Power Management (CX, FXL, YW, LZ), pp. 239–252.
LCTES-2015-LiuY #encryption #framework #in memory #memory management: Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory (CL, CY), p. 10.
PPoPP-2015-ChabbiFM #multi #performance: High performance locks for multi-level NUMA systems (MC, MWF, JMMC), pp. 215–226.
SOSP-2015-YangHAKKAKAA #scheduling: Split-level I/O scheduling (SY, TH, NA, SSK, AK, SAK, RTK, ACAD, RHAD), pp. 474–489.
CAV-2015-ChakrabortyKSGH #evaluation: Word-Level Symbolic Trajectory Evaluation (SC, ZK, CJHS, RG, TH, DC, RM), pp. 128–143.
CSL-2015-LehtinenQ: Deciding the First Levels of the Modal μ Alternation Hierarchy by Formula Construction (KL, SQ), pp. 457–471.
SAT-2015-TuHJ #learning #named #reasoning #satisfiability: QELL: QBF Reasoning with Extended Clause Learning and Levelized SAT Solving (KHT, TCH, JHRJ), pp. 343–359.
CBSE-2014-SpacekDT #architecture #component #implementation #modelling #programming #prototype: A component-based meta-level architecture and prototypical implementation of a reflective component-based programming and modeling language (PS, CD, CT), pp. 13–22.
QoSA-2014-BrunnertWK #architecture #enterprise #modelling #performance #using: Using architecture-level performance models as resource profiles for enterprise applications (AB, KW, HK), pp. 53–62.
WICSA-2014-JavedZ #architecture #comprehension #traceability: The Supportive Effect of Traceability Links in Architecture-Level Software Understanding: Two Controlled Experiments (MAJ, UZ), pp. 215–224.
ASE-2014-PirzadehS #testing #user interface: Resilient user interface level tests (HP, SS), pp. 683–688.
CASE-2014-ZhangHSL #coordination: Inventory hedging and coordination under inventory-level-dependent demand (TZ, GQH, YS, SL), pp. 658–664.
DAC-2014-AdirGGS #generative #network #testing #using: Using a High-Level Test Generation Expert System for Testing In-Car Networks (AA, AG, LG, TS), p. 6.
DAC-2014-ChangCCKLL #on the: On Trading Wear-leveling with Heal-leveling (YMC, YHC, JJC, TWK, HPL, HTL), p. 6.
DAC-2014-CuiMSW #detection #hardware #runtime #synthesis: High-Level Synthesis for Run-Time Hardware Trojan Detection and Recovery (XC, KM, LS, KW), p. 6.
DAC-2014-DaiTHZ #pipes and filters #synthesis: Flushing-Enabled Loop Pipelining for High-Level Synthesis (SD, MT, KH, ZZ), p. 6.
DAC-2014-DengBZW #performance: An Efficient Two-level DC Operating Points Finder for Transistor Circuits (JD, KB, YZ, NW), p. 6.
DAC-2014-FattahPLPT #manycore #named #runtime: SHiFA: System-Level Hierarchy in Run-Time Fault-Aware Management of Many-Core Systems (MF, MP, PL, JP, HT), p. 6.
DAC-2014-GuglielmoPC #composition #design #synthesis: A Design Methodology for Compositional High-Level Synthesis of Communication-Centric SoCs (GDG, CP, LPC), p. 6.
DAC-2014-HenkelBZRS #architecture #dependence #multi: Multi-Layer Dependability: From Microarchitecture to Application Level (JH, LB, HZ, SR, MS), p. 6.
DAC-2014-HuWTT #hardware #monitoring #network #security: System-Level Security for Network Processors with Hardware Monitors (KH, TW, TT, RT), p. 6.
DAC-2014-KleebergerMS #analysis: Workload- and Instruction-Aware Timing Analysis: The missing Link between Technology and System-level Resilience (VK, PRM, US), p. 6.
DAC-2014-NandakumarM #analysis: System-Level Floorplan-Aware Analysis of Integrated CPU-GPUs (VSN, MMS), p. 6.
DAC-2014-PanthSDL #3d #performance: Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations (SP, KS, YD, SKL), p. 6.
DAC-2014-PrussKE #abstraction #equivalence #scalability #using #verification: Equivalence Verification of Large Galois Field Arithmetic Circuits using Word-Level Abstraction via Gröbner Bases (TP, PK, FE), p. 6.
DAC-2014-SamavatianAAS #architecture #performance: An Efficient STT-RAM Last Level Cache Architecture for GPUs (MHS, HA, MA, HSA), p. 6.
DAC-2014-SullivanBZZJ #functional #hardware #identification #named: FIGHT-Metric: Functional Identification of Gate-Level Hardware Trustworthiness (DS, JB, GZ, SZ, YJ), p. 4.
DAC-2014-TsaiCYYHCCC #energy #using: Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination (HJT, CCC, KHY, TCY, LYH, CHC, MFC, TFC), p. 6.
DAC-2014-ZhaoJZX #process: SLC-enabled Wear Leveling for MLC PCM Considering Process Variation (MZ, LJ, YZ, CJX), p. 6.
DATE-2014-AhmadC #performance #predict #simulation: Fast STA prediction-based gate-level timing simulation (TBA, MJC), pp. 1–6.
DATE-2014-BiewerGH #novel #smt: A novel model for system-level decision making with combined ASP and SMT solving (AB, JG, CH), pp. 1–4.
DATE-2014-CannellaBS #approach #realtime #scheduling #streaming #using: System-level scheduling of real-time streaming applications using a semi-partitioned approach (EC, MB, TS), pp. 1–6.
DATE-2014-DamodaranWH #distributed #multi: Distributed cooperative shared last-level caching in tiled multiprocessor system on chip (PPD, SW, AH), pp. 1–4.
DATE-2014-EckerVZG #approach #metamodelling #synthesis: The metamodeling approach to system level synthesis (WE, MV, LZ, AG), pp. 1–2.
DATE-2014-GuarnieriPSVBFMP #embedded #monitoring #verification: A cross-level verification methodology for digital IPs augmented with embedded timing monitors (VG, MP, AS, SV, NB, FF, EM, MP), pp. 1–6.
DATE-2014-HenselK #energy: The energy benefit of level-crossing sampling including the actuator’s energy consumption (BH, KK), pp. 1–4.
DATE-2014-KimH #automation #generative #parallel: Automatic generation of custom SIMD instructions for Superword Level Parallelism (TK, YH), pp. 1–6.
DATE-2014-LiHCXJX #embedded #memory management #stack: A wear-leveling-aware dynamic stack for PCM memory in embedded systems (QL, YH, YC, CJX, NJ, CX), pp. 1–4.
DATE-2014-MeeusS #automation #reuse #synthesis: Automating data reuse in High-Level Synthesis (WM, DS), pp. 1–4.
DATE-2014-MullerM #scheduling: The schedulability region of two-level mixed-criticality systems based on EDF-VD (DM, AM), pp. 1–6.
DATE-2014-TangZS #design #development #performance: System-level design methodology enabling fast development of baseband MP-SoC for 4G small cell base station (ST, ZZ, YS), pp. 1–6.
VLDB-2014-KlonatosKRC #performance #query: Building Efficient Query Engines in a High-Level Language (YK, CK, TR, HC), pp. 853–864.
VLDB-2014-KlonatosKRC14a #performance #query: Errata for “Building Efficient Query Engines in a High-Level Language” (PVLDB 7(10): 853-864) (YK, CK, TR, HC), p. 1784.
ITiCSE-2014-WangCMSW #data access #education #multi #named #security #using #visualisation: MLSvisual: a visualization tool for teaching access control using multi-level security (MW, SC, JM, CKS, CW), pp. 93–98.
SCAM-2014-YadegariD #analysis: Bit-Level Taint Analysis (BY, SD), pp. 255–264.
LATA-2014-KonitzerS #automaton #bound #process: DFA with a Bounded Activity Level (MK, HUS), pp. 478–489.
IFL-2014-Christiansen #low level #syntax: Type-Directed Elaboration of Quasiquotations: A High-Level Syntax for Low-Level Reflection (DRC), p. 1.
DUXU-DP-2014-BarrosSF14a #analysis #artificial reality #evaluation #using: Ergonomic Evaluation of Manual Force Levels of the Elderly in the Handling of Products: An Analysis Using Virtual Reality (RQB, MMS, MGF), pp. 124–132.
HCI-AIMT-2014-KashimaMY #programming: Proposal of a Method to Measure Difficulty Level of Programming Code with Eye-Tracking (TK, SM, SY), pp. 264–272.
HCI-AS-2014-JanssonSBAT #automation #design: Authority and Level of Automation — Lessons to Be Learned in Design of In-vehicle Assistance Systems (AJ, PS, IB, AA, ST), pp. 413–424.
HIMI-AS-2014-NarumiOKTH #abstraction #comprehension: Switching the Level of Abstraction in Digital Exhibitions to Provide an Understanding of Mechanisms (TN, HO, RK, TT, MH), pp. 567–576.
LCT-NLE-2014-TaraghiSES #classification #learning #markov #multi: Markov Chain and Classification of Difficulty Levels Enhances the Learning Path in One Digit Multiplication (BT, AS, ME, MS), pp. 322–333.
AdaEurope-2014-QamhiehM #analysis #graph #multi #scheduling: Schedulability Analysis for Directed Acyclic Graphs on Multiprocessor Systems at a Subtask Level (MQ, SM), pp. 119–133.
CAiSE-2014-FolinoGP #low level #mining #modelling #multi #predict #process: Mining Predictive Process Models out of Low-level Multidimensional Logs (FF, MG, LP), pp. 533–547.
ICEIS-v1-2014-0001DFL #classification #constraints #documentation #process: Service Level Agreement Constraints into Processes for Document Classification (MB, MD, FF, AL), pp. 545–550.
ICEIS-v2-2014-MarcolinoOG #approach #diagrams #effectiveness #sequence chart #towards #variability: Towards the Effectiveness of the SMarty Approach for Variability Management at Sequence Diagram Level (AM, EAOJ, IMdSG), pp. 249–256.
ICEIS-v3-2014-BarrosFSA #approach #towards: Deriving Service Level Agreements from Business Level Agreements — An Approach Towards Strategic Alignment in Organizations (VAB, MF, GMBS, JPdA), pp. 214–225.
ICEIS-v3-2014-Guerreiro #framework #multi #towards #transaction: Towards Multi-level Organizational Control Framework to Manage the Business Transaction Workarounds (SG), pp. 288–294.
CIKM-2014-CanutoSGRRGRM #classification #effectiveness #on the #performance: On Efficient Meta-Level Features for Effective Text Classification (SDC, TS, MAG, LCdR, GSR, LG, TCR, WSM), pp. 1709–1718.
ECIR-2014-HuangDHL #approach: A Two-level Approach for Subtitle Alignment (JH, HD, XH, YL), pp. 468–473.
ICML-c1-2014-NguyenPNVB #clustering #multi #parametricity: Bayesian Nonparametric Multilevel Clustering with Group-Level Contexts (TVN, DQP, XN, SV, HB), pp. 288–296.
ICML-c2-2014-SantosZ #learning: Learning Character-level Representations for Part-of-Speech Tagging (CNdS, BZ), pp. 1818–1826.
ICPR-2014-AfridiLM #automation #rating: An Automated System for Plant-Level Disease Rating in Real Fields (MJA, XL, JMM), pp. 148–153.
ICPR-2014-Al-HalahRS #learning #metric #semantics #similarity #what: What to Transfer? High-Level Semantics in Transfer Metric Learning for Action Similarity (ZAH, LR, RS), pp. 2775–2780.
ICPR-2014-CorringR #probability #representation #set: Shape from Phase: An Integrated Level Set and Probability Density Shape Representation (JC, AR), pp. 46–51.
ICPR-2014-FrazES #recognition: Mid-level-Representation Based Lexicon for Vehicle Make and Model Recognition (MF, EAE, MSS), pp. 393–398.
ICPR-2014-GaoWXSZ #recognition #representation: Stroke Bank: A High-Level Representation for Scene Character Recognition (SG, CW, BX, CS, ZZ), pp. 2909–2913.
ICPR-2014-HooKPC #comprehension #image #learning #random: Enhanced Random Forest with Image/Patch-Level Learning for Image Understanding (WLH, TKK, YP, CSC), pp. 3434–3439.
ICPR-2014-HuiZ #image #recognition #representation: A Bio-Inspired Early-Level Image Representation and Its Contribution to Object Recognition (WH, QZ), pp. 4263–4268.
ICPR-2014-JiangMVP #recognition: Decision Level Fusion of Domain Specific Regions for Facial Action Recognition (BJ, BM, MFV, MP), pp. 1776–1781.
ICPR-2014-MoriKNK #detection #using #video: Video Content Detection with Single Frame Level Accuracy Using Dynamic Thresholding Technique (MM, TK, HN, KK), pp. 2560–2565.
ICPR-2014-RaghavendraRYB #assessment #automation #empirical #matrix #quality #using #video: Automatic Face Quality Assessment from Video Using Gray Level Co-occurrence Matrix: An Empirical Study on Automatic Border Control System (RR, KBR, BY, CB), pp. 438–443.
ICPR-2014-SicreJ #classification #image: Discovering and Aligning Discriminative Mid-level Features for Image Classification (RS, FJ), pp. 1975–1980.
ICPR-2014-SicreTG #difference #image: SuperPixel Based Angular Differences as a Mid-level Image Descriptor (RS, HET, TG), pp. 3732–3737.
ICPR-2014-SongSLZZC #detection #image: Corner Detection in Images Under Different Noise Levels (YS, YS, SL, CZ, JZ, HC), pp. 906–911.
ICPR-2014-TianLST #multi #segmentation: Scene Text Segmentation with Multi-level Maximally Stable Extremal Regions (ST, SL, BS, CLT), pp. 2703–2708.
KEOD-2014-TakahashiTTL #automation #industrial #standard #web: An Automatic Coding System with a Three-Grade Confidence Level Corresponding to the National/International Occupation and Industry Standard — Open to the Public on the Web (KT, HT, ST, WL), pp. 369–375.
KR-2014-Delgrande #analysis #towards: Towards a Knowledge Level Analysis of Forgetting (JPD).
SEKE-2014-SalmanSD14a #concept analysis #impact analysis #using: Feature-Level Change Impact Analysis Using Formal Concept Analysis (HES, AS, CD), pp. 447–452.
SEKE-2014-XuL14a #ontology #reasoning #semantics #using: Two-Level Smart Search Engine Using Ontology-Based Semantic Reasoning (HX, AL), pp. 648–652.
SIGIR-2014-KimHWZ #predict: Comparing client and server dwell time estimates for click-level satisfaction prediction (YK, AHA, RWW, IZ), pp. 895–898.
SIGIR-2014-LuLMWXW #interactive #microblog #recommendation #topic: Computing and applying topic-level user interactions in microblog recommendation (XL, PL, HM, SW, AX, BW), pp. 843–846.
SIGIR-2014-WangSCHHW #modelling #predict: Modeling action-level satisfaction for search task satisfaction prediction (HW, YS, MWC, XH, AHA, RWW), pp. 123–132.
SIGIR-2014-ZhangKQH #detection #semantics #word: Continuous word embeddings for detecting local text reuses at the semantic level (QZ, JK, JQ, XH), pp. 797–806.
SIGIR-2014-ZhangL0ZLM #analysis #modelling #recommendation #sentiment: Explicit factor models for explainable recommendation based on phrase-level sentiment analysis (YZ, GL, MZ, YZ, YL, SM), pp. 83–92.
SIGIR-2014-ZhangZ0LM #bibliography #classification #sentiment: Do users rate or review?: boost phrase-level sentiment labeling with review-level sentiment classification (YZ, HZ, MZ, YL, SM), pp. 1027–1030.
ECMFA-2014-AtkinsonG: Level-Agnostic Designation of Model Elements (CA, RG), pp. 18–34.
ECOOP-2014-OkurED #abstraction #low level #parallel: Converting Parallel Code from Low-Level Abstractions to Higher-Level Abstractions (SO, CE, DD), pp. 515–540.
LOPSTR-2014-PreiningOF #case study #liveness #specification: Liveness Properties in CafeOBJ — A Case Study for Meta-Level Specifications (NP, KO, KF), pp. 182–198.
PPDP-2014-Schopp #low level #source code #using: Organising Low-Level Programs using Higher Types (US), pp. 199–210.
RE-2014-BruunHIJK #distributed #mobile #requirements: Handling design-level requirements across distributed teams: Developing a new feature for 12 Danish mobile banking apps (LB, MBH, JBI, JBJ, BK), pp. 335–343.
SAC-2014-LoCCSL #algorithm #locality: ICAP, a new flash wear-leveling algorithm inspired by locality (SWL, BHC, YWC, TCS, YCL), pp. 1478–1483.
SAC-2014-PatrignaniC #low level #semantics: Fully abstract trace semantics for low-level isolation mechanisms (MP, DC), pp. 1562–1569.
SAC-2014-SwamyIG #2d #image: Two level reversible data hiding in 2D images (NRS, SI, PG), pp. 58–59.
SAC-2014-WangW #network: Wavelength resources based lightpath-level active rerouting in all-optical WDM networks (SWW, CYW), pp. 495–500.
SPLC-2014-Reinhartz-Berger #automation #domain model #modelling: Can domain modeling be automated?: levels of automation in domain modeling (IRB), p. 359.
SPLC-2014-SierszeckiSHSB #variability: Extending variability management to the next level (KS, MS, HHH, JS, DB), pp. 320–329.
ASPLOS-2014-0001KOTRKSHC #named #policy #security: Sapper: a language for hardware-level security policy enforcement (XL, VK, JKO, MT, VRR, RK, TS, BH, FTC), pp. 97–112.
ASPLOS-2014-EyermanE #concurrent #flexibility #manycore #parallel #smt #thread #towards: The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism (SE, LE), pp. 591–606.
ASPLOS-2014-WoodCG #detection #low level: Low-level detection of language-level data races with LARD (BPW, LC, DG), pp. 671–686.
CGO-2014-WangWP #optimisation #reduction #virtual machine: Optimizing R VM: Allocation Removal and Path Length Reduction via Interpreter-level Specialization (HW, PW, DAP), p. 295.
HPCA-2014-BalasubramanianS #comprehension #execution #physics #reliability: Understanding the impact of gate-level physical reliability effects on whole program execution (RB, KS), pp. 60–71.
HPCA-2014-KurianDK #replication: Locality-aware data replication in the Last-Level Cache (GK, SD, OK), pp. 1–12.
HPCA-2014-XiangYZ: Warp-level divergence in GPUs: Characterization, impact, and mitigation (PX, YY, HZ), pp. 284–295.
HPDC-2014-GerofiSHTI #memory management #named #novel #policy: CMCP: a novel page replacement policy for system level hierarchical memory management on many-cores (BG, AS, AH, MT, YI), pp. 73–84.
LCTES-2014-KimBL #concurrent #garbage collection #javascript #lightweight: Lightweight and block-level concurrent sweeping for javascript garbage collection (HK, SB, JL), pp. 155–164.
PPoPP-2014-YangZ #concurrent #named #parallel #thread: CUDA-NP: realizing nested thread-level parallelism in GPGPU applications (YY, HZ), pp. 93–106.
ICST-2014-LacknerTWW #design #modelling #product line: Model-Based Test Design of Product Lines: Raising Test Design to the Product Line Level (HL, MT, FW, SW), pp. 51–60.
ICST-2014-WojciakT #case study #combinator #concurrent #maintenance #testing: System Level Combinatorial Testing in Practice — The Concurrent Maintenance Case Study (PW, RTB), pp. 103–112.
CBSE-2013-LednickiCS #analysis #execution #worst-case: Model level worst-case execution time analysis for IEC 61499 (LL, JC, KS), pp. 169–178.
ECSA-2013-PramsohlerSB #adaptation #architecture #component #middleware #towards: Towards an Optimized Software Architecture for Component Adaptation at Middleware Level (TP, SS, UB), pp. 266–281.
ASE-2013-AroraZRYJ #lightweight #named: iProbe: A lightweight user-level dynamic instrumentation tool (NA, HZ, JR, KY, GJ), pp. 742–745.
ASE-2013-ScannielloGMM #clustering #fault #predict #using: Class level fault prediction using software clustering (GS, CG, AM, TM), pp. 640–645.
CASE-2013-SinhaK #constraints #policy: Production and subcontracting policies for assemble-to-order systems with service level constraints (AKS, AK), pp. 570–575.
DAC-2013-0001WAWG #approach #empirical #estimation #towards: Towards variation-aware system-level power estimation of DRAMs: an empirical approach (KC, CW, BA, NW, KG), p. 8.
DAC-2013-AlleMD #analysis #dependence #pipes and filters #runtime #synthesis: Runtime dependency analysis for loop pipelining in high-level synthesis (MA, AM, SD), p. 10.
DAC-2013-BombieriLFC #c++ #synthesis: A method to abstract RTL IP blocks into C++ code and enable high-level synthesis (NB, HYL, FF, LPC), p. 9.
DAC-2013-KauerNSLCH #architecture #composition #concurrent: Modular system-level architecture for concurrent cell balancing (MK, SN, SS, ML, SC, LH), p. 10.
DAC-2013-LeeLL #3d: Power benefit study for ultra-high density transistor-level monolithic 3D ICs (YJL, DBL, SKL), p. 10.
DAC-2013-LiuC #on the #synthesis: On learning-based methods for design-space exploration with high-level synthesis (HYL, LPC), p. 7.
DAC-2013-MinJP #energy #named #optimisation #reduction: XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs (SMM, HJ, SP), p. 10.
DAC-2013-NacciRBSBA #algorithm #implementation #synthesis: A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices (AAN, VR, FB, DS, IB, DA), p. 6.
DAC-2013-ShafiqueRAH #fault #optimisation #reliability: Exploiting program-level masking and error propagation for constrained reliability optimization (MS, SR, PVA, JH), p. 9.
DAC-2013-WagstaffGFT #architecture #partial evaluation #set: Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description (HW, MG, BF, NPT), p. 6.
DAC-2013-WangLZZC #array #clustering #memory management #multi #synthesis: Memory partitioning for multidimensional arrays in high-level synthesis (YW, PL, PZ, CZ, JC), p. 8.
DAC-2013-WangW #named: SAW: system-assisted wear leveling on the write endurance of NAND flash devices (CW, WFW), p. 9.
DAC-2013-XuNMJX #comprehension #design #memory management #multi #trade-off: Understanding the trade-offs in multi-level cell ReRAM memory design (CX, DN, NM, NPJ, YX), p. 6.
DAC-2013-YangCTH #performance: New ERA: new efficient reliability-aware wear leveling for endurance enhancement of flash storage devices (MCY, YHC, CWT, PCH), p. 6.
DATE-2013-0001WAWG #3d #energy #modelling: System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs (KC, CW, BA, NW, KG), pp. 236–241.
DATE-2013-AliasDP #kernel #optimisation #synthesis: Optimizing remote accesses for offloaded kernels: application to high-level synthesis for FPGA (CA, AD, AP), pp. 575–580.
DATE-2013-BarrioHMMM #multi #synthesis: Multispeculative additive trees in high-level synthesis (AADB, RH, SOM, JMM, MCM), pp. 188–193.
DATE-2013-BouhadibaMM #energy #modelling #validation: System-level modeling of energy in TLM for early validation of power and thermal management (TB, MM, FM), pp. 1609–1614.
DATE-2013-CanisAB #multi #reduction #synthesis: Multi-pumping for resource reduction in FPGA high-level synthesis (AC, JHA, SDB), pp. 194–197.
DATE-2013-CastellanaF #analysis #independence #liveness #scheduling #synthesis: Scheduling independent liveness analysis for register binding in high level synthesis (VGC, FF), pp. 1571–1574.
DATE-2013-ChenLSCCAN #embedded #modelling #synthesis: High-level modeling and synthesis for embedded FPGAs (XC, SL, JS, TC, AC, GA, TGN), pp. 1565–1570.
DATE-2013-ChenM #analysis #modelling #reliability: System-level modeling and microprocessor reliability analysis for backend wearout mechanisms (CCC, LM), pp. 1615–1620.
DATE-2013-ChenRSIFC #analysis #process: A SPICE-compatible model of graphene nano-ribbon field-effect transistors enabling circuit-level delay and power analysis under process variation (YYC, AR, AS, GI, GF, DC), pp. 1789–1794.
DATE-2013-ChenZ #design #optimisation: Resource-constrained high-level datapath optimization in ASIP design (YC, HZ), pp. 198–201.
DATE-2013-CilardoGMM #design #performance #scalability: Efficient and scalable OpenMP-based system-level design (AC, LG, AM, NM), pp. 988–991.
DATE-2013-DeutschC #multi #using: Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels (SD, KC), pp. 1065–1070.
DATE-2013-FettweisHLF: Wireless interconnect for board and chip level (GF, NuH, LL, EF), pp. 958–963.
DATE-2013-Gomez-PradoCT #latency #optimisation #using: FPGA latency optimization using system-level transformations and DFG restructuring (DGP, MJC, RT), pp. 1553–1558.
DATE-2013-HuangKCM #correlation #modelling #testing: Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests (KH, NK, JMCJ, YM), pp. 553–558.
DATE-2013-HuZXTS #embedded #hybrid #in memory #memory management: Software enabled wear-leveling for hybrid PCM main memory on embedded systems (JH, QZ, CJX, WCT, EHMS), pp. 599–602.
DATE-2013-ImagawaTOS #analysis #architecture #configuration management #effectiveness: A cost-effective selective TMR for heterogeneous coarse-grained reconfigurable architectures based on DFG-level vulnerability analysis (TI, HT, HO, TS), pp. 701–706.
DATE-2013-JainTG #automation: Automated determination of top level control signals (RKJ, PT, SG), pp. 509–512.
DATE-2013-JoshiLBBG #estimation #performance #statistics: A gate level methodology for efficient statistical leakage estimation in complex 32nm circuits (SJ, AL, MB, EB, SG), pp. 1056–1057.
DATE-2013-KondratyevLMW #evaluation #synthesis: Share with care: a quantitative evaluation of sharing approaches in high-level synthesis (AK, LL, MM, YW), pp. 1547–1552.
DATE-2013-LiZCZ #analysis #multi #simulation: Multi-level phase analysis for sampling simulation (JL, WZ, HC, BZ), pp. 649–654.
DATE-2013-MishchenkoEBBMN #abstraction #named #revisited: GLA: gate-level abstraction revisited (AM, NE, RKB, JB, HM, PKN), pp. 1399–1404.
DATE-2013-SchryverTW #monte carlo #multi: A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model (CdS, PT, NW), pp. 248–253.
DATE-2013-WangDX #named #policy: OAP: an obstruction-aware cache management policy for STT-RAM last-level caches (JW, XD, YX), pp. 847–852.
DATE-2013-WangH #embedded #modelling #performance #simulation: Fast and accurate cache modeling in source-level simulation of embedded software (ZW, JH), pp. 587–592.
DATE-2013-YuZHWLT #approach #manycore #set #simulation: A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations (FWY, BHZ, YHH, HIW, CRL, RST), pp. 643–648.
DATE-2013-ZhaoOX #process #synthesis: Profit maximization through process variation aware high level synthesis with speed binning (MZ, AO, CJX), pp. 176–181.
SIGMOD-2013-WhangYYSKK #approach #named #parallel #using: ODYS: an approach to building a massively-parallel search engine using a DB-IR tightly-integrated parallel DBMS for higher-level functionality (KYW, TSY, YMY, IYS, HYK, IJK), pp. 313–324.
CSEET-2013-KroppM #agile #development #education: Teaching agile software development at university level: Values, management, and craftsmanship (MK, AM), pp. 179–188.
ITiCSE-2013-EllisHD #using: Developing HFOSS projects using integrated teams across levels and institutions (HJCE, GWH, JD), p. 349.
TACAS-2013-DudkaMPV #contest #low level #named #verification: Predator: A Tool for Verification of Low-Level List Manipulation — (Competition Contribution) (KD, PM, PP, TV), pp. 627–629.
ICSM-2013-QianPXJZ #logic #mining #programming: Mining Logical Clones in Software: Revealing High-Level Business and Programming Rules (WQ, XP, ZX, SJ, WZ), pp. 40–49.
WCRE-2013-HallerSB #c #c++ #data type #detection #named: MemPick: High-level data structure detection in C/C++ binaries (IH, AS, HB), pp. 32–41.
SAS-2013-DudkaPV #low level #verification: Byte-Precise Verification of Low-Level List Manipulation (KD, PP, TV), pp. 215–237.
LATA-2013-BolligCHKS #automaton #branch #communication: Dynamic Communicating Automata and Branching High-Level MSCs (BB, AC, LH, AK, TS), pp. 177–189.
SEFM-2013-PerceboisST #graph transformation #invariant #transitive #verification: Rule-Level Verification of Graph Transformations for Invariants Based on Edges’ Transitive Closure (CP, MS, HNT), pp. 106–121.
CHI-2013-BullingWG #behaviour #named #recognition #visual notation: EyeContext: recognition of high-level contextual cues from human visual behaviour (AB, CW, HG), pp. 305–308.
CHI-2013-HaraLF #artificial reality #crowdsourcing #identification #problem: Combining crowdsourcing and google street view to identify street-level accessibility problems (KH, VL, JF), pp. 631–640.
CHI-2013-LeeC #realtime: Real-time perception-level translation from audio signals to vibrotactile effects (JL, SC), pp. 2567–2576.
CHI-2013-PohlM #interactive: Focused and casual interactions: allowing users to vary their level of engagement (HP, RMS), pp. 2223–2232.
CSCW-2013-LampeVE #interactive #social: Users and nonusers: interactions between levels of adoption and social capital (CL, JV, NBE), pp. 809–820.
CSCW-2013-Robert #analysis #multi: A multi-level analysis of the impact of shared leadership in diverse virtual teams (LPRJ), pp. 363–374.
DHM-HB-2013-KorteKSOZVH: Evaluating Comfort Levels of a Workstation with an Individually Controlled Heating and Lighting System (EMdK, LKE, MES, LHvO, BvdZ, GV, GH), pp. 213–222.
DUXU-PMT-2013-BrandenburgVD #experience #user interface: User Experience Starts at the Keystroke Level: The Model of User Experience (MUX) (SB, MV, UD), pp. 449–458.
DUXU-WM-2013-KimJ13a #case study #difference #experience #user interface: A Study of the Satisfaction Level of User Experience in Digital Media Space Accordance with Differences in Flow Characteristic (YK, ECJ), pp. 515–524.
HCI-AMTE-2013-SeguraSSB #evaluation #multi #prototype: Multi-level Communicability Evaluation of a Prototyping Tool (VCVBS, FPS, GS, SDJB), pp. 460–469.
HCI-III-2013-WangLDHY #detection #set: A Coastline Detection Method Based on Level Set (QW, KL, FD, NH, LY), pp. 216–226.
HIMI-D-2013-KaoW #complexity: The Right Level of Complexity in a Banner Ad: Roles of Construal Level and Fluency (CTK, MYW), pp. 604–613.
HIMI-D-2013-SakataYO #game studies #modelling: Factor Models for Promoting Flow by Game Players’ Skill Level (MS, TY, MO), pp. 534–544.
HIMI-D-2013-SilvaZGBSV #question: Are the Intrusive Effects of SPAM Probes Present When Operators Differ by Skill Level and Training? (HIS, JZ, TG, VB, TZS, KPLV), pp. 269–275.
OCSC-2013-JiangB #approach #case study #multi #network #social: A Three-Level Approach to the Study of Multi-cultural Social Networking (YJ, OdB), pp. 365–374.
CAiSE-2013-Henderson-SellersCG #modelling #on the: On the Search for a Level-Agnostic Modelling Language (BHS, TC, CGP), pp. 240–255.
CIKM-2013-FangHZ #analysis #bibliography #sentiment: Exploring weakly supervised latent sentiment explanations for aspect-level review analysis (LF, MH, XZ), pp. 1057–1066.
CIKM-2013-ZhuZPWZY #network #predict #process #social: Predicting user activity level in social networks (YZ, EZ, SJP, XW, MZ, QY), pp. 159–168.
ECIR-2013-JeongM #classification #dependence #recognition #using: Using WordNet Hypernyms and Dependency Features for Phrasal-Level Event Recognition and Type Classification (YJ, SHM), pp. 267–278.
KDIR-KMIS-2013-MelnichenkoB #automation #image #low level #random: Automatic Image Annotation with Low-level Features and Conditional Random Fields (AM, AB), pp. 197–201.
RecSys-2013-ShiKBLH #multi #named #optimisation #rank: xCLiMF: optimizing expected reciprocal rank for data with multiple levels of relevance (YS, AK, LB, ML, AH), pp. 431–434.
SEKE-2013-MarcolinoOGM #approach #case study #effectiveness #towards #variability: Towards the Effectiveness of a Variability Management Approach at Use Case Level (AM, EAOJ, IMSG, JCM), pp. 214–219.
SEKE-2013-PereiraAS #data access #policy #relational #runtime: Runtime Values Driven by Access Control Policies — Statically Enforced at the Level of Relational Business Tiers (ÓMP, RLA, MYS), pp. 1–7.
SIGIR-2013-DangC: Term level search result diversification (VD, WBC), pp. 603–612.
TOOLS-EUROPE-J-2012-LilisS13 #approach #debugging #fault #metaprogramming: An Integrated Approach to Source Level Debugging and Compile Error Reporting in Metaprograms (YL, AS), pp. 1–26.
OOPSLA-2013-RavichandranP #distributed #multi #named: Multiverse: efficiently supporting distributed high-level speculation (KR, SP), pp. 533–552.
GPCE-2013-Richard-FoyBJ #abstraction #performance #programming #web: Efficient high-level abstractions for web programming (JRF, OB, JMJ), pp. 53–60.
LOPSTR-2013-LiqatKSGLGHE #analysis #energy #modelling #source code: Energy Consumption Analysis of Programs Based on XMOS ISA-Level Models (UL, SK, AS, KG, PLG, NG, MVH, KE), pp. 72–90.
POPL-2013-JensenBK #logic #low level: High-level separation logic for low-level code (JBJ, NB, AK), pp. 301–314.
POPL-2013-RompfSABJLJOO #compilation #data type #optimisation #source code #staging: Optimizing data structures in high-level programs: new directions for extensible compilers based on staging (TR, AKS, NA, KJB, VJ, HL, MJ, KO, MO), pp. 497–510.
RE-2013-KrkaM #behaviour: Distributing refinements of a system-level partial behavior model (IK, NM), pp. 72–81.
SAC-2013-AguiarFMH #communication #design #embedded #multi: Communication support at the OS level to enhance design space exploration in multiprocessed embedded systems (AA, SJF, FGM, FH), pp. 1555–1556.
SAC-2013-BaldovinGMV #kernel: Kernel-level time composability for avionics applications (AB, AG, EM, TV), pp. 1552–1554.
SAC-2013-LeitaoC #adaptation #detection #optimisation #performance #using #xml: Efficient XML duplicate detection using an adaptive two-level optimization (LL, PC), pp. 832–837.
SAC-2013-ToledoAOD #algorithm #hybrid #multi #problem #search-based: A hybrid compact genetic algorithm applied to the multi-level capacitated lot sizing problem (CFMT, MdSA, RRRdO, ACBD), pp. 200–205.
SAC-2013-XuTTZ #approach #fault #fine-grained: An instruction-level fine-grained recovery approach for soft errors (JX, QT, LT, HZ), pp. 1511–1516.
LDTA-J-2009-SoderbergEHM #abstract syntax tree #analysis #syntax: Extensible intraprocedural flow analysis at the abstract syntax tree level (ES, TE, GH, EM), pp. 1809–1827.
ASPLOS-2013-HonarmandDTKPP #named #parallel: Cyrus: unintrusive application-level record-replay for replay parallelism (NH, ND, JT, STK, GP, CP), pp. 193–206.
HPCA-2013-BonannoCLMPS #branch #predict: Two level bulk preload branch prediction (JB, AC, DL, UM, BP, AS), pp. 71–82.
HPCA-2013-ChangRLJ #comparison #energy #scalability: Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM (MTC, PR, SLL, BJ), pp. 143–154.
LCTES-2013-GuanWWCS #named: BLog: block-level log-block management for NAND flash memorystorage systems (YG, GW, YW, RC, ZS), pp. 111–120.
PPoPP-2013-LuM #migration #parallel: Multi-level parallel computing of reverse time migration for seismic imaging on blue Gene/Q (LL, KAM), pp. 291–292.
SOSP-2013-TerryPKBAA: Consistency-based service level agreements for cloud storage (DBT, VP, RK, MB, MKA, HAL), pp. 309–324.
CAV-2013-ManciniMMMMT #model checking #simulation #verification: System Level Formal Verification via Model Checking Driven Simulation (TM, FM, AM, IM, FM, ET), pp. 296–312.
CAV-2013-UhlerD #automation #named #query #smt #symbolic computation: Smten: Automatic Translation of High-Level Symbolic Computations into SMT Queries (RU, ND), pp. 678–683.
ICST-2013-DadeauCLTVBT #evaluation #generative #testing: Test Generation and Evaluation from High-Level Properties for Common Criteria Evaluations — The TASCCC Testing Tool (FD, KCC, YL, TT, GV, JB, ST), pp. 431–438.
ICST-2013-ShuSPC #fault #locality #named: MFL: Method-Level Fault Localization with Causal Inference (GS, BS, AP, FC), pp. 124–133.
ISSTA-2013-LiHHG #android #energy: Calculating source line level energy information for Android applications (DL, SH, WGJH, RG), pp. 78–89.
ISSTA-2013-YuSR #automation #framework #named #testing: SimRacer: an automated framework to support testing for process-level races (TY, WSa, GR), pp. 167–177.
VMCAI-2013-ZhengS0LD0 #network #partial order #reduction #using: State Space Reduction for Sensor Networks Using Two-Level Partial Order Reduction (MZ, DS, JS, YL, JSD, YG), pp. 515–535.
CBSE-2012-BrosigHK #architecture #dependence #modelling #online #parametricity #performance: Modeling parameter and context dependencies in online architecture-level performance models (FB, NH, SK), pp. 3–12.
QoSA-2012-DajsurenBSH #architecture #case study #consistency #multi: Automotive ADLS: a study on enforcing consistency through multiple architectural levels (YD, MvdB, AS, RH), pp. 71–80.
QoSA-2012-EklundB #architecture #ecosystem #framework #multi #using: Using architecture for multiple levels of access to an ecosystem platform (UE, JB), pp. 143–148.
WICSA-ECSA-2012-Al-AzzaniB #architecture #evaluation #named #security #testing: SecArch: Architecture-level Evaluation and Testing for Security (SAA, RB), pp. 51–60.
CASE-2012-FantiIMU #case study #design #evaluation #performance: A three level strategy for the design and performance evaluation of Hospital Departments: A case study (MPF, GI, AMM, WU), pp. 323–328.
DAC-2012-ChangB #simulation: Improving gate-level simulation accuracy when unknowns exist (KHC, CB), pp. 936–940.
DAC-2012-ChenHKYW #low cost: Age-based PCM wear leveling with nearly zero search cost (CHC, PCH, TWK, CLY, CYMW), pp. 453–458.
DAC-2012-CongL #architecture #metric #optimisation #synthesis: A metric for layout-friendly microarchitecture optimization in high-level synthesis (JC, BL), pp. 1239–1244.
DAC-2012-CongZZ #memory management #optimisation #synthesis: Optimizing memory hierarchy allocation with loop transformations for high-level synthesis (JC, PZ, YZ), pp. 1233–1238.
DAC-2012-EberlGTA #automation #design #network: Considering diagnosis functionality during automatic system-level design of automotive networks (ME, MG, JT, UA), pp. 205–213.
DAC-2012-FangC: Simultaneous flare level and flare variation minimization with dummification in EUVL (SYF, YWC), pp. 1179–1184.
DAC-2012-JiangZZY #embedded #multi #performance #scalability: Constructing large and fast multi-level cell STT-MRAM based cache for embedded processors (LJ, BZ, YZ, JY), pp. 907–912.
DAC-2012-KelleyWSRH #interface: Removing overhead from high-level interfaces (KK, MW, JPS, SR, MH), pp. 783–789.
DAC-2012-LearyCC #architecture #memory management #synthesis: System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC (GL, WC, KSC), pp. 672–677.
DAC-2012-RoyC #analysis #predict: Predicting timing violations through instruction-level path sensitization analysis (SR, KC), pp. 1074–1081.
DAC-2012-ShachamGSWBVHDQR #design #game studies: Avoiding game over: bringing design to the next level (OS, SG, SS, MW, JB, AV, MH, AD, WQ, SR), pp. 623–629.
DAC-2012-SironiBCCHSS #adaptation #named #operating system #performance #self: Metronome: operating system level performance management via self-adaptive computing (FS, DBB, SC, FC, HH, DS, MDS), pp. 856–865.
DAC-2012-WangDX #architecture: Point and discard: a hard-error-tolerant architecture for non-volatile last level caches (JW, XD, YX), pp. 253–258.
DAC-2012-WangW #algorithm #memory management #performance: Observational wear leveling: an efficient algorithm for flash memory management (CW, WFW), pp. 235–242.
DATE-2012-ChenCHLLPR #configuration management #design #energy #hybrid: Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design (YTC, JC, HH, BL, CL, MP, GR), pp. 45–50.
DATE-2012-ChenLMABJ #3d #architecture #in memory #memory management #modelling #named: CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory (KC, SL, NM, JHA, JBB, NPJ), pp. 33–38.
DATE-2012-ChenSZX #3d #named #physics #synthesis: 3DHLS: Incorporating high-level synthesis in physical planning of three-dimensional (3D) ICs (YC, GS, QZ, YX), pp. 1185–1190.
DATE-2012-CordesM #algorithm #parallel #search-based #using: Multi-objective aware extraction of task-level parallelism using genetic algorithms (DC, PM), pp. 394–399.
DATE-2012-KamalASP #approach #architecture #process: An architecture-level approach for mitigating the impact of process variations on extensible processors (MK, AAK, SS, MP), pp. 467–472.
DATE-2012-KondratyevLMW #synthesis #trade-off: Exploiting area/delay tradeoffs in high-level synthesis (AK, LL, MM, YW), pp. 1024–1029.
DATE-2012-LiuPC #composition #design #synthesis: Compositional system-level design exploration with planning of high-level synthesis (HYL, MP, LPC), pp. 641–646.
DATE-2012-LiuWWQS #embedded #memory management #process: A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems (DL, TW, YW, ZQ, ZS), pp. 1447–1450.
DATE-2012-LuMS #abstraction #modelling #prototype #transaction: Accurately timed transaction level models for virtual prototyping at high abstraction level (KL, DMG, US), pp. 135–140.
DATE-2012-Mancini #kernel #memory management #synthesis: Enhancing non-linear kernels by an optimized memory hierarchy in a High Level Synthesis flow (SM, FR), pp. 1130–1133.
DATE-2012-NazinMR #optimisation: Yield optimization for radio frequency receiver at system level (SAN, DM, AR), pp. 848–851.
DATE-2012-PellegriniSCFHJAAB #evaluation: CrashTest’ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions (AP, RS, LC, XF, SKSH, JJ, SVA, TMA, VB), pp. 1106–1109.
DATE-2012-PiscitelliP #analysis #design #hybrid: Design space pruning through hybrid analysis in system-level design space exploration (RP, ADP), pp. 781–786.
DATE-2012-PontesCV #design #reliability: An accurate Single Event Effect digital design flow for reliable system level design (JJHP, NC, PV), pp. 224–229.
DATE-2012-QianTT #configuration management #self #using: A flit-level speedup scheme for network-on-chips using self-reconfigurable bi-directional channels (ZQ, YFT, CYT), pp. 1295–1300.
DATE-2012-RahimiBG #analysis: Analysis of instruction-level vulnerability to dynamic voltage and temperature variations (AR, LB, RKG), pp. 1102–1105.
DATE-2012-StattelmannGCBR #hybrid #modelling #simulation #using: Hybrid source-level simulation of data caches using abstract cache models (SS, GG, CC, OB, WR), pp. 376–381.
DATE-2012-TangZBM #analysis #correlation #modelling #statistics: Transistor-level gate model based statistical timing analysis considering correlations (QT, AZ, MB, NvdM), pp. 917–922.
DATE-2012-ThachTKI #estimation #performance: Fast cycle estimation methodology for instruction-level emulator (DT, YT, SK, AI), pp. 248–251.
DATE-2012-TodorovMRS #approximate #automation #memory management #transaction: Automated construction of a cycle-approximate transaction level model of a memory controller (VT, DMG, HR, US), pp. 1066–1071.
DATE-2012-WangH #compilation #embedded #optimisation #simulation: Accurate source-level simulation of embedded software with respect to compiler optimizations (ZW, JH), pp. 382–387.
DATE-2012-WuLMC #approach #correlation: Mitigating lifetime underestimation: A system-level approach considering temperature variations and correlations between failure mechanisms (KCW, MCL, DM, SCC), pp. 1269–1274.
DATE-2012-XuLHRHT #analysis #power management: Variation-aware leakage power model extraction for system-level hierarchical power analysis (YX, BL, RH, BR, CH, JT), pp. 346–351.
DATE-2012-YunLY #ram: Bloom filter-based dynamic wear leveling for phase-change RAM (JY, SL, SY), pp. 1513–1518.
WCRE-J-2009-BettenburgSIAZH12 #consistency #empirical: An empirical study on inconsistent changes to code clones at the release level (NB, WS, WMI, BA, YZ, AEH), pp. 760–776.
ICSM-2012-FadhelKLW #detection #search-based: Search-based detection of high-level model changes (AbF, MK, PL, MW), pp. 212–221.
WCRE-2012-AljamaanL #towards: Towards Tracing at the Model Level (HIA, TCL), pp. 495–498.
PLDI-2012-DubachCRBF #architecture #compilation: Compiling a high-level language for GPUs: (via language support for architectures and compilers) (CD, PC, RMR, DFB, SJF), pp. 1–12.
PLDI-2012-LiuZJDK #compilation #framework #parallel: A compiler framework for extracting superword level parallelism (JL, YZ, OJ, WD, MTK), pp. 347–358.
ICALP-v1-2012-ByrkaR #algorithm #approximate: Improved LP-Rounding Approximation Algorithm for k-level Uncapacitated Facility Location (JB, BR), pp. 157–169.
ICALP-v2-2012-OngT #game studies #recursion #semantics: Two-Level Game Semantics, Intersection Types, and Recursion Schemes (CHLO, TT), pp. 325–336.
IFM-2012-HoomanMW #abstraction #detection #fault #industrial #modelling #using: Early Fault Detection in Industry Using Models at Various Abstraction Levels (JH, AJM, HvW), pp. 268–282.
ICFP-2012-Sheard #design #programming #reduction: Painless programming combining reduction and search: design principles for embedding decision procedures in high-level languages (TES), pp. 89–102.
CHI-2012-DixonFW #analysis #interface #using #visual notation: A general-purpose target-aware pointing enhancement using pixel-level analysis of graphical interfaces (MD, JF, JOW), pp. 3167–3176.
CHI-2012-FroehlichFORPWLFBPL #design #evaluation #prototype: The design and evaluation of prototype eco-feedback displays for fixture-level water usage data (JF, LF, MO, SR, JP, IW, ECL, FF, MB, SP, JAL), pp. 2367–2376.
CSCW-2012-EhrlichC #analysis #communication #development #distributed #multi #performance: All-for-one and one-for-all?: a multi-level analysis of communication patterns and individual performance in geographically distributed software development (KE, MC), pp. 945–954.
CSCW-2012-RzeszotarskiK #learning #predict #wiki #word: Learning from history: predicting reverted work at the word level in wikipedia (JMR, AK), pp. 437–440.
AdaEurope-2012-FairbairnB #implementation #verification: Implementing and Verifying EDF Preemption-Level Resource Control (MLF, AB), pp. 193–206.
ICEIS-v3-2012-CarvalhoRACJDM #energy #network #performance #policy #towards: Towards Sustainable Networks — Energy Efficiency Policy from Business to Device Instance Levels (TCMBC, ACR, MA, CHAC, GCJ, CKD, CM), pp. 238–243.
CIKM-2012-LiSSTDL #microblog #mining #topic: Mining topic-level opinion influence in microblog (DL, XS, GS, JT, YD, ZL), pp. 1562–1566.
CIKM-2012-LongGXK #approach #design #using: A simple approach to the design of site-level extractors using domain-centric principles (CL, XG, CX, SK), pp. 1517–1521.
CIKM-2012-SuhGCK #clustering #multi: A new tool for multi-level partitioning in teradata (YKS, AG, AC, PK), pp. 2214–2218.
CIKM-2012-XuXLW #classification: Coarse-to-fine sentence-level emotion classification based on the intra-sentence features and sentential context (JX, RX, QL, XW), pp. 2455–2458.
ICML-2012-LeRMDCCDN #learning #scalability #using: Building high-level features using large scale unsupervised learning (QVL, MR, RM, MD, GC, KC, JD, AYN), p. 69.
ICML-2012-LozanoS #multi: Multi-level Lasso for Sparse Multi-task Regression (ACL, GS), p. 80.
ICML-2012-WulsinJL #clustering #modelling #multi #process: A Hierarchical Dirichlet Process Model with Multiple Levels of Clustering for Human EEG Seizure Modeling (DW, SJ, BL), p. 67.
ICPR-2012-BoresB #monitoring #process: Urban traffic monitoring from aerial LIDAR data with a Two-Level Marked Point Process model (AB, CB), pp. 1379–1382.
ICPR-2012-KawaiMHIY #identification #using: Person re-identification using view-dependent score-level fusion of gait and color features (RK, YM, CH, HI, YY), pp. 2694–2697.
ICPR-2012-LiuKWJ #recognition: Action recognition with discriminative mid-level features (CL, YK, XW, YJ), pp. 3366–3369.
ICPR-2012-LiuML #learning #multi: Training data recycling for multi-level learning (JL, SM, YL), pp. 2314–2318.
ICPR-2012-PitchayK #multi: Multi-task signal recovery by higher level hyper-parameter sharing (SAP, AK), pp. 2246–2249.
ICPR-2012-PohKA #approach #authentication #parametricity: A discriminative parametric approach to video-based score-level fusion for biometric authentication (NP, JK, FMA), pp. 2335–2338.
ICPR-2012-RenO #authentication #video: Accuracy of a high-level, loss-tolerant video fingerprint for surveillance authentication (Y(R, LO), pp. 1088–1091.
ICPR-2012-TabernikKBL #learning #low level #statistics #visual notation: Learning statistically relevant edge structure improves low-level visual descriptors (DT, MK, MB, AL), pp. 1471–1474.
ICPR-2012-TangHW #detection #multi #recognition: Hand-dorsa vein recognition based on multi-level keypoint detection and local feature matching (YT, DH, YW), pp. 2837–2840.
ICPR-2012-WangL12b #learning #recognition #string: String-level learning of confidence transformation for Chinese handwritten text recognition (DHW, CLL), pp. 3208–3211.
ICPR-2012-ZangY0JZT #information management: A score-level fusion method with prior knowledge for fingerprint matching (YZ, XY, KC, XJ, NZ, JT), pp. 2379–2382.
ICPR-2012-ZhangSLZS #image #reduction: Enhancement and noise reduction of very low light level images (XZ, PS, LL, LZ, JS), pp. 2034–2037.
KEOD-2012-AlirezaieL #classification #low level #ontology: Ontology Alignment for Classification of Low Level Sensor Data (MA, AL), pp. 89–97.
ECMFA-2012-AtkinsonGK #modelling #multi #on the fly: On-the-Fly Emendation of Multi-level Models (CA, RG, BK), pp. 194–209.
ICMT-2012-AtkinsonGT #model transformation #multi #towards: Towards Multi-level Aware Model Transformations (CA, RG, CT), pp. 208–223.
MoDELS-2012-BrancoTCKV #abstraction #process #workflow: Matching Business Process Workflows across Abstraction Levels (MCB, JT, KC, JMK, HV), pp. 626–641.
MoDELS-2012-BrancoTCKV #abstraction #process #workflow: Matching Business Process Workflows across Abstraction Levels (MCB, JT, KC, JMK, HV), pp. 626–641.
OOPSLA-2012-Anderson #fine-grained #parallel #policy #resource management #using: Efficiently combining parallel software using fine-grained, language-level, hierarchical resource management policies (ZRA), pp. 717–736.
OOPSLA-2012-InoueHWN #adaptation #compilation #java #jit #multi: Adaptive multi-level compilation in a trace-based Java JIT compiler (HI, HH, PW, TN), pp. 179–194.
TOOLS-EUROPE-2012-ZhengAMSBVTQM #bytecode #partial evaluation: Turbo DiSL: Partial Evaluation for High-Level Bytecode Instrumentation (YZ, DA, LM, AS, WB, AV, PT, ZQ, MM), pp. 353–368.
GPCE-2012-ZhangZUVH #component #development: A three-level component model in component based software development (H(Z, LZ, CU, SV, MH), pp. 70–79.
QAPL-2012-Bernardo #bisimulation #concurrent #markov #process: Weak Markovian Bisimulation Congruences and Exact CTMC-Level Aggregations for Concurrent Processes (MB), pp. 122–136.
POPL-2012-Moore #proving #theorem proving: Meta-level features in an industrial-strength theorem prover (JSM), pp. 425–426.
REFSQ-2012-GulkeRJA #complexity #development #problem #requirements: High-Level Requirements Management and Complexity Costs in Automotive Development Projects: A Problem Statement (TG, BR, MJ, JA), pp. 94–100.
SAC-2012-Affeldt #library #low level #on the: On construction of a library of formally verified low-level arithmetic functions (RA), pp. 1326–1331.
SAC-2012-BoulilaEFS #adaptation #approach #database #image #predict: High level adaptive fusion approach: application to land cover change prediction in satellite image databases (WB, KSE, IRF, BS), pp. 21–22.
SAC-2012-ChiwiacowskyGMVG #algorithm #search-based: A two-level procedure based on genetic algorithms to optimize an aeronautical composite structure (LDC, PG, RM, HFdCV, ATG), pp. 259–260.
SAC-2012-HanJ #clustering #kernel #linux: Kernel-level ARINC 653 partitioning for Linux (SH, HWJ), pp. 1632–1637.
SAC-2012-HuangZGWCW #clustering: Reducing last level cache pollution through OS-level software-controlled region-based partitioning (TH, QZ, XG, XW, XC, KW), pp. 1779–1784.
SAC-2012-NobakhtBJS #deployment #programming #scheduling: Programming and deployment of active objects with application-level scheduling (BN, FSdB, MMJ, RS), pp. 1883–1888.
SAC-2012-ParkSSP #algorithm #hybrid #in memory #memory management: PRAM wear-leveling algorithm for hybrid main memory based on data buffering, swapping, and shifting (SKP, HS, DJS, KHP), pp. 1643–1644.
SAC-2012-SenarathneW #approach #coordination #multi: A two-level approach for multi-robot coordinated exploration of unstructured environments (PGCNS, DW), pp. 274–279.
ICSE-2012-GoreR #bias #debugging #metric #statistics: Reducing confounding bias in predicate-level statistical debugging metrics (RG, PFRJ), pp. 463–473.
ICSE-2012-KumarKRL #distributed #specification: Inferring class level specifications for distributed systems (SK, SCK, AR, DL), pp. 914–924.
ICSE-2012-MitchellS #identification #process: Software process improvement through the identification and removal of project-level knowledge flow obstacles (SMM, CBS), pp. 1265–1268.
SLE-2012-GuizzardiZ #concept #modelling: A Common Foundational Theory for Bridging Two Levels in Ontology-Driven Conceptual Modeling (GG, VZ), pp. 286–310.
ASPLOS-2012-HariANR #equivalence #fault #named: Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults (SKSH, SVA, HN, PR), pp. 123–134.
ASPLOS-2012-LeeS #architecture #scheduling #using: Region scheduling: efficiently using the cache architectures via page-level affinity (ML, KS), pp. 451–462.
HPCA-2012-LimTSACRW #memory management: System-level implications of disaggregated memory (KTL, YT, JRS, AA, JC, PR, TFW), pp. 189–200.
LCTES-2012-FangLZLCZ #analysis #multi #predict: Improving dynamic prediction accuracy through multi-level phase analysis (ZF, JL, WZ, YL, HC, BZ), pp. 89–98.
OSDI-2012-BelayBMTMK #cpu #named: Dune: Safe User-level Access to Privileged CPU Features (AB, AB, AJM, DT, DM, CK), pp. 335–348.
PPoPP-2012-AliasDP #kernel #optimisation #synthesis: Optimizing remote accesses for offloaded kernels: application to high-level synthesis for FPGA (CA, AD, AP), pp. 285–286.
PPoPP-2012-TzenakisPKPVN #analysis #dependence #named #parallel: BDDT: : block-level dynamic dependence analysis for deterministic task-based parallelism (GT, AP, JK, PP, HV, DSN), pp. 301–302.
ICST-2012-DurelliOD #mutation testing #testing #towards #virtual machine: Toward Harnessing High-Level Language Virtual Machines for Further Speeding Up Weak Mutation Testing (VHSD, JO, MED), pp. 681–690.
ICST-2012-TranP #framework #graph transformation #towards #verification: Towards a Rule-Level Verification Framework for Property-Preserving Graph Transformations (HNT, CP), pp. 946–953.
IJCAR-2012-Bjorner #satisfiability: Taking Satisfiability to the Next Level with Z3 — (Abstract) (NB), pp. 1–8.
IJCAR-2012-EmmerKKSV #bound #model checking #word: EPR-Based Bounded Model Checking at Word Level (ME, ZK, KK, CS, AV), pp. 210–224.
CBSE-2011-HuangW #architecture #component #exception #towards: Towards architecture-level middleware-enabled exception handling of component-based systems (GH, YW), pp. 159–168.
ASE-2011-BrosigHK #architecture #automation #component #distributed #modelling #performance: Automated extraction of architecture-level performance models of distributed component-based systems (FB, NH, SK), pp. 183–192.
CASE-2011-Ruiz-VelazquezAFQ #modelling: Neural modeling of the blood glucose level for Type 1 Diabetes Mellitus patients (ERV, AYA, RF, GQ), pp. 696–701.
CASE-2011-WigstromL #energy #optimisation #scheduling: Energy optimization of trajectories for high level scheduling (OW, BL), pp. 654–659.
CASE-2011-WuS #bound #multi #problem: A lower and upper bound guided nested partitions method for solving capacitated multi-level production planning problems (TW, LS), pp. 78–83.
DAC-2011-AisoposCP #fault #modelling: Enabling system-level modeling of variation-induced faults in networks-on-chips (KA, CHOC, LSP), pp. 930–935.
DAC-2011-BailisRGBS #injection #named: Dimetrodon: processor-level preventive thermal management via idle cycle injection (PB, VJR, SG, DMB, MIS), pp. 89–94.
DAC-2011-ChenKCH #analysis #multi #reliability: Reliability analysis and improvement for multi-level non-volatile memories with soft information (SLC, BRK, JNC, CTH), pp. 753–758.
DAC-2011-CoptyKN #analysis #architecture #performance #statistics #transaction: Transaction level statistical analysis for efficient micro-architectural power and performance studies (EC, GK, SN), pp. 351–356.
DAC-2011-DongZHWL: Wear rate leveling: lifetime enhancement of PRAM with endurance variation (JD, LZ, YH, YW, XL), pp. 972–977.
DAC-2011-Fey #analysis #data flow #multi: Orchestrated multi-level information flow analysis to understand SoCs (GF), pp. 284–285.
DAC-2011-Hazelwood #adaptation #embedded #runtime: Process-level virtualization for runtime adaptation of embedded software (KMH), pp. 895–900.
DAC-2011-LiuYX #low cost: Re-synthesis for cost-efficient circuit-level timing speculation (YL, FY, QX), pp. 158–163.
DAC-2011-PatilBC #architecture #contract #synthesis: Enforcing architectural contracts in high-level synthesis (NAP, AB, DC), pp. 824–829.
DAC-2011-StattelmannBR #optimisation #performance #simulation: Fast and accurate source-level simulation of software timing considering complex code optimizations (SS, OB, WR), pp. 486–491.
DAC-2011-ZhengSXHBC #array #framework #programmable: Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability (RZ, JS, CX, NH, BB, YC), pp. 322–327.
DATE-2011-AcquavivaPOS #power management #reliability: System level techniques to improve reliability in high power microcontrollers for automotive applications (AA, MP, MO, MS), pp. 1123–1124.
DATE-2011-AliCMB #encryption #hardware #multi #security: Multi-level attacks: An emerging security concern for cryptographic hardware (SA, RSC, DM, SB), pp. 1176–1179.
DATE-2011-BaiDCD #automation #modelling #network #performance: Automated construction of fast and accurate system-level models for wireless sensor networks (LSB, RPD, PHC, PAD), pp. 1083–1088.
DATE-2011-BeserraMSC #modelling #network: System-level modeling of a mixed-signal System on Chip for Wireless Sensor Networks (GSB, JEGdM, AMS, JCdC), pp. 1500–1504.
DATE-2011-CararaASM: Achieving composability in NoC-based MPSoCs through QoS management at software level (EC, GMA, GS, FGM), pp. 407–412.
DATE-2011-CassidyYZA #design: A high-level analytical model for application specific CMP design exploration (AC, KY, HZ, AGA), pp. 1095–1100.
DATE-2011-ChungCCK: Formal reset recovery slack calculation at the register transfer level (CNC, CWC, KHC, SYK), pp. 571–574.
DATE-2011-FunchalM #framework #modelling #named #simulation #transaction: jTLM: An experimentation framework for the simulation of transaction-level models of Systems-on-Chip (GF, MM), pp. 1184–1187.
DATE-2011-GolaniB #multi #pipes and filters: An area-efficient multi-level single-track pipeline template (PG, PAB), pp. 1509–1512.
DATE-2011-GrammatikakisPSP #estimation #using: System-level power estimation methodology using cycle- and bit-accurate TLM (MDG, SP, JPS, CP), pp. 1125–1126.
DATE-2011-IndrusiakS #performance #transaction: Fast and accurate transaction-level model of a wormhole network-on-chip with priority preemptive virtual channel arbitration (LSI, OMdS), pp. 1089–1094.
DATE-2011-KimCSY #modelling #parallel #performance #simulation #using: Temporal parallel simulation: A fast gate-level HDL simulation using higher level models (DK, MJC, KS, SY), pp. 1584–1589.
DATE-2011-KimCY #distributed #predict #simulation: A new distributed event-driven gate-level HDL simulation by accurate prediction (DK, MJC, SY), pp. 547–550.
DATE-2011-KondratyevLMW #pipes and filters #synthesis: Realistic performance-constrained pipelining in high-level synthesis (AK, LL, MM, YW), pp. 1382–1387.
DATE-2011-LoCWT #modelling #performance #simulation: Cycle-count-accurate processor modeling for fast and accurate system-level simulation (CKL, LCC, MHW, RST), pp. 341–346.
DATE-2011-Niu #embedded #energy #realtime #scheduling: System-level energy-efficient scheduling for hard real-time embedded systems (LN), pp. 281–284.
DATE-2011-SinhaP #representation #state machine #synthesis: Abstract state machines as an intermediate representation for high-level synthesis (RS, HDP), pp. 1406–1411.
DATE-2011-VissersNN #interface #realtime #synthesis #tool support #using: Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools (KAV, SN, JN), pp. 848–850.
DATE-2011-WangLH #approach #embedded: An approach to improve accuracy of source-level TLMs of embedded software (ZW, KL, AH), pp. 216–221.
DATE-2011-ZattSBH #architecture #estimation #hardware #parallel #pipes and filters #throughput #video: Multi-level pipelined parallel hardware architecture for high throughput motion and disparity estimation in Multiview Video Coding (BZ, MS, SB, JH), pp. 1448–1453.
DocEng-2011-SadallahAP #component #specification: Component-based hypervideo model: high-level operational specification of hypervideos (MS, OA, YP), pp. 53–56.
ICDAR-2011-GuichardCC #documentation #word: Exploiting Collection Level for Improving Assisted Handwritten Word Transcription of Historical Documents (LG, JC, BC), pp. 875–879.
ICDAR-2011-PinsonB #component #using: Connected Component Level Discrimination of Handwritten and Machine-Printed Text Using Eigenfaces (SJP, WAB), pp. 1394–1398.
SIGMOD-2011-MaFL #memory management #named: LazyFTL: a page-level flash translation layer optimized for NAND flash memory (DM, JF, GL), pp. 1–12.
CSEET-2011-CarverK #student #testing: Evaluating the testing ability of senior-level computer science students (JCC, NAK), pp. 169–178.
CSEET-2011-HeckmanHS #android #education #java #re-engineering: Teaching second-level Java and software engineering with Android (SSH, TBH, MS), pp. 540–542.
MSR-2011-RotellaC #implementation #metric #quality: Implementing quality metrics and goals at the corporate level (PR, SC), pp. 113–122.
WCRE-2011-KeivanlooRC #clone detection #multi #realtime: Internet-scale Real-time Code Clone Search Via Multi-level Indexing (IK, JR, PC), pp. 23–27.
WCRE-2011-OlszakRJ #java #runtime: Meta-Level Runtime Feature Awareness for Java (AO, MR, BNJ), pp. 271–274.
PLDI-2011-Chlipala #logic #low level #source code #verification: Mostly-automated verification of low-level programs in computational separation logic (AC), pp. 234–245.
IFL-2011-MaierT #haskell #implementation #parallel: Implementing a High-Level Distributed-Memory Parallel Haskell in Haskell (PM, PWT), pp. 35–50.
CHI-2011-WainerDK #email: Should I open this email?: inbox-level cues, curiosity and attention to email (JW, LD, RK), pp. 3439–3448.
HCI-DDA-2011-ZaragozaRBBMCR #detection: A User-Friendly Tool for Detecting the Stress Level in a Person’s Daily Life (IZ, BR, CB, RMB, IM, DC, MAR), pp. 423–431.
HCI-MIIE-2011-ForutanpourR #collaboration #mobile #named #using: ProJest: Enabling Higher Levels of Collaboration Using Today’s Mobile Devices (BF, JR), pp. 48–58.
HCI-UA-2011-Huseyinov #adaptation #fuzzy #learning #modelling #multi: Fuzzy Linguistic Modelling Cognitive / Learning Styles for Adaptation through Multi-level Granulation (IH), pp. 39–47.
HCI-UA-2011-JonesEM #distance #education #question: Distance Education at the Graduate Level: A Viable Alternative? (BMJ, AE, SM), pp. 58–60.
HCI-UA-2011-KimuraF #communication #comprehension #design: Design of Communication Field for Leading to Satisfied Understanding: Example of High-Level Radioactive Waste Disposal in Japan (HK, MF), pp. 354–359.
HIMI-v1-2011-WuS #abstraction #source code #visualisation: Visualizing Programs on Different Levels of Abstractions (JHW, JS), pp. 66–75.
VISSOFT-2011-WirthPS #approach #behaviour #multi #visualisation: A multi-level approach for visualization and exploration of reactive program behavior (CW, HP, RS), pp. 1–4.
AdaEurope-2011-CarnevaliLPV #approach #design #formal method #scheduling #verification: A Formal Approach to Design and Verification of Two-Level Hierarchical Scheduling Systems (LC, GL, AP, EV), pp. 118–131.
AdaEurope-2011-RazaFP #detection #fault #parallel #source code: Detecting High-Level Synchronization Errors in Parallel Programs (SAR, SF, EP), pp. 17–30.
EDOC-2011-BucklGMSS #architecture #enterprise #modelling: Modeling the Supply and Demand of Architectural Information on Enterprise Level (SB, AG, FM, CS, CMS), pp. 44–51.
ICEIS-v2-2011-WangJ #analysis #empirical: An Empirical Analysis of Beijing Public Transport Users’ Satisfaction Level (HW, LJ), pp. 384–388.
ICEIS-v4-2011-SchulteKKS #communication #education #integration #towards: KOI School — Towards the Next Level of Communication, Organization and Integration in Education (JS, RK, DK, JS), pp. 43–52.
CIKM-2011-ChenloL #effectiveness #estimation #performance: Effective and efficient polarity estimation in blogs based on sentence-level evidence (JMC, DEL), pp. 365–374.
CIKM-2011-Collins-ThompsonBWCS #personalisation #web: Personalizing web search results by reading level (KCT, PNB, RWW, SdlC, DS), pp. 403–412.
CIKM-2011-GuoZGS #analysis #aspect-oriented #multi #sentiment: Domain customization for aspect-oriented opinion analysis with multi-level latent sentiment clues (HG, HZ, ZG, ZS), pp. 2493–2496.
CIKM-2011-HassanSH #estimation #metric #web: A task level metric for measuring web search satisfaction and its application on improving relevance estimation (AHA, YS, LwH), pp. 125–134.
CIKM-2011-RamanJS #learning #ranking: Structured learning of two-level dynamic rankings (KR, TJ, PS), pp. 291–296.
ECIR-2011-KurstenE #component #evaluation #scalability: A Large-Scale System Evaluation on Component-Level (JK, ME), pp. 679–682.
KDD-2011-TangWGW #network #social #topic: Topic-level social network search (JT, SW, BG, YW), pp. 769–772.
KDD-2011-TanLTJZL #analysis #network #sentiment #social: User-level sentiment analysis incorporating social networks (CT, LL, JT, LJ, MZ, PL), pp. 1397–1405.
KDIR-2011-NguyenLT #classification #image #multi: Cascade of Multi-level Multi-instance Classifiers for Image Annotation (CTN, HVL, TT), pp. 14–23.
KMIS-2011-SchmidlK #information management #using: Using Task Histories to Support Person-to-person Knowledge Exchange — Extracting and using Contextual Overlap and Levels of Expertise to Connect Knowledge Workers (JS, HK), pp. 77–86.
SEKE-2011-LiuZH #modelling #petri net #pipes and filters: PIPE+ — A Modeling Tool for High Level Petri Nets (SL, RZ, XH), pp. 115–121.
SEKE-2011-TsuiGDJ #abstraction #development: Measuring Levels of Abstraction in Software Development (FT, AG, SD, EJ), pp. 466–469.
SIGIR-2011-CuiWLOYS #predict #ranking #social #what: Who should share what?: item-level social influence prediction for users and posts ranking (PC, FW, SL, MO, SY, LS), pp. 185–194.
SIGIR-2011-WengLCZZYZ #approach #documentation #query #retrieval: Query by document via a decomposition-based two-level retrieval approach (LW, ZL, RC, YZ, YZ, LTY, LZ), pp. 505–514.
SIGIR-2011-WilhelmKE #comparative #component #evaluation #information retrieval: A tool for comparative IR evaluation on component level (TW, JK, ME), pp. 1291–1292.
SIGIR-2011-WuYLLYX #learning #rank #using: Learning to rank using query-level regression (JW, ZY, YL, HL, ZY, KX), pp. 1091–1092.
ECMFA-2011-AlferezACFKKKMMRZ #abstraction #aspect-oriented #development: Aspect-Oriented Model Development at Different Levels of Abstraction (MA, NA, SC, FF, JK, JK, MEK, SM, GM, EER, GZ), pp. 361–376.
MoDELS-2011-BalabanK #development: Logic-Based Model-Level Software Development with F-OML (MB, MK), pp. 517–532.
MoDELS-2011-BalabanK #development: Logic-Based Model-Level Software Development with F-OML (MB, MK), pp. 517–532.
PLATEAU-2011-YoonM #editing #low level: Capturing and analyzing low-level events from the code editor (YY, BAM), pp. 25–30.
POPL-2011-RamseyD #composition #dependent type #independence #low level #type system #using: Resourceable, retargetable, modular instruction selection using a machine-independent, type-based tiling of low-level intermediate code (NR, JD), pp. 575–586.
POPL-2011-WeirichVJZ #abstraction #generative: Generative type abstraction and type-level computation (SW, DV, SLPJ, SZ), pp. 227–240.
SAC-2011-FreitasHCFPWL: Analyzing different levels of geographic context awareness in agent ferrying over VANETs (EPdF, TH, LAGC, AMF, CEP, FRW, TL), pp. 413–418.
SAC-2011-KongGDY #energy #parallel #realtime #scheduling: Energy-efficient scheduling for parallel real-time tasks based on level-packing (FK, NG, QD, WY), pp. 635–640.
SAC-2011-LinTBBK #component #configuration management #distributed #evolution #programming: Transparent componentisation: high-level (re)configurable programming for evolving distributed systems (SL, FT, MB, GSB, AMK), pp. 203–208.
SAC-2011-LiuZ #memory management #predict #realtime: Exploiting time predictable two-level scratchpad memory for real-time systems (YL, WZ), pp. 395–396.
SAC-2011-ShanCW #virtual machine: Virtualizing system and ordinary services in Windows-based OS-level virtual machines (ZS, TcC, XW), pp. 579–583.
SAC-2011-VenkateshGBC #fixpoint #implementation #markov #modelling #recognition #speech #using: Fixed-point implementation of isolated sub-word level speech recognition using hidden Markov models (NV, RG, RB, MGC), pp. 368–373.
SAC-2011-WangZG #classification #identification #network: Traffic classification beyond application level: identifying content types from network traces (YW, ZZ, LG), pp. 540–541.
SAC-2011-YuMGTBGGTL #using: System-level co-simulation of integrated avionics using polychrony (HY, YM, YG, JPT, LB, TG, PLG, AT, OL), pp. 354–359.
ICSE-2011-HermansPD #data flow #diagrams #generative #spreadsheet: Supporting professional spreadsheet users by generating leveled dataflow diagrams (FH, MP, AvD), pp. 451–460.
ICSE-2011-KimCK #empirical #evolution #refactoring: An empirical investigation into the role of API-level refactorings during software evolution (MK, DC, SK), pp. 151–160.
ICSE-2011-SridharaPV #automation #detection: Automatically detecting and describing high level actions within methods (GS, LLP, KVS), pp. 101–110.
CC-2011-JoynerBS #analysis #array #bound: Subregion Analysis and Bounds Check Elimination for High Level Arrays (MJ, ZB, VS), pp. 246–265.
CC-2011-MaKA #memory management #multi: Practical Loop Transformations for Tensor Contraction Expressions on Multi-level Memory Hierarchies (WM, SK, GA), pp. 266–285.
HPCA-2011-BhattacharjeeLM #multi: Shared last-level TLBs for chip multiprocessors (AB, DL, MM), pp. 62–63.
HPCA-2011-JoshiZL #energy #memory management #multi #named #performance: Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system (MJ, WZ, TL), pp. 345–356.
HPCA-2011-NittaFA #network: Addressing system-level trimming issues in on-chip nanophotonic networks (CN, MKF, VA), pp. 122–131.
HPCA-2011-SrikantaiahKZKIX #adaptation #configuration management #multi #named: MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy (SS, EK, TZ, MTK, MJI, YX), pp. 231–242.
HPDC-2011-Garcia-YaguezFG #concurrent #thread: Exclusive squashing for thread-level speculation (ÁGY, DRLF, AGE), pp. 275–276.
LCTES-2011-AlbertAGZ #analysis #parallel: Task-level analysis for a language with async/finish parallelism (EA, PA, SG, DZ), pp. 21–30.
LCTES-2011-ChangH #algorithm #low cost: A low-cost wear-leveling algorithm for block-mapping solid-state disks (LPC, LCH), pp. 31–40.
LCTES-2011-WangLLFBL #debugging #dependence #multi #network: Dependence-based multi-level tracing and replay for wireless sensor networks debugging (MW, ZL, FL, XF, SB, YHL), pp. 91–100.
PPoPP-2011-DingWZ #multi #named #optimisation #performance: ULCC: a user-level facility for optimizing shared cache performance on multicores (XD, KW, XZ), pp. 103–112.
CAV-2011-BerdineCI #memory management #named #safety: SLAyer: Memory Safety for Systems-Level Code (JB, BC, SI), pp. 178–183.
CAV-2011-RamanK #behaviour #specification #using: Analyzing Unsynthesizable Specifications for High-Level Robot Behavior Using LTLMoP (VR, HKG), pp. 663–668.
CSL-2011-Kartzow #automaton #graph: A Pumping Lemma for Collapsible Pushdown Graphs of Level 2 (AK), pp. 322–336.
ICLP-J-2011-HallerstedeL #concurrent #constraints #specification: Constraint-based deadlock checking of high-level specifications (SH, ML), pp. 767–782.
ICST-2011-TakalaKH #android #case study #experience #modelling #testing #user interface: Experiences of System-Level Model-Based GUI Testing of an Android Application (TT, MK, JH), pp. 377–386.
SAT-2011-RyvchinS #performance #satisfiability: Faster Extraction of High-Level Minimal Unsatisfiable Cores (VR, OS), pp. 174–187.
SAT-2011-SpeckenmeyerWP #approach #graph #satisfiability: A Satisfiability-Based Approach for Embedding Generalized Tanglegrams on Level Graphs (ES, AW, SP), pp. 134–144.
ECSA-2010-ZhangUV #architecture #component #development: Architecture-Centric Component-Based Development Needs a Three-Level ADL (H(Z, CU, SV), pp. 295–310.
CASE-2010-BeyelerMN #automation #testing: Wafer-level inspection system for the automated testing of comb drive based MEMS sensors and actuators (FB, SM, BJN), pp. 698–703.
CASE-2010-VergnanoTLFPYBL #energy #optimisation #scheduling: Embedding detailed robot energy optimization into high-level scheduling (AV, CT, BL, PF, MP, CY, SB, FL), pp. 386–392.
DAC-2010-GajskiAS #question #synthesis #what: What input-language is the best choice for high level synthesis (HLS)? (DG, TMA, SS), pp. 857–858.
DAC-2010-GlassLHT #analysis #reliability #scalability #towards: Towards scalable system-level reliability analysis (MG, ML, CH, JT), pp. 234–239.
DAC-2010-KuoCTCL #approach #behaviour: Behavior-level yield enhancement approach for large-scaled analog circuits (CCK, YLC, ICT, LYC, CNJL), pp. 903–908.
DAC-2010-ObergHITSK #analysis #data flow: Theoretical analysis of gate level information flow tracking (JO, WH, AI, MT, TS, RK), pp. 244–247.
DAC-2010-TangZBM #analysis #simulation #statistics: RDE-based transistor-level gate simulation for statistical static timing analysis (QT, AZ, MB, NvdM), pp. 787–792.
DAC-2010-WeiMP #hardware #security: Gate-level characterization: foundations and hardware security applications (SW, SM, MP), pp. 222–227.
DATE-2010-BarrioMMHM #functional #synthesis #using: Using Speculative Functional Units in high level synthesis (AADB, MCM, JMM, RH, SOM), pp. 1779–1784.
DATE-2010-BashirM #process #reliability #towards: Towards a chip level reliability simulator for copper/low-k backend processes (MB, LSM), pp. 279–282.
DATE-2010-BerahaWCK #case study #design #requirements: Leveraging application-level requirements in the design of a NoC for a 4G SoC — a case study (RB, IW, IC, AK), pp. 1408–1413.
DATE-2010-DammMHG #modelling #network #simulation #transaction #using: Using Transaction Level Modeling techniques for wireless sensor network simulation (MD, JM, JH, CG), pp. 1047–1052.
DATE-2010-EconomakosXKS #component #configuration management #synthesis: Construction of dual mode components for reconfiguration aware high-level synthesis (GE, SX, IK, DS), pp. 1357–1360.
DATE-2010-HaquePJP #approach #embedded #named #performance #policy #simulation: DEW: A fast level 1 cache simulation approach for embedded processors with FIFO replacement policy (MSH, JP, AJ, SP), pp. 496–501.
DATE-2010-HsuYC #architecture #framework #refinement: An accurate system architecture refinement methodology with mixed abstraction-level virtual platform (ZMH, JCY, IYC), pp. 568–573.
DATE-2010-HwangSAG #modelling #transaction: Accurate timed RTOS model for transaction level modeling (YH, GS, SA, DDG), pp. 1333–1336.
DATE-2010-KrekuTV #automation #compilation #generative: Automatic workload generation for system-level exploration based on modified GCC compiler (JK, KT, GV), pp. 369–374.
DATE-2010-KrishnanDBK: Block-level bayesian diagnosis of analogue electronic circuits (SK, KDD, RB, HGK), pp. 1767–1772.
DATE-2010-PanYZS #approach #megamodelling #order #performance #reduction: An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits (XP, FY, XZ, YS), pp. 1673–1676.
DATE-2010-YuZQB #behaviour #design #power management: Behavioral level dual-vth design for reduced leakage power with thermal awareness (JY, QZ, GQ, JB), pp. 1261–1266.
DATE-2010-ZebeleinFHTD #modelling #network #performance: Efficient High-Level modeling in the networking domain (CZ, JF, CH, JT, RD), pp. 1189–1194.
ITiCSE-2010-EhlertS #comparison #object-oriented: Comparison of OOP first and OOP later: first results regarding the role of comfort level (AE, CS), pp. 108–112.
ITiCSE-2010-ForsterJ #approach #education #network: Hands-on approach to teaching wireless sensor networks at the undergraduate level (AF, MJ), pp. 284–288.
ITiCSE-2010-LappalainenIIK #agile #named #programming #testing: ComTest: a tool to impart TDD and unit testing to introductory level programming (VL, JI, VI, SK), pp. 63–67.
CSMR-2010-TothNJBF #impact analysis #named: CIASYS — Change Impact Analysis at System Level (GT, CN, JJ, ÁB, LJF), pp. 198–201.
ICPC-2010-Berman #architecture #comprehension #low level: Sound as an Aid in Understanding Low-Level Program Architecture (LB), pp. 58–59.
ICPC-2010-BeyerF #dependence #detection #low level #named: DepDigger: A Tool for Detecting Complex Low-Level Dependencies (DB, AF), pp. 40–41.
ICPC-2010-BeyerF10b #dependence #effectiveness #low level: A Simple and Effective Measure for Complex Low-Level Dependencies (DB, AF), pp. 80–83.
SCAM-2010-SahaAZRS #empirical: Evaluating Code Clone Genealogies at Release Level: An Empirical Study (RKS, MA, MFZ, CKR, KAS), pp. 87–96.
PLDI-2010-Chlipala #metaprogramming #named #static typing: Ur: statically-typed metaprogramming with type-level record computation (AC), pp. 122–133.
ILC-2010-YuasaY #low level #using #validation: Validating low-level instructions for fixnums using BDDs (SY, MY), pp. 11–20.
ICEIS-AIDSS-2010-VegettiLH #abstraction: A Three Level Abstraction Hierarchy to Represent Product Structural Information (MV, HPL, GPH), pp. 299–308.
CIKM-2010-BroderGJMMW #web: Exploiting site-level information to improve web search (AZB, EG, VJ, GM, DM, JW), pp. 1393–1396.
CIKM-2010-LiuTHJY #mining #network #topic: Mining topic-level influence in heterogeneous networks (LL, JT, JH, MJ, SY), pp. 199–208.
ICPR-2010-AkbasA #classification #image #low level #segmentation: Low-Level Image Segmentation Based Scene Classification (EA, NA), pp. 3623–3626.
ICPR-2010-Al-HuseinyMN #approach #set: Gait Learning-Based Regenerative Model: A Level Set Approach (MSAH, SM, MSN), pp. 2644–2647.
ICPR-2010-AvenelMP #probability #set: Stochastic Filtering of Level Sets for Curve Tracking (CA, ÉM, PP), pp. 3553–3556.
ICPR-2010-BanimahdE #distance #image #segmentation #set #using: Lip Segmentation Using Level Set Method: Fusing Landmark Edge Distance and Image Information (SRB, HE), pp. 2432–2435.
ICPR-2010-CardosoR #distance #estimation #music #robust: Robust Staffline Thickness and Distance Estimation in Binary and Gray-Level Music Scores (JSC, AR), pp. 1856–1859.
ICPR-2010-ChoPPKKALL #hybrid #segmentation #using: Level-Set Segmentation of Brain Tumors Using a New Hybrid Speed Function (WC, JP, SYP, SHK, SWK, GA, MEL, GL), pp. 1545–1548.
ICPR-2010-HanCR #categorisation #image #low level: Image Categorization by Learned Nonlinear Subspace of Combined Visual-Words and Low-Level Features (XHH, YWC, XR), pp. 3037–3040.
ICPR-2010-HarirchiRMDG #algorithm #detection #using: Two-Level Algorithm for MCs Detection in Mammograms Using Diverse-Adaboost-SVM (FH, PR, HAM, FD, MG), pp. 269–272.
ICPR-2010-HuYLS #3d #locality #multi #novel #using: A Novel Facial Localization for Three-dimensional Face Using Multi-level Partition of Unity Implicits (YH, JY, WL, PS), pp. 682–685.
ICPR-2010-InoueSSF #feature model #modelling #using: High-Level Feature Extraction Using SIFT GMMs and Audio Models (NI, TS, KS, SF), pp. 3220–3223.
ICPR-2010-KhalifaEGOE #image #segmentation: Shape-Appearance Guided Level-Set Deformable Model for Image Segmentation (FK, AEB, GLG, RO, MAEG), pp. 4581–4584.
ICPR-2010-KurugolODSB #3d #segmentation #set: Locally Deformable Shape Model to Improve 3D Level Set Based Esophagus Segmentation (SK, NO, JGD, GCS, DHB), pp. 3955–3958.
ICPR-2010-LiP #categorisation #effectiveness #image #multi #representation: Effective Multi-level Image Representation for Image Categorization (HL, YP), pp. 1048–1051.
ICPR-2010-LiZGHLZ #set: Discriminative Level Set for Contour Tracking (WL, XZ, JG, WH, HL, XZ), pp. 1735–1738.
ICPR-2010-LiZXCG #analysis #documentation #multi #sentiment: Exploiting Combined Multi-level Model for Document Sentiment Analysis (SL, HZ, WX, GC, JG), pp. 4141–4144.
ICPR-2010-Meyer: Levelings and Flat Zone Morphology (FM), pp. 1570–1573.
ICPR-2010-MezghaniPMLG #network #order: A Computer-Aided Method for Scoliosis Fusion Level Selection by a Topologicaly Ordered Self Organizing Kohonen Network (NM, PP, AM, HL, JAdG), pp. 4012–4015.
ICPR-2010-OliverTLM #automation #segmentation #set #using: Automatic Diagnosis of Masses by Using Level set Segmentation and Shape Description (AO, AT, XL, JM), pp. 2528–2531.
ICPR-2010-ParisG #challenge #multi: Pyramidal Multi-level Features for the Robot Vision@ICPR 2010 Challenge (SP, HG), pp. 2949–2952.
ICPR-2010-SoltanaACA #adaptation #algorithm #search-based #using: Adaptive Feature and Score Level Fusion Strategy Using Genetic Algorithms (WBS, MA, LC, CBA), pp. 4316–4319.
ICPR-2010-SuLY #recognition: Symbol Recognition Combining Vectorial and Pixel-Level Features for Line Drawings (FS, TL, RY), pp. 1892–1895.
ICPR-2010-Xie #segmentation #set #using: Level Set Based Segmentation Using Local Feature Distribution (XX), pp. 2780–2783.
KDD-2010-HendersonEFALMPT #approach #forensics #graph #metric #mining #multi: Metric forensics: a multi-level approach for mining volatile graphs (KH, TER, CF, LA, LL, KM, BAP, HT), pp. 163–172.
KR-2010-Masolo #comprehension #ontology: Understanding Ontological Levels (CM).
SEKE-2010-JarouchehLS #approach #as a service #flexibility #modelling #multi: A Model-driven Approach to Flexible Multi-Level Customization of SaaS Applications (ZJ, XL, SS), pp. 241–246.
SEKE-2010-LinsteadHLB #metric: Information-Theoretic Metrics for Project-Level Scattering and Tangling (EL, LH, CVL, PB), pp. 141–146.
SIGIR-2010-GopalY #classification #multi: Multilabel classification with meta-level features (SG, YY), pp. 315–322.
POPL-2010-RondonKJ #low level: Low-level liquid types (PMR, MK, RJ), pp. 131–144.
RE-2010-BittnerRGW #multi #requirements #using: Manufacturer-Supplier Requirements Synchronization Using Exchange Containers and Multi-Level Systems (MB, MOR, HG, MW), pp. 325–330.
REFSQ-2010-BittnerRW #case study #multi #product line #requirements: A Case Study on Tool-Supported Multi-level Requirements Management in Complex Product Families (MB, MOR, MW), pp. 173–187.
REFSQ-2010-SikoraDP #abstraction #consistency #multi #specification: Supporting the Consistent Specification of Scenarios across Multiple Abstraction Levels (ES, MD, KP), pp. 45–59.
SAC-2010-Makela #array #concept: Concept for providing guaranteed service level over an array of unguaranteed commodity connections (AM), pp. 678–683.
SAC-2010-NaceraHAM #ad hoc #clustering #network: A new two level hierarchy structuring for node partitioning in ad hoc networks (BN, HG, HA, MM), pp. 719–726.
SAC-2010-RodriguesNPM #parallel #thread: A new technique for data privatization in user-level threads and its use in parallel applications (ERR, POAN, JP, CLM), pp. 2149–2154.
SAC-2010-SamiF #estimation #metric: Design-level metrics estimation based on code metrics (AS, SMF), pp. 2531–2535.
SAC-2010-SardanaJ #network: Dual-level defense for networks under DDoS attacks (AS, RCJ), pp. 733–734.
ICSE-2010-CalikliBA #analysis #bias #developer #education #experience: An analysis of the effects of company culture, education and experience on confirmation bias levels of software developers and testers (GÇ, ABB, BA), pp. 187–190.
SLE-2010-AtkinsonKG #modelling: The Level-Agnostic Modeling Language (CA, BK, BG), pp. 266–275.
SPLC-2010-HoferEBSL #named: Leviathan: SPL Support on Filesystem Level (WH, CE, FB, WSP, DL), p. 491.
CGO-2010-BorinWWLBHNRR #named #optimisation: TAO: two-level atomicity for dynamic binary optimizations (EB, YW, CW, WL, MBJ, SH, EN, SR, RR), pp. 12–21.
CGO-2010-YuXHFZ #analysis #pointer #scalability: Level by level: making flow- and context-sensitive pointer analysis scalable for millions of lines of code (HY, JX, WH, XF, ZZ), pp. 218–229.
HPCA-2010-GenbruggeEE #abstraction #architecture #simulation: Interval simulation: Raising the level of abstraction in architectural simulation (DG, SE, LE), pp. 1–12.
HPDC-2010-JongCLPS #ad hoc #network: Storage deduplication for Virtual Ad Hoc Network testbed by File-level Block Sharing (CHJ, CYJC, TL, AP, CS), pp. 699–706.
HPDC-2010-KandemirMKS #multi: Computation mapping for multi-level storage cache hierarchies (MTK, SPM, MK, SWS), pp. 179–190.
LCTES-2010-PerathonerRTLR #analysis #modelling #performance: Modeling structured event streams in system level performance analysis (SP, TR, LT, KL, JR), pp. 37–46.
LCTES-2010-PykaKMM #approach #embedded #framework: Versatile system-level memory-aware platform description approach for embedded MPSoCs (RP, FK, PM, SM), pp. 9–16.
CAV-2010-ChatterjeeK #architecture #automation #communication #generative #induction #invariant #modelling: Automatic Generation of Inductive Invariants from High-Level Microarchitectural Models of Communication Fabrics (SC, MK), pp. 321–338.
CAV-2010-ConwayB #data type #implementation #low level #verification: Verifying Low-Level Implementations of High-Level Datatypes (CLC, CB), pp. 306–320.
ICLP-J-2010-Delgrande #approach #logic programming #semantics #set #source code: A program-level approach to revising logic programs under the answer set semantics (JPD), pp. 565–580.
VMCAI-2010-KreikerSV #analysis #c #low level: Shape Analysis of Low-Level C with Overlapping Structures (JK, HS, VV), pp. 214–230.
WICSA-ECSA-2009-AschauerDP #architecture #modelling #multi #towards: Towards a generic architecture for multi-level modeling (TA, GD, WP), pp. 121–130.
WICSA-ECSA-2009-BielG #architecture #towards #usability: Towards a Method for Analyzing Architectural Support Levels of Usability (BB, VG), pp. 273–276.
WICSA-ECSA-2009-RodriguezDCJ #adaptation #architecture #communication #configuration management #modelling #multi: A model-based multi-level architectural reconfiguration applied to adaptability management in context-aware cooperative communication support systems (IBR, KD, CC, MJ), pp. 353–356.
CASE-2009-BijulalVH #metric #simulation: Stability considerations and service level measures in production — inventory systems: a simulation study (DB, JV, NH), pp. 489–494.
CASE-2009-VazquezS #markov #modelling #performance #petri net: Performance control of Markovian Petri nets via fluid models: A stock-level control example (CRV, MS), pp. 30–36.
CASE-2009-WuS #heuristic #multi #problem: A new heuristic method for capacitated multi-level lot sizing problem with backlogging (TW, LS), pp. 483–488.
CASE-2009-ZiedSN #maintenance #probability #random: An optimal production/maintenance planning under stochastic random demand, service level and failure rate (ZH, SD, NR), pp. 292–297.
DAC-2009-ChatterjeeDB #simulation: Event-driven gate-level simulation with GP-GPUs (DC, AD, VB), pp. 557–562.
DAC-2009-ChengGSQH #modelling #variability: Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability (LC, PG, CJS, KQ, LH), pp. 104–109.
DAC-2009-ChouCK #synthesis: Handling don’t-care conditions in high-level synthesis and application for reducing initialized registers (HZC, KHC, SYK), pp. 412–415.
DAC-2009-CromarLC #algorithm #reduction: FPGA-targeted high-level binding algorithm for power and area reduction with glitch-estimation (SC, JL, DC), pp. 838–843.
DAC-2009-FujitaKG #debugging: Debugging from high level down to gate level (MF, YK, AMG), pp. 627–630.
DAC-2009-GargMMO #design #multi #perspective: Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective (SG, DM, RM, ÜYO), pp. 818–821.
DAC-2009-PotkonjakNNM #detection #hardware #using: Hardware Trojan horse detection using gate-level characterization (MP, AN, MN, TM), pp. 688–693.
DAC-2009-PuriHKCKMST #challenge: From milliwatts to megawatts: system level power challenge (RP, EH, SK, JC, TK, BDM, JS, AT), pp. 750–751.
DAC-2009-ReddiGSWBC #challenge #hardware #reliability #stack: Software-assisted hardware reliability: abstracting circuit-level challenges to the software stack (VJR, SC, MSG, MDS, GYW, DMB), pp. 788–793.
DAC-2009-ShinPS #synthesis #using: Register allocation for high-level synthesis using dual supply voltages (IS, SP, YS), pp. 937–942.
DAC-2009-SunNWS #composition #contract: Contract-based system-level composition of analog circuits (XS, PN, CCW, ALSV), pp. 605–610.
DAC-2009-WangH #approach #embedded #performance #simulation: An efficient approach for system-level timing simulation of compiler-optimized embedded software (ZW, AH), pp. 220–225.
DAC-2009-ZhangBDSJ #multi #process: Process variation characterization of chip-level multiprocessors (LZ, LSB, RPD, LS, RJ), pp. 694–697.
DATE-2009-BellasiFS #analysis #modelling #multi #power management #predict: Predictive models for multimedia applications power consumption based on use-case and OS level analysis (PB, WF, DS), pp. 1446–1451.
DATE-2009-BraunesS #generative: Generating the trace qualification configuration for MCDS from a high level language (JB, RGS), pp. 1560–1563.
DATE-2009-ChatterjeeDB #named #simulation: GCS: High-performance gate-level simulation with GPGPUs (DC, AD, VB), pp. 1332–1337.
DATE-2009-ChenL #design: Performance-driven dual-rail insertion for chip-level pre-fabricated design (FWC, YYL), pp. 308–311.
DATE-2009-DensmoreSDPS #design #evaluation #framework #using: UMTS MPSoC design evaluation using a system level design framework (DD, AS, AD, RP, ALSV), pp. 478–483.
DATE-2009-FacchiniCVPCDBM #3d #evaluation #mobile #performance: System-level power/performance evaluation of 3D stacked DRAMs for mobile applications (MF, TC, AV, MP, FC, WD, LB, PM), pp. 923–928.
DATE-2009-GargM #3d #analysis #process #variability: System-level process variability analysis and mitigation for 3D MPSoCs (SG, DM), pp. 604–609.
DATE-2009-GhermanECSB: System-level hardware-based protection of memories against soft-errors (VG, SE, MC, NS, YB), pp. 1222–1225.
DATE-2009-GoossensVN #debugging: A high-level debug environment for communication-centric debug (KG, BV, ABN), pp. 202–207.
DATE-2009-HolcombLS #analysis #design #fault: Design as you see FIT: System-level soft error analysis of sequential circuits (DEH, WL, SAS), pp. 785–790.
DATE-2009-JamaaMM #library #logic #multi #novel #synthesis: Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis (MHBJ, KM, GDM), pp. 622–627.
DATE-2009-KochteZIKRWCP #modelling #transaction #using #validation: Test exploration and validation using transaction level models (MAK, CGZ, MEI, RSK, MR, HJW, SDC, PP), pp. 1250–1253.
DATE-2009-KoelblJJP #equivalence: Solver technology for system-level to RTL equivalence checking (AK, RJ, HJ, CP), pp. 196–201.
DATE-2009-LiNZGSS #dependence #optimisation #protocol: Optimizations of an application-level protocol for enhanced dependability in FlexRay (WL, MDN, WZ, PG, ALSV, SAS), pp. 1076–1081.
DATE-2009-PaikSS #named #performance #synthesis: HLS-l: High-level synthesis of high performance latch-based circuits (SP, IS, YS), pp. 1112–1117.
DATE-2009-PengC #parallel #simulation: Parallel transistor level full-chip circuit simulation (HP, CKC), pp. 304–307.
DATE-2009-Perry #design #modelling #quality #synthesis: Model Based Design needs high level synthesis — A collection of high level synthesis techniques to improve productivity and quality of results for model based electronic design (SP), pp. 1202–1207.
DATE-2009-SchallenbergNHHO #configuration management #framework #modelling #synthesis: OSSS+R: A framework for application level modelling and synthesis of reconfigurable systems (AS, WN, AH, PAH, FO), pp. 970–975.
DATE-2009-ZridaJAA #implementation #parallel #video: High level H.264/AVC video encoder parallelization for multiprocessor implementation (HKZ, AJ, ACA, MA), pp. 940–945.
DocEng-2009-Hassan #analysis #documentation: Object-level document analysis of PDF files (TH), pp. 47–55.
ICDAR-2009-MoghaddamC #automation #classification #clustering #documentation #image #multi #word: Application of Multi-Level Classifiers and Clustering for Automatic Word Spotting in Historical Document Images (RFM, MC), pp. 511–515.
ICDAR-2009-MoghaddamRC #approach #classification #independence #multi #segmentation #set #using: Restoration and Segmentation of Highly Degraded Characters Using a Shape-Independent Level Set Approach and Multi-level Classifiers (RFM, DRH, MC), pp. 828–832.
ICDAR-2009-MoghaddamRYC #approach #documentation #framework #image #segmentation #set: A Unified Framework Based on the Level Set Approach for Segmentation of Unconstrained Double-Sided Document Images Suffering from Bleed-Through (RFM, DRH, IBY, MC), pp. 441–445.
ICDAR-2009-NtirogiannisGP #adaptation #documentation #image #logic: A Modified Adaptive Logical Level Binarization Technique for Historical Document Images (KN, BG, IP), pp. 1171–1175.
ICDAR-2009-PirloITS #classification #normalisation: Combination of Measurement-Level Classifiers: Output Normalization by Dynamic Time Warping (GP, DI, CAT, ES), pp. 416–420.
ICDAR-2009-SaundLS #documentation #image #named #user interface: PixLabeler: User Interface for Pixel-Level Labeling of Elements in Document Images (ES, JL, PS), pp. 646–650.
ICDAR-2009-WangJW #identification #performance: High Performance Chinese/English Mixed OCR with Character Level Language Identification (KW, JJ, QW), pp. 406–410.
ICDAR-2009-ZhangL #recognition #statistics: A Pixel-level Statistical Structural Descriptor for Shape Measure and Recognition (JZ, WL), pp. 386–390.
SIGMOD-2009-BrodskyBCEW #abstraction #database #programming #query: A decisions query language (DQL): high-level abstraction for mathematical programming over databases (AB, MMB, MC, NEE, XSW), pp. 1059–1062.
SIGMOD-2009-IsardY #distributed #programming language #using: Distributed data-parallel computing using a high-level programming language (MI, YY), pp. 987–994.
VLDB-2009-GatesNCKNORSS #data flow #experience #pipes and filters: Building a HighLevel Dataflow System on top of MapReduce: The Pig Experience (AG, ON, SC, PK, SN, CO, BR, SS, US), pp. 1414–1425.
VLDB-2009-XiaoTC #multi #privacy #random: Optimal Random Perturbation at Multiple Privacy Levels (XX, YT, MC), pp. 814–825.
CSEET-2009-McMeekinKCC #taxonomy #using: Evaluating Software Inspection Cognition Levels Using Bloom’s Taxonomy (DAM, BRvK, EC, DJAC), pp. 232–239.
ITiCSE-2009-HawthorneKCW #guidelines: Revised associate-level curricular guidelines in computer science (EKH, KJK, RDC, AMW), p. 374.
TACAS-2009-MateescuW #adaptation: Hierarchical Adaptive State Space Caching Based on Level Sampling (RM, AW), pp. 215–229.
ICPC-2009-KellyB #maintenance: An in-vivo study of the cognitive levels employed by programmers during software maintenance (TK, JB), pp. 95–99.
ICSM-2009-Li #analysis #dependence #identification #using: Identifying high-level dependence structures using slice-based dependence analysis (ZL), pp. 457–460.
SCAM-2009-AlikacemS #framework #metric: A Metric Extraction Framework Based on a High-Level Description Language (EHA, HAS), pp. 159–167.
WCRE-1999-BettenburgSIAZH99a #consistency #empirical: An Empirical Study on Inconsistent Changes to Code Clones at Release Level (NB, WS, WMI, BA, YZ, AEH), pp. 85–94.
WCRE-1999-Revelle99a #maintenance: Supporting Feature-Level Software Maintenance (MR), pp. 287–290.
CHI-2009-ZhengCLR #agile #correlation #image #low level #statistics #web: Correlating low-level image statistics with users — rapid aesthetic and affective judgments of web pages (XSZ, IC, JJWL, RR), pp. 1–10.
HCD-2009-PylaHPASH #case study #evaluation #experience #how: “How Do I Evaluate THAT?” Experiences from a Systems-Level Evaluation Effort (PSP, HRH, MAPQ, JDA, TLSJ, DH), pp. 292–301.
HCI-NT-2009-LeuteritzWK #multi #usability #validation: Multi-level Validation of the ISOmetrics Questionnaire Based on Qualitative and Quantitative Data Obtained from a Conventional Usability Test (JPL, HW, MK), pp. 304–313.
HCI-NT-2009-Rebolledo-MendezDMVFLG #assessment #detection #usability: Assessing NeuroSky’s Usability to Detect Attention Levels in an Assessment Exercise (GRM, ID, EMM, MDVC, SdF, FL, ARGG), pp. 149–158.
HCI-NT-2009-Sauro #modelling: Estimating Productivity: Composite Operators for Keystroke Level Modeling (JS), pp. 352–361.
HCI-VAD-2009-DoL #3d #artificial reality #game studies #multi: A Multiple-Level 3D-LEGO Game in Augmented Reality for Improving Spatial Ability (TVD, JWL), pp. 296–303.
HCI-VAD-2009-LinYYC #automation #interface: Allocating Human-System Interfaces Functions by Levels of Automation in an Advanced Control Room (CJL, CWY, TCY, LYC), pp. 741–750.
HIMI-II-2009-BaeLLCKB #estimation: An End-to-End Proactive TCP Based on Available Bandwidth Estimation with Congestion Level Index (SB, DL, CL, JC, JK, SB), pp. 124–130.
IDGD-2009-TranL #interface #question #research: Attention to Effects of Different Cross-Cultural Levels in User Research Method’s Interface: Discipline or Nationality — Which Has Stronger Force? (TTT, KPL), pp. 127–134.
EDOC-2009-DayKLL: Climbing the Ladder: CMMI Level 3 (BD, SCKZ, LL, CL), pp. 97–106.
ICEIS-ISAS-2009-EdgeSPC #compilation #policy #specification: Specifying and Compiling High Level Financial Fraud Policies into StreamSQL (MEE, PRFS, OP, MC), pp. 194–199.
ICEIS-ISAS-2009-MarkovicH #abstraction #modelling #process #towards: Towards Integrating Perspectives and Abstraction Levels in Business Process Modeling (IM, FH), pp. 286–291.
ICEIS-J-2009-LimaLO: Evaluating the Accessibility of Websites to Define Indicators in Service Level Agreements (STdL, FL, KMdO), pp. 858–869.
CIKM-2009-ChenLQZ #classification: Instance- and bag-level manifold regularization for aggregate outputs classification (SC, BL, MQ, CZ), pp. 1593–1596.
CIKM-2009-ZhengSWG #induction #performance: Efficient record-level wrapper induction (SZ, RS, JRW, CLG), pp. 47–56.
ECIR-2009-HalveyPHVHGJ #case study #difference #low level #metric #retrieval #using #video: Diversity, Assortment, Dissimilarity, Variety: A Study of Diversity Measures Using Low Level Features for Video Retrieval (MH, PP, DH, RV, FH, AG, JMJ), pp. 126–137.
KDD-2009-LeeHNW #clustering #query: Query result clustering for object-level search (JL, SwH, ZN, JRW), pp. 1205–1214.
KDD-2009-YangCWHZM #crawling #incremental #web: Incorporating site-level knowledge for incremental crawling of web forums: a list-wise strategy (JMY, RC, CW, HH, LZ, WYM), pp. 1375–1384.
KEOD-2009-GarridoR #assessment #information management #representation #requirements #validation: Knowledge Representation in Environmental Impact Assessment — A Case of Study with High Level Requirements in Validation (JG, IR), pp. 412–415.
KEOD-2009-HodickyF: Decision Support System for a Commander at the Operational Level (JH, PF), pp. 359–362.
MLDM-2009-LoglisciM #mining #multi: Mining Multiple Level Non-redundant Association Rules through Two-Fold Pruning of Redundancies (CL, DM), pp. 251–265.
SEKE-2009-SarkarCCB #concept #graph #multi #specification: Object Specification Language for Graph Based Conceptual level Multidimensional Data Model (AS, SC, NC, SB), pp. 694–607.
SIGIR-2009-BuscherED #comparison #eye tracking #feedback: Segment-level display time as implicit feedback: a comparison to eye tracking (GB, LvE, AD), pp. 67–74.
ICMT-2009-CuadradoJMB #navigation: Experiments with a High-Level Navigation Language (JSC, FJ, JGM, JB), pp. 229–238.
OOPSLA-2009-SongT #program transformation #programming #tool support: Enhancing source-level programming tools with an awareness of transparent program transformations (MS, ET), pp. 301–320.
TOOLS-EUROPE-2009-BruniV #generative #named #prototype #using #virtual machine: PyGirl: Generating Whole-System VMs from High-Level Prototypes Using PyPy (CB, TV), pp. 328–347.
PADL-2009-MouraRM #thread: High Level Thread-Based Competitive Or-Parallelism in Logtalk (PM, RR, SCM), pp. 107–121.
PADL-2009-Porto #database #interactive #logic programming #relational: High-Level Interaction with Relational Databases in Logic Programming (AP), pp. 152–167.
POPL-2009-ConditHLQ #low level #type checking: Unifying type checking and property checking for low-level code (JC, BH, SKL, SQ), pp. 302–314.
RE-2009-RegevHGW #modelling #perspective #requirements: Modeling Service-Level Requirements: A Constancy Perspective (GR, OH, DCG, AW), pp. 231–236.
SAC-2009-Al-SharifJ #debugging: An extensible source-level debugger (ZAS, CJ), pp. 543–544.
SAC-2009-BatistaR #ad hoc #framework #middleware #mobile #network #specification: High-level specification of a middleware framework for mobile ad hoc networks: spontaneousware case (VdFB, NSR), pp. 221–222.
SAC-2009-HeYAL #named #network: BPR: a bit-level packet recovery in wireless sensor networks (JH, JY, CA, XL), pp. 59–65.
SAC-2009-LiuMYGF #corpus #mining #probability: A sentence level probabilistic model for evolutionary theme pattern mining from news corpora (SL, YM, WGY, NG, OF), pp. 1742–1747.
SAC-2009-MartinsHM #image #multi #re-engineering #using: Super-resolution image reconstruction using the generalized isotropic multi-level logistic model (ALDM, MRPH, NDAM), pp. 934–938.
SAC-2009-MoserCT #embedded: Optimal service level allocation in environmentally powered embedded systems (CM, JJC, LT), pp. 1650–1657.
ESEC-FSE-2009-KrkaBEM #behaviour #component #modelling #specification: Synthesizing partial component-level behavior models from system specifications (IK, YB, GE, NM), pp. 305–314.
ASPLOS-2009-GuptaKU #named: DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings (AG, YK, BU), pp. 229–240.
CGO-2009-CollinB #embedded #taxonomy: Two-Level Dictionary Code Compression: A New Scheme to Improve Instruction Code Density of Embedded Applications (MC, MB), pp. 231–242.
HPCA-2009-HiltonNR #named: iCFP: Tolerating all-level cache misses in in-order processors (ADH, SN, AR), pp. 431–442.
HPCA-2009-LiRKHA #architecture #fault #hardware #modelling: Accurate microarchitecture-level fault modeling for studying hardware faults (MLL, PR, URK, SKSH, SVA), pp. 105–116.
HPDC-2009-DickensL #file system #library #named #performance: Y-lib: a user level library to increase the performance of MPI-IO in a lustre file system environment (PMD, JL), pp. 31–38.
LCTES-2009-McKechnieBV #debugging #monitoring #transaction: Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring (PEM, MB, WV), pp. 129–136.
PPoPP-2009-KejariwalC #analysis #concurrent #parallel #source code #thread: Parallelization spectroscopy: analysis of thread-level parallelism in hpc programs (AK, CC), pp. 293–294.
TAP-2009-Chetali #certification #formal method #security #smarttech #testing: Security Testing and Formal Methods for High Levels Certification of Smart Cards (BC), pp. 1–5.
VMCAI-2009-RakamaricH #low level #memory management #scalability: A Scalable Memory Model for Low-Level Code (ZR, AJH), pp. 290–304.
CBSE-2008-SeoMM #component #distributed #energy #estimation: Component-Level Energy Consumption Estimation for Distributed Java-Based Software Systems (CS, SM, NM), pp. 97–113.
WICSA-2008-SanzACM #architecture #development #modelling #process: Defining Service-Oriented Software Architecture Models for a MDA-based Development Process at the PIM level (MLS, CJA, CEC, EM), pp. 309–312.
CASE-2008-GiglioMSS #hybrid #optimisation: Optimization of inventory levels and production effort in Hybrid Inventory-Production (HIP) systems (DG, RM, SS, SS), pp. 8–15.
DAC-2008-KellerTK #challenge #modelling: Challenges in gate level modeling for delay and SI at 65nm and below (IK, KHT, VK), pp. 468–473.
DAC-2008-LiBNPC #approach #how #implementation #power management #set: How to let instruction set processor beat ASIC for low power wireless baseband implementation: a system level approach (ML, BB, DN, LVdP, FC), pp. 345–346.
DAC-2008-Ng #challenge #modelling #using #verification: Challenges in using system-level models for RTL verification (KN), pp. 812–815.
DAC-2008-RajaramP #design #robust #synthesis: Robust chip-level clock tree synthesis for SOC designs (AR, DZP), pp. 720–723.
DAC-2008-RajaVBG #analysis #modelling #performance: Transistor level gate modeling for accurate and fast timing, noise, and power analysis (SR, FV, MRB, JG), pp. 456–461.
DAC-2008-UrardMGC #equivalence: Leveraging sequential equivalence checking to enable system-level to RTL flows (PU, AM, RG, NC), pp. 816–821.
DATE-2008-AronsEOSS #low level #performance #simulation: Efficient Symbolic Simulation of Low Level Software (TA, EE, SO, JS, ES), pp. 825–830.
DATE-2008-BahukudumbiCK #scheduling: Test Scheduling for Wafer-Level Test-During-Burn-In of Core-Based SoCs (SB, KC, RK), pp. 1103–1106.
DATE-2008-ChakrabortySP #layout #optimisation: Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices (AC, SXS, DZP), pp. 849–855.
DATE-2008-ChattopadhyayCILAM #architecture #configuration management #modelling: High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures (AC, XC, HI, RL, GA, HM), pp. 1334–1339.
DATE-2008-CornetMM #development #modelling #performance #transaction: A Method for the Efficient Development of Timed and Untimed Transaction-Level Models of Systems-on-Chip (JC, FM, LMC), pp. 9–14.
DATE-2008-GargMK: A Single-supply True Voltage Level Shifter (RG, GM, SPK), pp. 979–984.
DATE-2008-HwangAG #approximate #estimation #performance #transaction: Cycle-approximate Retargetable Performance Estimation at the Transaction Level (YH, SA, DG), pp. 3–8.
DATE-2008-KazmierskiZA #approximate #mobile #modelling #performance #using: Efficient circuit-level modelling of ballistic CNT using piecewise non-linear approximation of mobile charge density (TJK, DZ, BMAH), pp. 146–151.
DATE-2008-LarssonLCEP #architecture #optimisation #scheduling: Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns (AL, EL, KC, PE, ZP), pp. 188–193.
DATE-2008-LeupersAVAV #architecture #design #multi: System-Level Design and Application Mapping for Wireless and Multimedia MPSoC Architectures (RL, GA, WV, TA, AV).
DATE-2008-LewickiPTDJ #design #prototype: A Virtual Prototype for Bluetooth over Ultra Wide Band System Level Design (AL, JdPP, JT, ED, GJ), pp. 804–807.
DATE-2008-LiNBPC #architecture #multi: Generic Multi-Phase Software-Pipelined Partial-FFT on Instruction-Level-Parallel Architectures and SDR Baseband Applications (ML, DN, BB, LVdP, FC), pp. 598–603.
DATE-2008-MarculescuN #architecture #challenge #design #variability: Design Variability: Challenges and Solutions at Microarchitecture-Architecture Level (DM, SRN).
DATE-2008-MeyerowitzSSL #multi #simulation: Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor (TM, ALSV, MS, DL), pp. 276–279.
DATE-2008-MostermanOSJKRCM #automation #embedded #functional #modelling: Automatically Realising Embedded Systems from High-Level Functional Models (PJM, DO, JS, AAJ, WK, VR, CGC, GM).
DATE-2008-MuirAL #automation #pipes and filters #streaming: Automated Dynamic Throughput-constrained Structural-level Pipelining in Streaming Applications (MM, TA, IL), pp. 1358–1361.
DATE-2008-NessL #design #fault tolerance #statistics: Guiding Circuit Level Fault-Tolerance Design with Statistical Methods (DCN, DJL), pp. 348–353.
DATE-2008-RadetzkiK #adaptation #modelling #simulation #transaction: Accuracy-Adaptive Simulation of Transaction Level Models (MR, RSK), pp. 788–791.
DATE-2008-VillarJGK #specification #using: Heterogeneous System-level Specification Using SystemC (EV, AJ, CG, TK).
DATE-2008-WangSX #framework #synthesis: A Variation Aware High Level Synthesis Framework (FW, GS, YX), pp. 1063–1068.
DATE-2008-ZhangHXL #fault #manycore #using: Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology (LZ, YH, QX, XL), pp. 891–896.
DATE-2008-ZhangYWYJX #correlation #performance #process #statistics: An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation (WZ, WY, ZW, ZY, RJ, JX), pp. 580–585.
DocEng-2008-IorioFVLW #abstraction #layout: Higher-level layout through topological abstraction (ADI, LF, FV, JWL, TW), pp. 90–99.
VLDB-2008-YehWYC #distributed #named #query: LeeWave: level-wise distribution of wavelet coefficients for processing kNN queries over distributed streams (MYY, KLW, PSY, MSC), pp. 586–597.
ITiCSE-2008-CaspersenCDPST #education #question #what: What is masters level education in informatics? (MEC, LNC, GD, AP, SS, HT), p. 341.
ITiCSE-2008-HawthorneKCW #guidelines: Computer science and information technology associate-level curricular guidelines (EKH, KJK, RDC, AMW), p. 350.
ITiCSE-2008-Jenkins #education #re-engineering: Teaching computer aided software engineering at the graduate level (MJ), pp. 63–67.
ITiCSE-2008-SalterD #logic #multi #scalability #using: Using DLSim 3: a scalable, extensible, multi-level logic simulator (RMS, JLD), p. 315.
ITiCSE-2008-TonderNC #development #lightweight #named #programming: Jenuity: a lightweight development environment for intermediate level programming courses (MvT, KN, CC), pp. 58–62.
SCAM-2008-Gomez-ZamalloaAP #composition #decompiler #low level #partial evaluation: Modular Decompilation of Low-Level Code by Partial Evaluation (MGZ, EA, GP), pp. 239–248.
WCRE-2008-SchauerK #comprehension: Integrative Levels of Program Comprehension (RS, RKK), pp. 145–154.
PEPM-2008-GillenwaterMSZTGO #hardware #static typing #using: Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability (JG, GM, CS, AYZ, WT, JG, JO), pp. 41–50.
PLDI-2008-FengSDG #hardware #low level #source code #thread: Certifying low-level programs with hardware interrupts and preemptive threads (XF, ZS, YD, YG), pp. 170–182.
FM-2008-ChetaliN #evaluation #formal method #industrial #security: Industrial Use of Formal Methods for a High-Level Security Evaluation (BC, QHN), pp. 198–213.
GT-VC-2007-Pennemann08 #algorithm #approximate #problem #satisfiability: An Algorithm for Approximating the Satisfiability Problem of High-level Conditions (KHP), pp. 75–94.
ICGT-2008-AzabH #source code: High-Level Programs and Program Conditions (KA, AH), pp. 211–225.
ICGT-2008-Pennemann #proving #theorem proving: Resolution-Like Theorem Proving for High-Level Conditions (KHP), pp. 289–304.
EDOC-2008-TserpesKMLCV #quality: Evaluating Quality Provisioning Levels in Service Oriented Business Environments (KT, DK, AM, AL, CC, TAV), pp. 309–315.
EDOC-2008-UngerLMS #process: Aggregation of Service Level Agreements in the Context of Business Processes (TU, FL, SM, TS), pp. 43–52.
CIKM-2008-ArvolaKJ #retrieval #xml: The effect of contextualization at different granularity levels in content-oriented xml retrieval (PA, JK, MJ), pp. 1491–1492.
ICML-2008-BryanS #learning: Actively learning level-sets of composite functions (BB, JGS), pp. 80–87.
ICML-2008-Corrada-EmmanuelS #estimation #fault #geometry #low level #precise: Autonomous geometric precision error estimation in low-level computer vision tasks (ACE, HJS), pp. 168–175.
ICML-2008-LanLQML #learning #rank: Query-level stability and generalization in learning to rank (YL, TYL, TQ, ZM, HL), pp. 512–519.
ICML-2008-Rosset #kernel: Bi-level path following for cross validated solution of kernel quantile regression (SR), pp. 840–847.
ICPR-2008-LathenJB #segmentation #set: Phase based level set segmentation of blood vessels (GL, JJ, MB), pp. 1–4.
ICPR-2008-TaEL #difference #equation #graph: Nonlocal morphological levelings by partial difference equations over weighted graphs (VTT, AE, OL), pp. 1–4.
ICPR-2008-XiaoCZ #correlation: Entropic thresholding based on gray-level spatial correlation histogram (YX, ZC, TZ), pp. 1–4.
KDD-2008-HwangKRZ #graph #mining: Bridging centrality: graph mining from element level to group level (WH, TK, MR, AZ), pp. 336–344.
RecSys-2008-Zanker #collaboration #constraints #recommendation: A collaborative constraint-based meta-level recommender (MZ), pp. 139–146.
SEKE-2008-CavalcantiFMCM #deployment #information management #process: Knowledge Management to Support the Deployment of a CMMI Level 3 Process (APCC, FF, VM, RC, SRdLM), pp. 309–314.
SEKE-2008-HudertLW #framework: Negotiating Service Levels — A Generic Negotiation Framework for WS Agreement (SH, HL, GW), pp. 587–592.
SIGIR-2008-BuscherDE #feedback #query #using: Query expansion using gaze-based feedback on the subdocument level (GB, AD, LvE), pp. 387–394.
SIGIR-2008-WangLZD #analysis #matrix #multi #semantics #summary #symmetry: Multi-document summarization via sentence-level semantic analysis and symmetric matrix factorization (DW, TL, SZ, CHQD), pp. 307–314.
MoDELS-2008-GutheilKA #approach #modelling #multi: A Systematic Approach to Connectors in a Multi-level Modeling Environment (MG, BK, CA), pp. 843–857.
MoDELS-2008-NugrohoFC #analysis #empirical #fault #modelling #uml: Empirical Analysis of the Relation between Level of Detail in UML Models and Defect Density (AN, BF, MRVC), pp. 600–614.
MoDELS-2008-GutheilKA #approach #modelling #multi: A Systematic Approach to Connectors in a Multi-level Modeling Environment (MG, BK, CA), pp. 843–857.
MoDELS-2008-NugrohoFC #analysis #empirical #fault #modelling #uml: Empirical Analysis of the Relation between Level of Detail in UML Models and Defect Density (AN, BF, MRVC), pp. 600–614.
TOOLS-EUROPE-2008-SteimannES #fault #testing #towards: Towards Raising the Failure of Unit Tests to the Level of Compiler-Reported Errors (FS, TEE, MS), pp. 60–79.
PADL-2008-BrasselHM #database #programming: High-Level Database Programming in Curry (BB, MH, MM), pp. 316–332.
PADL-2008-CasasCH #execution #implementation #independence #strict #towards: Towards a High-Level Implementation of Execution Primitives for Unrestricted, Independent And-Parallelism (AC, MC, MVH), pp. 230–247.
PADL-2008-MouraCN #multi #programming #thread: High-Level Multi-threading Programming in Logtalk (PM, PC, PN), pp. 265–281.
POPL-2008-MooreG #semantics #transaction: High-level small-step operational semantics for transactions (KFM, DG), pp. 51–62.
POPL-2008-NitaGC #bytecode #formal method #low level: A theory of platform-dependent low-level software (MN, DG, CC), pp. 209–220.
REFSQ-2008-GotelM #traceability: Macro-level Traceability Via Media Transformations (OG, SJM), pp. 129–134.
SAC-2008-CastelucioSZ #deployment: Evaluating the partial deployment of an AS-level IP traceback system (AOC, RMS, AZ), pp. 2069–2073.
SAC-2008-FuJE #multi: Multi-level biomedical ontology-enabled service broker for web-based interoperation (JF, FJ, RE), pp. 2341–2345.
SAC-2008-KeyvanpourA #approach #image #interactive #retrieval #semantics #using: A new approach for interactive semantic image retrieval using the high level semantics (MK, SA), pp. 1175–1179.
SAC-2008-SomeC #approach #case study #generative: An approach for supporting system-level test scenarios generation from textual use cases (SSS, XC), pp. 724–729.
SAC-2008-WendtGSWNM #analysis #mobile #optimisation #smarttech: System level power profile analysis and optimization for smart cards and mobile devices (MW, MG, CS, RW, UN, AM), pp. 1884–1888.
ICSE-2008-Freund #integration: Mulit-level system integration based on AUTOSAR (UF), pp. 581–582.
ASPLOS-2008-RaghavendraRTWZ #coordination #multi #power management: No “power” struggles: coordinated multi-level power management for the data center (RR, PR, VT, ZW, XZ), pp. 48–59.
CC-2008-NitaG #automation #c #multi: Automatic Transformation of Bit-Level C Code to Support Multiple Equivalent Data Layouts (MN, DG), pp. 85–99.
CGO-2008-HosteE #compilation #named #optimisation: Cole: compiler optimization level exploration (KH, LE), pp. 165–174.
HPCA-2008-KimGWB #analysis #performance #using: System level analysis of fast, per-core DVFS using on-chip switching regulators (WK, MSG, GYW, DMB), pp. 123–134.
HPCA-2008-MalikASWF #independence #parallel #predict: Branch-mispredict level parallelism (BLP) for control independence (KM, MA, SSS, KMW, MIF), pp. 62–73.
HPCA-2008-RashidH #concurrent #parallel #source code #thread: Supporting highly-decoupled thread-level redundancy for parallel programs (MWR, MCH), pp. 393–404.
HPCA-2008-RogersYCPS #distributed #memory management #multi: Single-level integrity and confidentiality protection for distributed shared memory multiprocessors (BR, CY, SC, MP, YS), pp. 161–172.
HPCA-2008-WangC #clustering #feedback #optimisation #performance: Cluster-level feedback power control for performance optimization (XW, MC), pp. 101–110.
HPCA-2008-ZhongMLM #parallel: Uncovering hidden loop level parallelism in sequential applications (HZ, MM, SAL, SAM), pp. 290–301.
HPDC-2008-PasqualiBCRL #scalability: A two-level scheduler to dynamically schedule a stream of batch jobs in large-scale grids (MP, RB, GC, LR, DL), pp. 231–232.
ISMM-2008-ChinNPQ #bound #low level #memory management #source code: Analysing memory resource bounds for low-level programs (WNC, HHN, CP, SQ), pp. 151–160.
OSDI-2008-GuoWTLXWKZ #kernel #named: R2: An Application-Level Kernel for Record and Replay (ZG, XW, JT, XL, ZX, MW, MFK, ZZ), pp. 193–208.
OSDI-2008-YuIFBEGC #distributed #named #using: DryadLINQ: A System for General-Purpose Distributed Data-Parallel Computing Using a High-Level Language (YY, MI, DF, MB, ÚE, PKG, JC), pp. 1–14.
PPoPP-2008-BaskaranBKRRS #architecture #automation #data flow #parallel: Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories (MMB, UB, SK, JR, AR, PS), pp. 1–10.
PPoPP-2008-HoustonPRKFADH #interface #memory management #multi #runtime: A portable runtime interface for multi-level memory hierarchies (MH, JYP, MR, TJK, KF, AA, WJD, PH), pp. 143–152.
PPoPP-2008-WangYFDWJ #analysis #automation #source code: Automated application-level checkpointing based on live-variable analysis in MPI programs (PW, XY, HF, YD, ZW, JJ), pp. 273–274.
PPoPP-2008-ZhaiWYH #compilation #concurrent #optimisation #thread: Compiler optimizations for parallelizing general-purpose applications under thread-level speculation (AZ, SW, PCY, GH), pp. 271–272.
CAV-2008-Bjesse #approach #industrial #model checking #word: A Practical Approach to Word Level Model Checking of Industrial Netlists (PB), pp. 446–458.
CAV-2008-KimJRSPKS #analysis #random #simulation: Application of Formal Word-Level Analysis to Constrained Random Simulation (HK, HJ, KR, PS, JP, RPK, FS), pp. 487–490.
CAV-2008-KunduLG #synthesis #validation: Validating High-Level Synthesis (SK, SL, RG), pp. 459–472.
ICLP-2008-CasasCH #implementation #independence #nondeterminism #strict: A High-Level Implementation of Non-deterministic, Unrestricted, Independent And-Parallelism (AC, MC, MVH), pp. 651–666.
ICLP-2008-SzymanekL #constraints: Constraint-Level Advice for Shaving (RS, CL), pp. 636–650.
IJCAR-2008-BeierleKK #automation #implementation #reasoning: A High-Level Implementation of a System for Automated Reasoning with Default Rules (System Description) (CB, GKI, NK), pp. 147–153.
ISSTA-2008-PasareanuMBGLPP #execution #symbolic computation #testing: Combining unit-level symbolic execution and system-level concrete execution for testing NASA software (CSP, PCM, DHB, KGB, MRL, SP, MP), pp. 15–26.
CBSE-2007-PadillaOO #component #composition #modelling #testing: An Execution-Level Component Composition Model Based on Component Testing Information (GP, CMdO, CLO), pp. 203–210.
QoSA-2007-RoshandelMG #architecture #predict #reliability: A Bayesian Model for Predicting Reliability of Software Systems at the Architectural Level (RR, NM, LG), pp. 108–126.
ASE-2007-Alexander #design #named: Rosetta: language support for system-level design (PA), p. 577.
ASE-2007-AndrewsLM #generative #named #testing: Nighthawk: a two-level genetic-random unit test data generator (JHA, FCHL, TM), pp. 144–153.
CASE-2007-ZhuangXZD #multi #optimisation #set: Von Mises Stress and Level Set Method based Structural Topology Optimization with Multi-phase Materials (CZ, ZX, XZ, HD), pp. 945–949.
DAC-2007-AksoyCFM #metric #optimisation #using: Optimization of Area in Digital FIR Filters using Gate-Level Metrics (LA, EACdC, PFF, JCM), pp. 420–423.
DAC-2007-BobrekPT #modelling #resource management: Shared Resource Access Attributes for High-Level Contention Models (AB, JMP, DET), pp. 720–725.
DAC-2007-ChangHK #design #performance: Endurance Enhancement of Flash-Memory Storage, Systems: An Efficient Static Wear Leveling Design (YHC, JWH, TWK), pp. 212–217.
DAC-2007-CoptyJKV #approach #generative #novel #testing: Intelligent Interleaving of Scenarios: A Novel Approach to System Level Test Generation (SC, IJ, YK, MV), pp. 891–895.
DAC-2007-IwataYF: A DFT Method for Time Expansion Model at Register Transfer Level (HI, TY, HF), pp. 682–687.
DAC-2007-JooCSC #energy #memory management #multi: Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory (YJ, YC, DS, NC), pp. 716–719.
DAC-2007-MathurK #design #modelling #verification: Design for Verification in System-level Models and RTL (AM, VK), pp. 193–198.
DAC-2007-TibboelRKA #design #functional: System-Level Design Flow Based on a Functional Reference for HW and SW (WHT, VR, MK, DA), pp. 23–28.
DAC-2007-VenkataramaniBCG #analysis: Global Critical Path: A Tool for System-Level Timing Analysis (GV, MB, TC, SCG), pp. 783–786.
DAC-2007-WangLP #design #megamodelling: Parameterized Macromodeling for Analog System-Level Design Exploration (JW, XL, LTP), pp. 940–943.
DATE-2007-BriereGBNMGO #assessment #framework: System level assessment of an optical NoC in an MPSoC platform (MB, BG, YB, GN, FM, FG, IO), pp. 1084–1089.
DATE-2007-ButtSRPS #optimisation #synthesis: System level clock tree synthesis for power optimization (SAB, SS, JR, AP, ES), pp. 1677–1682.
DATE-2007-EckerESVH #framework #implementation #interactive #transaction: Interactive presentation: Implementation of a transaction level assertion framework in SystemC (WE, VE, TS, MV, MH), pp. 894–899.
DATE-2007-GailliardNSV #modelling #transaction: Transaction level modelling of SCA compliant software defined radio waveforms and platforms PIM/PSM (GG, EN, MS, FV), pp. 966–971.
DATE-2007-GargM #analysis #design #interactive #multi #process #throughput: Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs (SG, DM), pp. 403–408.
DATE-2007-GongW #interactive #optimisation: Interactive presentation: System level power optimization of Sigma-Delta modulator (FG, XW), pp. 297–300.
DATE-2007-HashempourL #detection #fault #modelling: Circuit-level modeling and detection of metallic carbon nanotube defects in carbon nanotube FETs (HH, FL), pp. 841–846.
DATE-2007-IndrusiakTG #behaviour #execution #interactive #modelling #specification #uml: Interactive presentation: Executable system-level specification models containing UML-based behavioral patterns (LSI, AT, MG), pp. 301–306.
DATE-2007-KroeningS #image #interactive #proving #refinement #using #word: Interactive presentation: Image computation and predicate refinement for RTL verilog using word level proofs (DK, NS), pp. 1325–1330.
DATE-2007-KurraSP #synthesis: The impact of loop unrolling on controller delay in high level synthesis (SK, NKS, PRP), pp. 391–396.
DATE-2007-MarianiBC #design #using: Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508 (RM, GB, FC), pp. 492–497.
DATE-2007-MolinaRMH #multi #optimisation #synthesis: Area optimization of multi-cycle operators in high-level synthesis (MCM, RRS, JMM, RH), pp. 449–454.
DATE-2007-Naumann #design #evolution #question: Keynote address: Was Darwin wrong? Has design evolution stopped at the RTL level... or will software and custom processors (or system-level design) extend Moore’s law? (AN), p. 2.
DATE-2007-NepalBMPZ #design #interactive #multi: Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits (KN, RIB, JLM, WRP, AZ), pp. 576–581.
DATE-2007-OstlerC #architecture #network: An ILP formulation for system-level application mapping on network processor architectures (CO, KSC), pp. 99–104.
DATE-2007-RaoOK #fault tolerance #interactive #logic: Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs (WR, AO, RK), pp. 865–869.
DATE-2007-ReshadiG #architecture #embedded #low level #programming: Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems (MR, DG), pp. 1337–1342.
DATE-2007-SchamannHLB #algorithm #architecture #case study #design #power management: Low power design on algorithmic and architectural level: a case study of an HSDPA baseband digital signal processing system (MS, SH, UL, MB), pp. 1406–1411.
DATE-2007-SirowyWLV #clustering: Two-level microprocessor-accelerator partitioning (SS, YW, SL, FV), pp. 313–318.
DATE-2007-WangY #fault #synthesis #testing: High-level test synthesis for delay fault testability (SJW, THY), pp. 45–50.
DATE-2007-ZjajoAG #interactive #monitoring #parametricity #process: Interactive presentation: BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuits (AZ, MJBA, JPdG), pp. 1301–1306.
ICDAR-2007-JlaielKAM #difference: Three decision levels strategy for Arabic and Latin texts differentiation in printed and handwritten natures (MBJ, SK, AMA, RM), pp. 1103–1107.
ICDAR-2007-KumarJ #documentation #image #scalability: Content-level Annotation of Large Collection of Printed Document Images (AK, CVJ), pp. 799–803.
SIGMOD-2007-CastroMA #abstraction #framework #programming: ADO.NET entity framework: raising the level of abstraction in data programming (PC, SM, AA), pp. 1070–1072.
ITiCSE-2007-GorraLC #assessment #database #student: An account of the use of synoptic assessment for students in the area of databases at level 2 (AG, SL, JC), p. 334.
ESOP-2007-BuscemiM #constraints #named #specification: CC-Pi: A Constraint-Based Language for Specifying Service Level Agreements (MGB, UM), pp. 18–32.
ESOP-2007-ConditHAGN #dependent type #low level #programming: Dependent Types for Low-Level Programming (JC, MH, ZRA, DG, GCN), pp. 520–535.
TACAS-2007-ChatterjeeLQR #bytecode #low level #reachability: A Reachability Predicate for Analyzing Low-Level Software (SC, SKL, SQ, ZR), pp. 19–33.
ICSM-2007-DongG #analysis #dependence #object-oriented: System-level Usage Dependency Analysis of Object-Oriented Systems (XD, MWG), pp. 375–384.
SCAM-2007-Krinke #metric #visualisation: Statement-Level Cohesion Metrics and their Visualization (JK), pp. 37–48.
WCRE-2007-SchaferAMMO #clustering #framework #generative: Clustering for Generating Framework Top-Level Views (TS, IA, MM, MM, KO), pp. 239–248.
PLDI-2007-LiZ #concurrent #evaluation #implementation #monad #network #scalability #thread: Combining events and threads for scalable network services implementation and evaluation of monadic, application-level concurrency primitives (PL, SZ), pp. 189–199.
ICFP-2007-NystromTK #distributed: Evaluating high-level distributed language constructs (JHN, PWT, DJK), pp. 203–212.
GT-VMT-2007-BisztrayH #csp #process #using #verification: Rule-Level Verification of Business Process Transformations using CSP (DB, RH).
CHI-2007-HolleisOHS #interactive #mobile: Keystroke-level model for advanced mobile phone interaction (PH, FO, HH, AS), pp. 1505–1514.
CHI-2007-PettittBS #information management #predict #visual notation: An extended keystroke level model (KLM) for predicting the visual demand of in-vehicle information systems (MP, GEB, AS), pp. 1515–1524.
DHM-2007-DionysiouSM #biology #image #multi #simulation: Simulating Cancer Radiotherapy on a Multi-level Basis: Biology, Oncology and Image Processing (DDD, GSS, KM), pp. 569–575.
DHM-2007-MaglaverasC #simulation: Methodologies to Evaluate Simulations of Cardiac Tissue Abnormalities at a Cellular Level (NM, IC), pp. 694–702.
DHM-2007-MariasDSZGMMT #analysis #information management #modelling #multi #validation: Multi-level Analysis and Information Extraction Considerations for Validating 4D Models of Human Function (KM, DDD, GSS, FZ, ECG, TM, TGM, IGT), pp. 703–709.
HCI-AS-2007-MorDML #approach #behaviour: A Three-Level Approach for Analyzing User Behavior in Ongoing Relationships (EM, MGD, JM, SL), pp. 971–980.
HCI-IDU-2007-KantolaJ #case study #requirements #usability: Determining High Level Quantitative Usability Requirements: A Case Study (NK, TJ), pp. 536–543.
HCI-IDU-2007-LewandowskiLB #component #composition #modelling: Tasks Models Merging for High-Level Component Composition (AL, SL, GB), pp. 1129–1138.
HCI-IPT-2007-ChoiY #multi #named #network: MKPS: A Multi-level Key Pre-distribution Scheme for Secure Wireless Sensor Networks (SJC, HYY), pp. 808–817.
HCI-MIE-2007-ChangKP #constraints #evolution #set #using: Lip Contour Extraction Using Level Set Curve Evolution with Shape Constraint (JSC, EYK, SHP), pp. 583–588.
HCI-MIE-2007-LeePL #finite #multi #recognition #transducer: Multi-word Expression Recognition Integrated with Two-Level Finite State Transducer (KL, KSP, YSL), pp. 124–133.
HCI-MIE-2007-TakashimaT #behaviour #low level #video: Sharing Video Browsing Style by Associating Browsing Behavior with Low-Level Features of Videos (AT, YT), pp. 518–526.
HIMI-IIE-2007-ParkCHNPCJ #artificial reality #navigation: Disposition of Information Entities and Adequate Level of Information Presentation in an In-Car Augmented Reality Navigation System (KSP, IHC, GBH, TJN, JYP, SIC, IHJ), pp. 1098–1108.
HIMI-IIE-2007-Quraishy #case study #design #health #how #implementation #information management: How Participation at Different Hierarchical Levels Can Have an Impact on the Design and Implementation of Health Information Systems at the Grass Root Level — A Case Study from India (ZBQ), pp. 128–136.
AdaEurope-2007-SinghoffP #ada #empirical #library #towards: Towards User-Level Extensibility of an Ada Library: An Experiment with Cheddar (FS, AP), pp. 180–191.
CAiSE-2007-CappielloCP #automation #generative #on the #web #web service: On Automated Generation of Web Service Level Agreements (CC, MC, PP), pp. 264–278.
EDOC-2007-Hsueh #adaptation: Adaptive Service Level Management (MCH), pp. 451–458.
ICEIS-AIDSS-2007-Cebulla #coordination #reasoning #semantics #specification #towards: Reactive Commonsense Reasoning — Towards Semantic Coordination with High-Level Specifications (MC), pp. 113–118.
ICEIS-DISI-2007-BergamaschiOGS #metadata: Relevant values: New metadata to provide insight on attribute values at schema level (SB, MO, FG, CS), pp. 274–279.
ICEIS-SAIC-2007-BoukadiGMB #petri net #specification #using #verification #web #web service: Specification and Verification of Views over Composite Web Services Using High Level Petri-Nets (KB, CG, ZM, DB), pp. 107–112.
ICEIS-SAIC-2007-KirikovaSGO #abstraction #analysis #flexibility #process: Analysis of Business Process Flexibility at Different Levels of Abstraction (MK, RS, JG, JO), pp. 389–396.
ECIR-2007-CasanovaQB #comparison #multi #retrieval #standard: Overall Comparison at the Standard Levels of Recall of Multiple Retrieval Methods with the Friedman Test (JMC, MAPQ, AB), pp. 682–685.
ECIR-2007-MeenaP #analysis #sentiment #using: Sentence Level Sentiment Analysis in the Presence of Conjuncts Using Linguistic Analysis (AM, TVP), pp. 573–580.
ICML-2007-LeeCVK #learning #multi: Learning a meta-level prior for feature relevance from multiple related tasks (SIL, VC, DV, DK), pp. 489–496.
SEKE-2007-ComanS #empirical #low level #process: An Empirical Exporatory Study on Inferring Developpers’ Activities from Low-Level Data (IDC, AS), pp. 15–18.
SEKE-2007-CoxZO #data transfer: A Tag-Level Web-Caching Scheme for Reducing Redundant Data Transfers (SEC, DZ, JO), p. 274–?.
SEKE-2007-GokhaleL #detection #multi: Multi-level Anomaly Detection with Application-Level Data (SSG, JL), p. 718–?.
SEKE-2007-SotoVPP #architecture #information management #multi: A Three Level Multi-agent Architecture to Foster Knowledge Exchange (JPS, AV, JPR, MP), pp. 565–569.
MoDELS-2007-JacksonS #reasoning: Constructive Techniques for Meta- and Model-Level Reasoning (EKJ, JS), pp. 405–419.
MoDELS-2007-JacksonS #reasoning: Constructive Techniques for Meta- and Model-Level Reasoning (EKJ, JS), pp. 405–419.
ECOOP-2007-DoorenS #abstraction #inheritance #using: A Higher Abstraction Level Using First-Class Inheritance Relations (MvD, ES), pp. 425–449.
OOPSLA-2007-KuhneS #multi #programming: Can programming be liberated from the two-level style: multi-level programming with deepjava (TK, DS), pp. 229–244.
SAC-2007-ArnautovicKFPS #communication #specification #towards: Gradual transition towards autonomic software systems based on high-level communication specification (EA, HK, JF, RP, AS), pp. 84–89.
SAC-2007-Chang #on the #performance #scalability: On efficient wear leveling for large-scale flash-memory storage systems (LPC), pp. 1126–1130.
SAC-2007-PereraGB #low level #using #visualisation: Preattentive processing: using low-level vision psychology to encode information in visualisations (NP, AG, KB), pp. 1090–1091.
ESEC-FSE-2007-Coman #analysis #automation #developer #low level #using: An analysis of developers’ tasks using low-level, automatically collected data (IDC), pp. 579–582.
ESEC-FSE-2007-MiranskyyMGDWG #approach #execution #multi #scalability: An iterative, multi-level, and scalable approach to comparing execution traces (AVM, NHM, MG, MD, MW, DG), pp. 537–540.
ICSE-2007-JanzenS #agile #development #testing: A Leveled Examination of Test-Driven Development Acceptance (DJ, HS), pp. 719–722.
HPCA-2007-EyermanE #parallel #policy #smt: A Memory-Level Parallelism Aware Fetch Policy for SMT Processors (SE, LE), pp. 240–249.
HPCA-2007-LiY #correctness #fault tolerance: Application-Level Correctness and its Impact on Fault Tolerance (XL, DY), pp. 181–192.
LCTES-2007-ChoAG #interface #manycore #modelling #synthesis #transaction: Interface synthesis for heterogeneous multi-core systems from transaction level models (HC, SA, DG), pp. 140–142.
CAV-2007-GopanR #analysis #library #low level #summary: Low-Level Library Analysis and Summarization (DG, TWR), pp. 68–81.
CAV-2007-GulwaniT #abstract domain #bytecode #low level: An Abstract Domain for Analyzing Heap-Manipulating Low-Level Software (SG, AT), pp. 379–392.
CAV-2007-ManoliosSV #analysis #named: BAT: The Bit-Level Analysis Tool (PM, SKS, DV), pp. 303–306.
ASE-2006-GrundyHZL #editing #generative #specification #visual notation: Generating Domain-Specific Visual Language Editors from High-level Tool Specifications (JCG, JGH, NZ, NL), pp. 25–36.
ASE-2006-LaurentSW #automation #constraints #functional #generative #specification #testing: A methodology for automated test generation guided by functional coverage constraints at specification level (OL, CS, VW), pp. 285–288.
CASE-2006-KwokHLF #image #multi #optimisation #using: Intensity-Preserving Contrast Enhancement for Gray-Level Images using Multi-objective Particle Swarm Optimization (NMK, QPH, DL, GF), pp. 21–26.
CASE-2006-LiLWC #automation #component #equation #generative #graph #linear #using: Automatic Generation of Component-level Dynamic Equations Using Extensible Element Linear Graph Method (YL, ZL, HW, YC), pp. 118–123.
CASE-2006-SaiK #automation #reliability: Highly Reliable and Accurate Level Radar for Automated Legal Custody Transfer and Inventory Management (BS, BK), pp. 346–350.
CASE-2006-TranNKHF #approach #low level #robust: Sliding Mode-PID Approach for Robust Low-level Control of a UGV (THT, MTN, NMK, QPH, GF), pp. 672–677.
DAC-2006-ChoCCV #cost analysis #embedded #energy #power management: High-level power management of embedded systems with application-specific energy cost functions (YC, NC, CC, SBKV), pp. 568–573.
DAC-2006-FengH #equivalence #verification: Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification (XF, AJH), pp. 1063–1068.
DAC-2006-FlakeDS #design #tool support: System-level exploration tools for MPSoC designs (PF, SJD, FS), pp. 286–287.
DAC-2006-GuptaGP #agile #estimation #specification: Rapid estimation of control delay from high-level specifications (GRG, MG, PRP), pp. 455–458.
DAC-2006-KlingaufGBPB #modelling #named #transaction: GreenBus: a generic interconnect fabric for transaction level modelling (WK, RG, OB, PP, MB), pp. 905–910.
DAC-2006-MandrekarBSES #analysis: System level signal and power integrity analysis methodology for system-in-package applications (RM, KB, KS, EE, MS), pp. 1009–1012.
DAC-2006-Swan #modelling #transaction #verification: SystemC transaction level models and RTL verification (SS), pp. 90–92.
DAC-2006-TanimotoYNH #realtime #using: A real time budgeting method for module-level-pipelined bus based system using bus scenarios (TT, SY, AN, TH), pp. 37–42.
DATE-2006-AhmedM #design #performance #uml #using: Faster exploration of high level design alternatives using UML for better partitions (WA, DM), pp. 579–580.
DATE-2006-BeltrameSSLP #simulation: Exploiting TLM and object introspection for system-level simulation (GB, DS, CS, DL, CP), pp. 100–105.
DATE-2006-DensmoreDS #analysis #architecture #performance: FPGA architecture characterization for system level performance analysis (DD, AD, ALSV), pp. 734–739.
DATE-2006-KastnerGHBKBS #communication #layout #optimisation #synthesis: Layout driven data communication optimization for high level synthesis (RK, WG, XH, FB, AK, PB, MS), pp. 1185–1190.
DATE-2006-KempfKWALM #estimation #fine-grained #framework #performance #using: A SW performance estimation framework for early system-level-design using fine-grained instrumentation (TK, KK, SW, GA, RL, HM), pp. 468–473.
DATE-2006-KunzliPBT #analysis #formal method #performance #simulation: Combining simulation and formal methods for system-level performance analysis (SK, FP, LB, LT), pp. 236–241.
DATE-2006-Maurer #simulation #symmetry #using: Using conjugate symmetries to enhance gate-level simulations (PMM), pp. 638–643.
DATE-2006-PanditKMP #hardware #higher-order #synthesis: High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count (SP, SK, CAM, AP), pp. 1203–1204.
DATE-2006-PatelSB #behaviour #design: Heterogeneous behavioral hierarchy for system level designs (HDP, SKS, RAB), pp. 565–570.
DATE-2006-ReyesKBAN #case study #design #modelling #simulation: A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study (VR, WK, TB, GA, AN), pp. 474–479.
DATE-2006-SchirnerD #analysis #modelling #transaction: Quantitative analysis of transaction level models for the AMBA bus (GS, RD), pp. 230–235.
DATE-2006-WildHO #architecture #evaluation #performance #simulation #transaction #using: Performance evaluation for system-on-chip architectures using trace-based transaction level simulation (TW, AH, RO), pp. 248–253.
DATE-2006-YiNMKAL #configuration management #scheduling: System-level scheduling on instruction cell based reconfigurable systems (YY, IN, MM, SK, TA, IL), pp. 381–386.
DocEng-2006-GodlewskiPS #recognition: Application of syntactic properties to three-level recognition of polish hand-written medical texts (GG, MP, JS), pp. 115–121.
DRR-2006-RahmanTHA #automation #documentation #enterprise #web: An automatically updateable web publishing solution: taking document sharing and conversion to enterprise level (FR, YT, RH, HA).
CSEET-2006-ComerE #development #evaluation #process #student: Students Managing the Software Development Process: A Meta-Level Retrospective Evaluation (AC, HME), pp. 167–174.
ITiCSE-2006-BiancoT: One step further the ACM K-12 final report: a proposal for level 1: computer organization for K-8 (GMB, ST), pp. 207–211.
ITiCSE-2006-Joyce: Educating computing professionals at postgraduate level (DJ), p. 315.
ITiCSE-2006-PerrenetK #abstraction #algorithm #comprehension #concept #perspective #student: Levels of abstraction in students’ understanding of the concept of algorithm: the qualitative perspective (JP, EK), pp. 270–274.
CSMR-2006-Rysselberghe #version control: Reconstructing Higher Level Change Information from Versioning Data (FVR), pp. 331–333.
ICPC-2006-RooverMGGD #approach #behaviour #documentation #lightweight #verification: An Approach to High-Level Behavioral Program Documentation Allowing Lightweight Verification (CDR, IM, KG, KG, TD), pp. 202–211.
ICSM-2006-HouH #c++ #semantics: Source-Level Linkage: Adding Semantic Information to C++ Fact-bases (DH, HJH), pp. 448–457.
ICSM-2006-NeginhalK #c #comprehension #graph #reduction: Event Views and Graph Reductions for Understanding System Level C Code (SN, SK), pp. 279–288.
PEPM-2006-RepsBL #low level: Intermediate-representation recovery from low-level code (TWR, GB, JL), pp. 100–111.
PEPM-2006-ThompsonM #partial evaluation: Bit-level partial evaluation of synchronous circuits (ST, AM), pp. 29–37.
SAS-2006-ChangHN #analysis #low level #using: Analysis of Low-Level Code Using Cooperating Decompilers (BYEC, MH, GCN), pp. 318–335.
SAS-2006-Yang #analysis #low level: Shape Analysis for Low-Level Code (HY), p. 280.
STOC-2006-Feldman #approximate #learning #logic #query: Hardness of approximate two-level logic minimization and PAC learning with membership queries (VF), pp. 363–372.
FLOPS-2006-Tozawa #transducer #type checking #using #xml: XML Type Checking Using High-Level Tree Transducer (AT), pp. 81–96.
FM-2006-CunhaOV #data transformation #type safety: Type-Safe Two-Level Data Transformation (AC, JNO, JV), pp. 284–299.
IFL-2006-HammondGMI #low level #programming: Low-Level Programming in Hume: An Exploration of the HW-Hume Level (KH, GG, GM, AI), pp. 91–107.
ICGT-2006-HabelP #satisfiability: Satisfiability of High-Level Conditions (AH, KHP), pp. 430–444.
ICGT-2006-HabelPR #source code: Weakest Preconditions for High-Level Programs (AH, KHP, AR), pp. 445–460.
SOFTVIS-2006-LiuV #animation #control flow #debugging #low level: Animation of control flow for low-level debugging (HL, FSV), pp. 157–158.
EDOC-2006-BendraouGB #abstraction #execution #modelling #named #process #uml: UML4SPM: An Executable Software Process Modeling Language Providing High-Level Abstractions (RB, MPG, XB), pp. 297–306.
EDOC-2006-DongYZ #composition #petri net #testing #using #web #web service: Testing BPEL-based Web Service Composition Using High-level Petri Nets (WLD, HY, YBZ), pp. 441–444.
ICEIS-DISI-2006-AntolliniCB #enterprise #implementation #information management: Implementing a High Level PUB/SUB Layer for Enterprise Information Systems (MA, MC, APB), pp. 54–62.
CIKM-2006-BaileyHM #documentation #enterprise #implementation #performance #security #trade-off: Secure search in enterprise webs: tradeoffs in efficient implementation for document level security (PB, DH, BM), pp. 493–502.
CIKM-2006-LiC #detection #topic #using: Improving novelty detection for general topics using sentence level information patterns (XL, WBC), pp. 238–247.
ECIR-2006-KarbasiB #documentation #effectiveness #normalisation #scalability #using: Document Length Normalization Using Effective Level of Term Frequency in Large Collections (SK, MB), pp. 72–83.
ICPR-v2-2006-BertolamiB #classification #integration #multi #recognition: Early feature stream integration versus decision level combination in a multiple classifier system for text line recognition (RB, HB), pp. 845–848.
ICPR-v2-2006-KimLKK #image #recognition #verification #video: Stroke Verification with Gray-level Image for Hangul Video Text Recognition (JK, SL, YK, JHK), pp. 1074–1077.
ICPR-v2-2006-RooverCM #approach #multi #set: Smoothing with Active Surfaces: A Multiphase Level Set Approach (CDR, JC, BMM), pp. 243–246.
ICPR-v2-2006-TakiguchiOM #case study #comprehension #fault #recognition: A Study on Character Recognition Error Correction at Higher Level Recognition Step for Mathematical Formulae Understanding (YT, MO, YM), pp. 966–969.
ICPR-v3-2006-GokberkA #3d #algorithm #analysis #comparative #recognition: Comparative Analysis of Decision-level Fusion Algorithms for 3D Face Recognition (BG, LA), pp. 1018–1021.
ICPR-v4-2006-JainCD #using: Pores and Ridges: Fingerprint Matching Using Level 3 Features (AKJ, YC, MD), pp. 477–480.
ICPR-v4-2006-LinH #3d: 3D Model Acquisition Based on Projections of Level Curves (HYL, CYH), pp. 853–856.
ICPR-v4-2006-MaurelKF #set: Reconciling Landmarks and Level Sets (PM, RK, ODF), pp. 69–72.
ICPR-v4-2006-NandakumarCJD #multi: Quality-based Score Level Fusion in Multibiometric Systems (KN, YC, AKJ, SCD), pp. 473–476.
ICPR-v4-2006-ZhangZX #segmentation: A Two-level Method for Unsupervised Speaker-based Audio Segmentation (SZ, SZ, BX), pp. 298–301.
SEKE-2006-MichielsRBBD #modelling #testing #using: Program Testing Using High-Level Property-Driven Models (IM, CDR, JB, EGB, TD), pp. 489–494.
SIGIR-2006-YangC #clustering #detection: Near-duplicate detection by instance-level constrained clustering (HY, JPC), pp. 421–428.
MoDELS-2006-BerghC #interactive #modelling: CUP 2.0: High-Level Modeling of Context-Sensitive Interactive Applications (JVdB, KC), pp. 140–154.
MoDELS-2006-CibranD #aspect-oriented #slicing: A Slice of MDE with AOP: Transforming High-Level Business Rules to Aspects (MAC, MD), pp. 170–184.
MoDELS-2006-BerghC #interactive #modelling: CUP 2.0: High-Level Modeling of Context-Sensitive Interactive Applications (JVdB, KC), pp. 140–154.
MoDELS-2006-CibranD #aspect-oriented #slicing: A Slice of MDE with AOP: Transforming High-Level Business Rules to Aspects (MAC, MD), pp. 170–184.
QAPL-2005-HirschLT06 #logic: A Logic for Application Level QoS (DH, ALL, ET), pp. 135–159.
PPDP-2006-YuseI #generative #multi #persistent #type system: A modal type system for multi-level generating extensions with persistent code (YY, AI), pp. 201–212.
RE-2006-ReiserW #multi #product line: Managing Highly Complex Product Families with Multi-Level Feature Trees (MOR, MW), pp. 146–155.
SAC-2006-HeoCJK #incremental: The overhead model of word-level and page-level incremental checkpointing (JH, YC, GJ, HK), pp. 1493–1494.
SAC-2006-YiHCH #adaptation #incremental: Adaptive page-level incremental checkpointing based on expected recovery time (SY, JH, YC, JH), pp. 1472–1476.
FSE-2006-JhalaM #reasoning: Bit level types for high level reasoning (RJ, RM), pp. 128–140.
ICSE-2006-FrantzeskouSGK #effectiveness #identification #source code #using: Effective identification of source code authors using byte-level information (GF, ES, SG, SKK), pp. 893–896.
SPL-BOOK-2006-Immonen #architecture #predict #reliability: A Method for Predicting Reliability and Availability at the Architecture Level (AI), pp. 373–422.
CC-2006-Necula #dependent type #low level #type system #using: Using Dependent Types to Port Type Systems to Low-Level Languages (GCN), p. 1.
HPCA-2006-JaleelMJ #case study #data mining #mining #parallel #performance: Last level cache (LLC) performance of data mining workloads on a CMP — a case study of parallel bioinformatics workloads (AJ, MM, BLJ), pp. 88–98.
HPDC-2006-NewhouseP #named: ALPS: An Application-Level Proportional-Share Scheduler (TN, JP), pp. 279–290.
ISMM-2006-ZhangKSDHO #adaptation #memory management: Program-level adaptive memory management (CZ, KK, XS, CD, MH, MO), pp. 174–183.
CBSE-2005-Rountev #analysis #component #data flow: Component-Level Dataflow Analysis (AR), pp. 82–89.
WICSA-2005-Abi-AntounAGSN #architecture #automation #concept #implementation #incremental: Semi-Automated Incremental Synchronization between Conceptual and Implementation Level Architectures (MAA, JA, DG, BRS, NHN), pp. 265–268.
ASE-2005-FalbPRJAK #automation #specification #synthesis #user interface #using: Using communicative acts in high-level specifications of user interfaces for their automated synthesis (JF, RP, TR, HJ, EA, HK), pp. 429–430.
DAC-2005-ChenDHSW #analysis #concurrent #design #simulation: Simulation based deadlock analysis for system level designs (XC, AD, HH, ALSV, YW), pp. 260–265.
DAC-2005-JainKSC #abstraction #refinement #verification #word: Word level predicate abstraction and refinement for verifying RTL verilog (HJ, DK, NS, EMC), pp. 445–450.
DAC-2005-LinH #performance #reduction: Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction (YL, LH), pp. 720–725.
DAC-2005-LiuCO #approximate #design #multi: Approximate VCCs: a new characterization of multimedia workloads for system-level MpSoC design (YL, SC, WTO), pp. 248–253.
DAC-2005-MarculescuT #architecture #energy #perspective #variability: Variability and energy awareness: a microarchitecture-level perspective (DM, ET), pp. 11–16.
DAC-2005-MukherjeeMM #resource management #synthesis: Temperature-aware resource allocation and binding in high-level synthesis (RM, SOM, GM), pp. 196–201.
DAC-2005-NieuwoudtM #approach #multi #optimisation: Multi-level approach for integrated spiral inductor optimization (AN, YM), pp. 648–651.
DAC-2005-SrivastavaSASBD #correlation #estimation #parametricity #performance #power management: Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance (AS, SS, KA, DS, DB, SWD), pp. 535–540.
DAC-2005-SuC05a #synthesis: Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips (FS, KC), pp. 825–830.
DAC-2005-TangZB #library #optimisation #power management #synthesis: Leakage power optimization with dual-Vth library in high-level synthesis (XT, HZ, PB), pp. 202–207.
DAC-2005-WedlerSK #normalisation: Normalization at the arithmetic bit level (MW, DS, WK), pp. 457–462.
DAC-2005-ZhuoC #energy #scheduling: System-level energy-efficient dynamic task scheduling (JZ, CC), pp. 628–631.
DATE-2005-AbdiG #functional #scheduling #validation: Functional Validation of System Level Static Scheduling (SA, DDG), pp. 542–547.
DATE-2005-BaiKKSM #multi #trade-off: Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage (RB, NSK, TK, DS, TNM), pp. 650–651.
DATE-2005-CarterOS #concurrent #fault #modelling #testing: Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown (JRC, SO, DJS), pp. 300–305.
DATE-2005-ChureauSA #functional #prototype #uml: The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application (AC, YS, EMA), pp. 698–703.
DATE-2005-ContiM #analysis #standard: System Level Analysis of the Bluetooth Standard (MC, DM), pp. 118–123.
DATE-2005-DingV #approach #megamodelling #modelling #performance: A Two-Level Modeling Approach to Analog Circuit Performance Macromodeling (MD, RV), pp. 1088–1089.
DATE-2005-HabibiT #design #modelling #transaction #verification: Design for Verification of SystemC Transaction Level Models (AH, ST), pp. 560–565.
DATE-2005-JhumkaKH #approach #design #embedded: A Dependability-Driven System-Level Design Approach for Embedded Systems (AJ, SK, SAH), pp. 372–377.
DATE-2005-KangPR #analysis #statistics #using: Statistical Timing Analysis using Levelized Covariance Propagation (KK, BCP, KR), pp. 764–769.
DATE-2005-KimKKSCCKE #architecture #modelling #performance #transaction: Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture (YTK, TK, YK, CS, EYC, KMC, JTK, SKE), pp. 138–139.
DATE-2005-Klingauf #embedded #modelling #transaction: Systematic Transaction Level Modeling of Embedded Systems with SystemC (WK), pp. 566–567.
DATE-2005-LavagnoPSW #design #slicing: A Time Slice Based Scheduler Model for System Level Design (LL, CP, VS, YW), pp. 378–383.
DATE-2005-LeeCALK #hardware #predict #transaction: A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation (JGL, MKC, KYA, SHL, CMK), pp. 384–389.
DATE-2005-OzturkKI #garbage collection #named: BB-GC: Basic-Block Level Garbage Collection (ÖÖ, MTK, MJI), pp. 1032–1037.
DATE-2005-Ruiz-SautuaMMH #behaviour #performance #synthesis: Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis (RRS, MCM, JMM, RH), pp. 1252–1257.
DATE-2005-TosunMAKX #synthesis: Reliability-Centric High-Level Synthesis (ST, NM, EA, MTK, YX), pp. 1258–1263.
DATE-2005-VorwerkK #framework #multi: An Improved Multi-Level Framework for Force-Directed Placement (KV, AAK), pp. 902–907.
HT-2005-RampBB #adaptation #hypermedia: High-level translation of adaptive hypermedia applications (ER, PDB, PB), pp. 126–128.
ICDAR-2005-JaegerMD #identification: Identifying Script onWord-Level with Informational Confidenc (SJ, HM, DSD), pp. 416–420.
ICDAR-2005-YingsaereeK #analysis #detection #documentation #layout #rule-based: Rule-based Middle-level Character Detection for Simplifying Thai Document Layout Analysis (CY, AK), pp. 888–892.
ICDAR-2005-YuanT05a #algorithm #component #multi: Multi-Level Component Grouping Algorithm and Its Applications (BY, CLT), pp. 1178–1181.
PODS-2005-Fekete #transaction: Allocating isolation levels to transactions (AF), pp. 206–215.
VLDB-2005-BernsteinMM #interactive: Interactive Schema Translation with Instance-Level Mappings (PAB, SM, PM), pp. 1283–1286.
VLDB-2005-KimWLL #n-gram #named #performance: n-Gram/2L: A Space and Time Efficient Two-Level n-Gram Inverted Index Structure (MSK, KYW, JGL, MJL), pp. 325–336.
ITiCSE-2005-Hamza #analysis #approach #design #object-oriented: Introducing object-oriented analysis and design in lower-level undergraduate courses: a pattern-based approach (HSH), p. 350.
ITiCSE-2005-PerrenetGK #abstraction #algorithm #comprehension #concept #student: Exploring students’ understanding of the concept of algorithm: levels of abstraction (JP, JFG, EK), pp. 64–68.
FoSSaCS-2005-AehligMO #safety #strict #string: Safety Is not a Restriction at Level 2 for String Languages (KA, JGdM, CHLO), pp. 490–504.
CSMR-2005-JiangLSS #analysis #comparison #uml #web #web service: UML-Level Analysis and Comparison of Web Service Descriptions (JJ, JL, PS, TS), pp. 236–240.
CIAA-J-2004-BordihnHK05 #context-free grammar #problem #subclass: Unsolvability levels of operation problems for subclasses of context-free languages (HB, MH, MK), pp. 423–440.
DLT-J-2004-BorchertLSTT05 #polynomial: The dot-depth and the polynomial hierarchies correspond on the delta levels (BB, KJL, FS, PT, DT), pp. 625–644.
IFM-2005-GrunskeLYW #analysis #automation #behaviour #design #specification: An Automated Failure Mode and Effect Analysis Based on High-Level Design Specification with Behavior Trees (LG, PAL, NY, KW), pp. 129–149.
SEFM-2005-HirschT #coordination #named: SHReQ: Coordinating Application Level QoS (DH, ET), pp. 425–434.
ICFP-2005-DiatchkiJL #low level: High-level views on low-level representations (ISD, MPJ, RL), pp. 168–179.
ICFP-2005-SewellLWNAHV #design #distributed #named #programming language: Acute: high-level programming language design for distributed computation (PS, JJL, KW, FZN, MAW, PH, VV), pp. 15–26.
IFL-2005-HuchK #composition #concurrent #haskell #implementation #memory management #transaction: A High-Level Implementation of Composable Memory Transactions in Concurrent Haskell (FH, FK), pp. 124–141.
CHI-2005-TollingerLMTVHP #constraints #development #modelling #multi #performance: Supporting efficient development of cognitive models at multiple skill levels: exploring recent advances in constraint-based modeling (IT, RLL, MM, PT, AHV, AH, LP), pp. 411–420.
VISSOFT-2005-DucasseLR #comprehension #multi #using: Multi-level Method Understanding Using Microprints (SD, ML, RR), pp. 33–38.
AdaEurope-2005-LundqvistSG #fault tolerance: Non-intrusive System Level Fault-Tolerance (KL, JS, SG), pp. 156–166.
EDOC-2005-WangWCWFUCGL #adaptation #enterprise #monitoring #using: Service Level Management using QoS Monitoring, Diagnostics, and Adaptation for Networked Enterprise Systems (GW, CW, AC, HW, CKF, SAU, YLC, WG, JL), pp. 239–250.
ICEIS-v4-2005-LokeLBG #abstraction #programming #workflow: Levels of Abstraction in Programming Device Ecology Workflows (SWL, SL, GB, BG), pp. 137–144.
CIKM-2005-LiC05a #detection: Novelty detection based on sentence level patterns (XL, WBC), pp. 744–751.
MLDM-2005-DongKSP #composition #geometry #low level #representation #word: Low-Level Cursive Word Representation Based on Geometric Decomposition (JxD, AK, CYS, DP), pp. 590–599.
SEKE-2005-JonssonW #comprehension #empirical #impact analysis: Understanding Impact Analysis: An Empirical Study to Capture Knowledge on Different Organisational Level (PJ, CW), pp. 707–712.
SEKE-2005-Kjaergaard #abstraction #architecture #on the: On Abstraction Levels for Software Architecture Viewpoints (MBK), pp. 424–429.
SEKE-2005-LiuCBGROA #analysis #approach #component #composition #quality #requirements #two-level grammar: Quality of Service-Driven Requirements Analysis for Component Composition: A Two-Level Grammar+Approach (SHL, FC, BRB, JGG, RRR, AMO, MA), pp. 731–734.
SEKE-2005-PilattiPA #development #framework #standard: Global Software Development: Standardization of the Developing Phase based on the MSF Framework in a global CMM level 3 context (LP, RP, JLNA), pp. 235–240.
SIGIR-2005-FetterlyMN #detection #web: Detecting phrase-level duplication on the world wide web (DF, MM, MN), pp. 170–177.
ECMDA-FA-2005-Kleppe #towards: Towards General Purpose, High Level, Software Languages (AK), pp. 220–238.
GPCE-2005-KaminAM #generative #optimisation #runtime: Source-Level Optimization of Run-Time Program Generators (SNK, BA, PM), pp. 293–308.
SAC-2005-HeoYCHS #incremental: Space-efficient page-level incremental checkpointing (JH, SY, YC, JH, SYS), pp. 1558–1562.
SAC-2005-LiuBGROA #assurance #distributed #embedded #realtime #requirements: Two-level assurance of QoS requirements for distributed real-time and embedded systems (SHL, BRB, JGG, RRR, AMO, MA), pp. 903–904.
SAC-2005-MitchellP #metric #runtime #using: Using object-level run-time metrics to study coupling between objects (ÁM, JFP), pp. 1456–1462.
SAC-2005-WuA #reduction: The intensity level reduction in radiation therapy (XW, JA), pp. 242–246.
ESEC-FSE-2005-BasitJ #detection #similarity #source code: Detecting higher-level similarity patterns in programs (HAB, SJ), pp. 156–165.
ICSE-2005-GanapathySJRB #automation: Automatic discovery of API-level exploits (VG, SAS, SJ, TWR, REB), pp. 312–321.
ICSE-2005-NguyenMBT #configuration management #development #framework #multi #object-oriented: An infrastructure for development of object-oriented, multi-level configuration management services (TNN, EVM, JTB, CT), pp. 215–224.
CC-2005-RyuR #debugging #multi #programming: Source-Level Debugging for Multiple Languages with Modest Programming Effort (SR, NR), pp. 10–26.
CGO-2005-ChenCH #empirical #memory management #modelling #multi: Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy (CC, JC, MWH), pp. 111–122.
CGO-2005-GuoBTORA #analysis #low level #pointer: Practical and Accurate Low-Level Pointer Analysis (BG, MJB, ST, GO, ER, DIA), pp. 291–302.
CGO-2005-ShinHC #control flow #parallel: Superword-Level Parallelism in the Presence of Control Flow (JS, MWH, JC), pp. 165–175.
COCV-J-2005-Langmaack #question #reasoning #what: What Level of Mathematical Reasoning can Computer Science Demand of a Software Implementer? (HL), pp. 5–32.
HPDC-2005-Thain #grid: Identity boxing: secure user-level containment for the grid (DT), pp. 299–300.
LCTES-2005-FrankeOTF #embedded #optimisation #probability #source code: Probabilistic source-level optimisation of embedded programs (BF, MFPO, JT, GF), pp. 78–86.
PPoPP-2005-LowGZ #algebra #algorithm #linear #parallel #specification: Extracting SMP parallelism for dense linear algebra algorithms from high-level specifications (TML, RAvdG, FGVZ), pp. 153–163.
TestCom-2005-KulvatunyouIJ #case study #consistency #testing: Content-Level Conformance Testing: An Information Mapping Case Study (BK, NI, ATJ), pp. 349–364.
TLCA-2005-AehligMO #decidability #higher-order #monad #recursion: The Monadic Second Order Theory of Trees Given by Arbitrary Level-Two Recursion Schemes Is Decidable (KA, JGdM, CHLO), pp. 39–54.
ASE-2004-JiXCHCM #fault #statistics: A Statistical Model to Locate Faults at Input Level (JW, XxJ, CL, HyY, CL, MJ), pp. 274–277.
DAC-2004-BacchiniPBPBCB #design #industrial: System level design: six success stories in search of an industry (FB, PGP, RAB, RP, AB, RC, MBR), pp. 349–350.
DAC-2004-BrandoleseFS #design #estimation: An area estimation methodology for FPGA based designs at systemc-level (CB, WF, FS), pp. 129–132.
DAC-2004-CaiGG #agile #design #profiling: Retargetable profiling for rapid, early system-level design space exploration (LC, AG, DG), pp. 281–286.
DAC-2004-CongFZ #architecture #automation #pipes and filters #synthesis: Architecture-level synthesis for automatic interconnect pipelining (JC, YF, ZZ), pp. 602–607.
DAC-2004-DebJO #design #modelling #paradigm #transaction: System design for DSP applications in transaction level modeling paradigm (AKD, AJ, JÖ), pp. 466–471.
DAC-2004-HeLS #reduction: System level leakage reduction considering the interdependence of temperature and leakage (LH, WL, MRS), pp. 12–17.
DAC-2004-LiXLGP #approach #simulation: A frequency relaxation approach for analog/RF system-level simulation (XL, YX, PL, PG, LTP), pp. 842–847.
DAC-2004-PasrichaDB #approach #architecture #communication #modelling #performance #transaction: Extending the transaction level modeling approach for fast communication architecture exploration (SP, NDD, MBR), pp. 113–118.
DAC-2004-PieperMPTK #multi #simulation: High level cache simulation for heterogeneous multiprocessors (JJP, AM, JMP, DET, FK), pp. 287–292.
DAC-2004-PlasBVDWDGM #simulation: High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects (GVdP, MB, GV, PD, PW, SD, GGEG, HDM), pp. 854–859.
DAC-2004-YangKM #architecture #named #optimisation: Divide-and-concatenate: an architecture level optimization technique for universal hash functions (BY, RK, DAM), pp. 614–617.
DATE-DF-2004-BonaZZ #industrial #modelling #simulation: System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip (AB, VZ, RZ), pp. 318–323.
DATE-DF-2004-BruschiB #communication #design #synthesis: A Design Methodology for the Exploitation of High Level Communication Synthesis (FB, MB), pp. 180–185.
DATE-DF-2004-Ruiz-AmayaRMFRPR #matlab #synthesis: MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators (JRA, JLdlR, FM, FVF, RdR, MBPV, ÁRV), pp. 150–155.
DATE-v1-2004-BernardinisS #design: A Methodology for System-Level Analog Design Space Exploration (FDB, ALSV), pp. 676–677.
DATE-v1-2004-BrandtnerW #named #simulation: SubCALM: A Program for Hierarchical Substrate Coupling Simulation on Floorplan Level (TB, RW), pp. 616–621.
DATE-v1-2004-CatthoorCMGLMSW #design #how #problem #question #scalability: How Can System-Level Design Solve the Interconnect Technology Scaling Problem? (FC, AC, GM, PG, RL, KM, PvdS, RW), pp. 332–339.
DATE-v1-2004-Gordon-RossVD #automation #embedded: Automatic Tuning of Two-Level Caches to Embedded Applications (AGR, FV, ND), pp. 208–213.
DATE-v1-2004-GuptaDGN #control flow #design #synthesis: Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow (SG, ND, RG, AN), pp. 114–121.
DATE-v1-2004-HeathBH #named #nondeterminism: Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s (MWH, WPB, IGH), pp. 410–415.
DATE-v1-2004-JangKLCLS #architecture #case study #modelling #network: High-Level System Modeling and Architecture Exploration with SystemC on a Network SoC: S3C2510 Case Study (HOJ, MK, MjL, KC, KL, KS), pp. 538–543.
DATE-v1-2004-LapalmeANCBDB #dot-net #framework #generative #modelling #simulation #tool support: .NET Framework — A Solution for the Next Generation Tools for System-Level Modeling and Simulation (JL, EMA, GN, LC, FRB, JPD, GB), pp. 732–733.
DATE-v1-2004-LaurentJSM #analysis #approach #functional #modelling #performance #power management: Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors (JL, NJ, ES, EM), pp. 666–667.
DATE-v1-2004-MartensG #architecture #design: A Phase-Frequency Transfer Description of Analog and Mixed-Signal Front-End Architectures for System-Level Design (EM, GGEG), pp. 436–441.
DATE-v1-2004-PomeranzR #fault #metric #similarity: Level of Similarity: A Metric for Fault Collapsing (IP, SMR), pp. 56–61.
DATE-v1-2004-PosadasHSVB #analysis #performance: System-Level Performance Analysis in SystemC (HP, FH, PS, EV, FB), pp. 378–383.
DATE-v1-2004-QuinnLBA #configuration management #framework #network: A System Level Exploration Platform and Methodology for Network Applications Based on Configurable Processors (DQ, BL, GB, EMA), pp. 364–371.
DATE-v1-2004-ReNR #automation #generative: A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters (ADR, AN, MR), pp. 686–687.
DATE-v1-2004-TiriV #design #implementation #logic: A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation (KT, IV), pp. 246–251.
DATE-v2-2004-ElviraMAG #generative #megamodelling #performance #simulation: A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation (LE, FM, XA, JLG), pp. 1362–1363.
DATE-v2-2004-GuptaK #performance #statistics: A Fast Word-Level Statistical Estimator of Intra-Bus Crosstalk (SG, SK), pp. 1110–1115.
DATE-v2-2004-UedaSTI #architecture #embedded #estimation #performance: Architecture-Level Performance Estimation for IP-Based Embedded Systems (KU, KS, YT, MI), pp. 1002–1007.
DATE-v2-2004-WieferinkKLAMBN #communication #framework #multi: A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform (AW, TK, RL, GA, HM, GB, AN), pp. 1256–1263.
DRR-2004-MaD #documentation #identification #image #word: Word level script identification for scanned document images (HM, DSD), pp. 124–135.
SIGMOD-2004-ChaudhuriDS #effectiveness #estimation #statistics: Effective Use of Block-Level Sampling in Statistics Estimation (SC, GD, US), pp. 287–298.
SIGMOD-2004-HaasK #database: A Bi-Level Bernoulli Scheme for Database Sampling (PJH, CK), pp. 275–286.
ITiCSE-2004-JoyceY: Addressing professional issues at postgraduate level (DJ, AY), p. 257.
FASE-2004-MoldtO #automation #named #petri net: DaGen: A Tool for Automatic Translation from DAML-S to High-Level Petri Nets (DM, JO), pp. 209–213.
CSMR-2004-DucasseLB #runtime: High-Level Polymetric Views of Condensed Run-time Information (SD, ML, RB), pp. 309–318.
CSMR-2004-HassounJC #architecture #metric #runtime: A Dynamic Runtime Coupling Metric for Meta-Level Architectures (YH, RJ, SC), pp. 339–346.
ICSM-2004-Kajko-MattssonAL #named: CM³: Service Level Agreement (MKM, CA, EL), pp. 432–436.
PLDI-2004-JohnsonEV #composition #concurrent #thread: Min-cut program decomposition for thread-level speculation (TAJ, RE, TNV), pp. 59–70.
PLDI-2004-VachharajaniVA #component #modelling #reuse #specification: The liberty structural specification language: a high-level modeling language for component reuse (MV, NV, DIA), pp. 195–206.
DLT-2004-BorchertLSTT #polynomial: The Dot-Depth and the Polynomial Hierarchy Correspond on the Delta Levels (BB, KJL, FS, PT, DT), pp. 89–101.
IFM-2004-ThanhK #composition #modelling #object-oriented #petri net: Object-Oriented Modelling with High-Level Modular Petri Nets (CBT, HK), pp. 287–306.
ICGT-2004-EhrigEHP #constraints #graph: Constraints and Application Conditions: From Graphs to High-Level Structures (HE, KE, AH, KHP), pp. 287–303.
ICGT-2004-EhrigHPP #category theory: Adhesive High-Level Replacement Categories and Systems (HE, AH, JP, UP), pp. 144–160.
CAiSE-2004-ZdravkovicJ #process: Cooperation of Processes through Message Level Agreement (JZ, PJ), pp. 564–579.
ICEIS-v1-2004-ChenY #database #fuzzy #multi #transaction: Fuzzy Multiple-Level Sequential Patterns Discovery from Customer Transaction Databases (AC, HY), pp. 434–440.
ICEIS-v1-2004-HendersonW #enterprise #modelling #simulation: Information Invasion in Enterprise Systems: Modelling, Simulating and Analysing System-Level Information Propagation (PH, SC, RJW), pp. 473–481.
ICEIS-v1-2004-PaparoZL #automation #generative #process: Proposal for Automating the Generation Process of Questionnaires to Measure the Satisfaction Level of Software Users (MP, SZ, MIL), pp. 113–118.
ICEIS-v3-2004-RukanovaSS #communication #how #metamodelling #towards: Towards a Meta Model for Describing Communication: How to Address Interoperability on a Pragmatic Level (BR, KvS, RAS), pp. 375–382.
ICPR-v1-2004-ClausiY #comparison #markov #random #segmentation #using: Texture Segmentation Comparison Using Grey Level Co-Occurrence Probabilities and Markov Random Fields (DAC, BY), pp. 584–587.
ICPR-v1-2004-HallOC #detection #low level: A Trainable Low-level Feature Detector (PMH, MO, JPC), pp. 708–711.
ICPR-v1-2004-LiuM #classification #recognition #string: Handwritten Numeral String Recognition: Character-Level vs. String-Level Classifier Training (CLL, KM), pp. 405–408.
ICPR-v1-2004-PereraH #detection: Bayesian Object-Level Change Detection in Grayscale Imagery (AGAP, AH), pp. 71–75.
ICPR-v2-2004-BajaN #2d #3d #approach: 2D Grey-level Skeleton Computation: A Discrete 3D Approach (GSdB, IN), pp. 455–458.
ICPR-v2-2004-EdenC #image #independence #statistics: Local Straightness: A Contrast Independent Statistical Edge Measure for Color and Gray Level Images (JE, HIC), pp. 451–454.
ICPR-v2-2004-LindgrenH #component #image #independence #learning #representation: Learning High-level Independent Components of Images through a Spectral Representation (JTL, AH), pp. 72–75.
ICPR-v2-2004-SantamariaBS #analysis #statistics #using: Texture Analysis using Level-crossing Statistics (CS, MB, WS), pp. 712–715.
ICPR-v2-2004-TabboneW #adaptation #recognition: Recognition of Symbols in Grey Level Line-drawings from an Adaptation of the Radon Transform (ST, LW), pp. 570–573.
ICPR-v2-2004-WangZKT #distance #image #segmentation #set: Level Set Methods, Distance Function and Image Segmentation (DW, JZ, SCK, ZT), pp. 110–115.
ICPR-v3-2004-LanMZ #detection #multimodal #using: Multi-level Anchorperson Detection Using Multimodal Association (DJL, YFM, HZ), pp. 890–893.
ICPR-v3-2004-Stentiford #image #visual notation: A Visual Attention Estimator Applied to Image Subject Enhancement and Colour and Grey Level Compression (FS), pp. 638–641.
ICPR-v3-2004-TsujiZHK #analysis #correlation: Levels of Detail Control Based on Correlation Analysis Between Surface Position and Direction (TT, HZ, TH, RK), pp. 622–625.
SEKE-2004-Stojanovic #approach #modelling #on the: On Modelling an e-shop Application on the Knowledge Level: e-ShopAgent Approach (NS), pp. 232–237.
SEKE-2004-YaoZY #framework: Level Construction of Decision Trees in a Partition-based Framework for Classi cation (YY, YZ, JY), pp. 199–204.
SIGIR-2004-CaiHWM #analysis: Block-level link analysis (DC, XH, JRW, WYM), pp. 440–447.
SIGIR-2004-LiuCOH #automation #query #recognition: Automatic recognition of reading levels from user queries (XL, WBC, PO, DMH), pp. 548–549.
UML-2004-PitkanenS #execution #incremental #modelling #uml: A UML Profile for Executable and Incremental Specification-Level Modeling (RP, PS), pp. 158–172.
ECOOP-2004-SillitoDEV #case study: Use Case Level Pointcuts (JS, CD, ADE, KDV), pp. 244–266.
OOPSLA-2004-BrachaU #design #named #object-oriented #programming language: Mirrors: design principles for meta-level facilities of object-oriented programming languages (GB, DU), pp. 331–344.
OOPSLA-2004-GeorgesBEB #behaviour #java: Method-level phase behavior in java workloads (AG, DB, LE, KDB), pp. 270–287.
PDCL-2004-MartinK #on the: On the Inference of Natural Level Mappings (JCM, AK), pp. 432–452.
RE-2004-BuhneHPWKW #abstraction #requirements: Defining Requirements at Different Levels of Abstraction (SB, GH, KP, MW, HK, TW), pp. 346–347.
SAC-2004-HoodaDS #health: Health Level-7 compliant clinical patient records system (JSH, ED, RS), pp. 259–263.
SAC-2004-KagklisLT #framework #specification: A framework for implicit and explicit service activation based on Service Level Specification (DK, NL, CT), pp. 363–368.
ICSE-2004-AkgulMP #assembly #execution #performance #slicing: A Fast Assembly Level Reverse Execution Method via Dynamic Slicing (TA, VJMI, SP), pp. 522–531.
ICSE-2004-GiannakopoulouPC #source code #verification: Assume-Guarantee Verification of Source Code with Design-Level Assumptions (DG, CSP, JMC), pp. 211–220.
ICSE-2004-SkeneLE #precise: Precise Service Level Agreements (JS, DDL, WE), pp. 179–188.
SPLC-2004-FritschR #adaptation #approach #product line: Four Mechanisms for Adaptable Systems: A Meta-level Approach to Building a Software Product Line (CF, BR), pp. 51–72.
ASPLOS-2004-BronevetskyMPSS #memory management #source code: Application-level checkpointing for shared memory programs (GB, DM, KP, PKS, MS), pp. 235–247.
ISMM-2004-ChenKVI #analysis #embedded #java #optimisation: Field level analysis for heap space optimization in embedded java environments (GC, MTK, NV, MJI), pp. 131–142.
OSDI-2004-GunawiAA #network: Deploying Safe User-Level Network Services with icTCP (HSG, ACAD, RHAD), pp. 317–332.
OSDI-2004-SivathanuBAA: Life or Death at Block-Level (MS, LNB, ACAD, RHAD), pp. 379–394.
CAV-2004-SchroterK #model checking #parallel #petri net: Parallel LTL-X Model Checking of High-Level Petri Nets Based on Unfoldings (CS, VK), pp. 109–121.
FATES-2004-Wu-Hen-ChangVBGC #testing: High-Level Restructuring of TTCN-3 Test Data (AWHC, DLV, GB, RG, GC), pp. 180–194.
LICS-2004-Abramsky #quantum: High-Level Methods for Quantum Computation and Information (SA), pp. 410–414.
ASE-2003-ShehataE #detection #framework #interactive #requirements: Detecting Requirements Interactions: A Three-Level Framework (MS, AE), pp. 352–355.
DAC-2003-AbdiSG #automation #communication #design #refinement: Automatic communication refinement for system level design (SA, DS, DG), pp. 300–305.
DAC-2003-AgostaBS #modelling #static analysis #transaction: Static analysis of transaction-level models (GA, FB, DS), pp. 448–453.
DAC-2003-EjlaliM: Switch-level emulation (ARE, SGM), pp. 644–649.
DAC-2003-LauP #algorithm #design #using: Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm (CYL, MHP), pp. 526–531.
DAC-2003-LiLXP #analysis #megamodelling: Analog and RF circuit macromodels for system-level analysis (XL, PL, YX, LTP), pp. 478–483.
DAC-2003-RussellJ #architecture #component #embedded #evaluation #performance: Architecture-level performance evaluation of component-based embedded systems (JTR, MFJ), pp. 396–401.
DAC-2003-SaifhashemiP #abstraction #framework #modelling: Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction (AS, HP), pp. 330–333.
DAC-2003-Schubert #verification: High level formal verification of next-generation microprocessors (TS), pp. 1–6.
DAC-2003-WongM #composition #data-driven #synthesis: High-level synthesis of asynchronous systems by data-driven decomposition (CGW, AJM), pp. 508–513.
DATE-2003-AraS #component #transaction #verification: A Proposal for Transaction-Level Verification with Component Wrapper Language (KA, KS), pp. 20082–20087.
DATE-2003-BaganneBEGM #case study #design #integration #multi: A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration (AB, IB, ME, RG, EM), pp. 20250–20255.
DATE-2003-BrandoleseFSS #analysis #library: Library Functions Timing Characterization for Source-Level Analysis (CB, WF, FS, DS), pp. 11132–11133.
DATE-2003-BraunWSLMN #abstraction #memory management #multi: Processor/Memory Co-Exploration on Multiple Abstraction Levels (GB, AW, OS, RL, HM, AN), pp. 10966–10973.
DATE-2003-CaldariCCCOPT #analysis: System-Level Power Analysis Methodology Applied to the AMBA AHB Bus (MC, MC, MC, PC, SO, LP, CT), pp. 20032–20039.
DATE-2003-CaldariCCCPT #architecture #modelling #transaction #using: Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0 (MC, MC, MC, SC, LP, CT), pp. 20026–20031.
DATE-2003-CassidyPT #concurrent #design #multi #performance #thread: Layered, Multi-Threaded, High-Level Performance Design (ASC, JMP, DET), pp. 10954–10959.
DATE-2003-DoucetSG #framework: Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated (FD, SKS, RKG), pp. 10382–10387.
DATE-2003-FalkM #control flow #source code: Control Flow Driven Splitting of Loop Nests at the Source Code Level (HF, PM), pp. 10410–10415.
DATE-2003-GerstlauerYG #design #modelling: RTOS Modeling for System Level Design (AG, HY, DG), pp. 10130–10135.
DATE-2003-GlaesonP #design: Designing System-Level Software Solutions for Open OS’s on 3g Wireless Handsets (SG, EP), p. 20040.
DATE-2003-GuptaDGN #branch #design #synthesis: Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs (SG, NDD, RKG, AN), pp. 10270–10275.
DATE-2003-IwasakiNNNYONTOIE #multi #scalability: Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level (HI, JN, KN, KN, TY, MO, YN, YT, TO, MI, ME), pp. 20002–20007.
DATE-2003-KazmierskiY #design #framework: A Secure Web-Based Framework for Electronic System Level Design (TJK, XQY), pp. 11140–11143.
DATE-2003-KnochelMHKA #simulation #verification: Verification of the RF Subsystem within Wireless LAN System Level Simulation (UK, TM, JH, RK, RA), pp. 20286–20291.
DATE-2003-LogothetisS #analysis #source code: Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration (GL, KS), pp. 10196–10203.
DATE-2003-MangerucaFSPP #case study #design #detection #embedded: System Level Design of Embedded Controllers: Knock Detection, A Case Study in the Automotive Domain (LM, AF, ALSV, AP, MP), pp. 20232–20237.
DATE-2003-MeiVVML #architecture #configuration management #parallel #scheduling #using: Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling (BM, SV, DV, HDM, RL), pp. 10296–10301.
DATE-2003-MolinaMH #hardware: High-Level Allocation to Minimize Internal Hardware Wastage (MCM, JMM, RH), pp. 10264–10269.
DATE-2003-MoussaGN #modelling #performance #transaction #using: Exploring SW Performance Using SoC Transaction-Level Modeling (IM, TG, GN), pp. 20120–20125.
DATE-2003-NielsenM #synthesis: Power Constrained High-Level Synthesis of Battery Powered Digital Systems (SFN, JM), pp. 11136–11137.
DATE-2003-OgawaNCSWNST #approach #architecture #optimisation #transaction: A Practical Approach for Bus Architecture Optimization at Transaction Level (OO, SBdN, PC, KS, YW, HN, TS, YT), pp. 20176–20181.
DATE-2003-OikonomakosZA #metric #online #self #synthesis #testing #using: Versatile High-Level Synthesis of Self-Checking Datapaths Using an On-Line Testability Metric (PO, MZ, BMAH), pp. 10596–10601.
DATE-2003-PalermoSZ #architecture #embedded: Power-Performance System-Level Exploration of a MicroSPARC2-Based Embedded Architecture (GP, CS, VZ), pp. 20182–20187.
DATE-2003-Sanchez-ElezFADBH #architecture #configuration management #data transformation #energy #memory management #multi: Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures (MSE, MF, MLA, HD, NB, RH), pp. 10036–10043.
DATE-2003-SayintaCPAD #abstraction #case study #using #verification: A Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification (AS, GC, MP, AA, WD), pp. 20095–20100.
DATE-2003-Singh #specification: System Level Specification in Lava (SS), pp. 10370–10375.
DATE-2003-WangZ #analysis #polynomial: Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching (ZW, JZ), pp. 11026–11031.
DocEng-2003-Bulterman #interactive #multi #using: Using SMIL to encode interactive, peer-level multimedia annotations (DCAB), pp. 32–41.
DRR-2003-NartkerTYBC #documentation: OCR correction based on document level knowledge (TAN, KT, RY, JB, AC), pp. 103–110.
ICDAR-2003-DawoudK #approach #image: New Approach for the Skeletonization of Handwritten Characters in Gray-Level Images (AD, MK), pp. 1233–1237.
ICDAR-2003-GocciaBSD #classification #feature model #optimisation #recognition: Recognition of Container Code Characters through Gray-Level Feature Extraction and Gradient-Based Classifier Optimization (MG, MB, CS, SGD), p. 973–?.
ICDAR-2003-WirotiusSV #identification: Writer Identification from Gray Level Distribution (MW, AS, NV), pp. 1168–1172.
ICDAR-2003-WuA #approach #automation #multi #using: Automatic Thresholding of Gray-level Using Multi-stage Approach (SW, AA), pp. 493–497.
CSEET-2003-EdwardsT #re-engineering: Reflections on a UK Masters Level Software Engineering Programme Intended for the Home and International Market (HME, JBT), p. 166–?.
ITiCSE-2003-LynchM #learning #student: The winds of change: students’ comfort level in different learning environments (KL, SM), pp. 70–73.
ITiCSE-2003-RagonisH #distance #multi: A multi-level distance learning-based course for high-school computer science leading-teachers (NR, BH), p. 224.
ITiCSE-2003-Yehezkel #execution: Making program execution comprehensible one level above the machine language (CY), pp. 124–128.
FoSSaCS-2003-MomiglianoA #higher-order #multi #syntax: Multi-level Meta-reasoning with Higher-Order Abstract Syntax (AM, SA), pp. 375–391.
TACAS-2003-KhomenkoK #branch #petri net #process: Branching Processes of High-Level Petri Nets (VK, MK), pp. 458–472.
CSMR-2003-MerloAB #analysis #fuzzy #performance: Fast Flow Analysis to Compute Fuzzy Estimates of Risk Levels (EM, GA, PLB), p. 351–?.
IWPC-2003-DeanC #design: Design Recovery of a Two Level System (TRD, YC), pp. 23–32.
SAS-2003-Logozzo #analysis #composition #object-oriented: Class-Level Modular Analysis for Object Oriented Languages (FL), pp. 37–54.
ICALP-2003-AgeevYZ #algorithm #approximate #combinator #problem: Improved Combinatorial Approximation Algorithms for the k-Level Facility Location Problem (AAA, YY, JZ), pp. 145–156.
FME-2003-DenneyF #correctness #policy #safety: Correctness of Source-Level Safety Policies (ED, BF), pp. 894–913.
SFM-2003-BalsamoBS #architecture #evaluation #performance: Performance Evaluation at the Software Architecture Level (SB, MB, MS), pp. 207–258.
SOFTVIS-2003-GrissomMN #algorithm #education #student #visualisation: Algorithm Visualization in CS Education: Comparing Levels of Student Engagement (SG, MFM, TLN), pp. 87–94.
EDOC-2003-DebusmannSSK #monitoring #using: Unified Service Level Monitoring using CIM (MD, MS, MS, RK), pp. 76–85.
ICEIS-v1-2003-KirchbergST #architecture #distributed #multi: A Multi-Level Architecture for Distributed Object Bases (MK, KDS, AT), pp. 63–70.
ICEIS-v2-2003-Debenham #constraints #people #process: Agents for High-Level Process Management: The Right Activities, People and Resources to Satisfy Process Constraints (JKD), pp. 434–437.
ICEIS-v3-2003-AkatsuKK #analysis #parametricity: Analysis on Relation Between Service Parameters for Service Level Management and System Utilization (MA, SK, NK), pp. 191–196.
ICEIS-v3-2003-OrlovK #abstraction #editing: A Unified Tool for Editing Information of Different Levels of Abstraction (VO, AK), pp. 633–636.
ICEIS-v3-2003-SaeedA #analysis: Analysis of Level of Involvement of Six Best Practices of RUP in OOSP (MS, FA), pp. 523–526.
CIKM-2003-BroderCHSZ #evaluation #performance #process #query #retrieval #using: Efficient query evaluation using a two-level retrieval process (AZB, DC, MH, AS, JYZ), pp. 426–434.
SEKE-2003-BarberHB #architecture #multi #performance: Early Multi-Level Software Architecture Performance Evaluations (KSB, JH, GB), pp. 561–569.
SIGIR-2003-AllanWB #detection #retrieval: Retrieval and novelty detection at the sentence level (JA, CW, AB), pp. 314–321.
SIGIR-2003-Sakai #evaluation #multi #performance #retrieval: Average gain ratio: a simple retrieval performance measure for evaluation with multiple relevance levels (TS), pp. 417–418.
OOPSLA-2003-EeckhoutGB #architecture #how #java #source code #virtual machine: How java programs interact with virtual machines at the microarchitectural level (LE, AG, KDB), pp. 169–186.
RE-2003-Catrava #quality #requirements #testing #towards #verification: Testing with Partial Traced Requirements: A Necessary Step Towards Higher Quality System Level Verification (SC), p. 303.
SAC-2003-CofflandP #embedded #evaluation #framework #performance: A Software Framework for Efficient System-level Performance Evaluation of Embedded Systems (JEC, ADP), pp. 666–671.
SAC-2003-Leon-RojasMM #fuzzy #on the: On the Fuzzy Bayesian Inference of Population Annoyance Level Caused by Noise Exposure (JMLR, VM, MM), pp. 227–234.
ESEC-FSE-2003-RajanS #aspect-oriented #design #named: Eos: instance-level aspects for integrated system design (HR, KJS), pp. 291–306.
ICSE-2003-BinkleyH #dependence #empirical #roadmap: An Empirical Study of Predicate Dependence Levels and Trends (DB, MH), pp. 330–340.
ICSE-2003-WangHGAGA #architecture #assessment #risk management #specification #uml: Architectural Level Risk Assessment Tool Based on UML Specifications (TW, AEH, AG, WA, KGP, HHA), pp. 808–809.
CC-2003-GhoshKKKLLN #compilation #design #experience #implementation #optimisation: Integrating High-Level Optimizations in a Production Compiler: Design and Implementation Experience (SG, AK, RK, DK, WL, CCL, JN), pp. 303–319.
HPCA-2003-GarzaranPLVRT #concurrent #memory management #multi #thread #trade-off: Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors (MJG, MP, JML, VV, LR, JT), pp. 191–202.
LCTES-2003-KimVKI #adaptation #architecture #optimisation #parallel: Adapting instruction level parallelism for optimizing leakage in VLIW architectures (HSK, NV, MTK, MJI), pp. 275–283.
PPoPP-2003-BronevetskyMPS #automation #source code: Automated application-level checkpointing of MPI programs (GB, DM, KP, PS), pp. 84–94.
PPoPP-2003-ChenTSDS #distributed: Exploiting high-level coherence information to optimize distributed shared state (DC, CT, BS, SD, MLS), pp. 131–142.
PPoPP-2003-KimPR #concurrent #interface #network #programmable: Exploiting task-level concurrency in a programmable network interface (HyK, VSP, SR), pp. 61–72.
PPoPP-2003-PrabhuO #concurrent #parallel #thread #using: Using thread-level speculation to simplify manual parallelization (MKP, KO), pp. 1–12.
SOSP-2003-MahajanSWA #internet: User-level internet path diagnosis (RM, NTS, DW, TEA), pp. 106–119.
ICLP-2003-Morrisett #low level #type safety: Achieving Type Safety for Low-Level Code (JGM), pp. 1–2.
CBSE-2002-MorenoHW #component #empirical #modelling #predict #standard #statistics #towards: Statistical Models for Empirical Component Properties and Assembly-Level Property Predictions: Toward Standard Labeling (GM, SH, KW), p. 10.
DAC-2002-BernasconiCLP #logic #performance #symmetry: Fast three-level logic minimization based on autosymmetry (AB, VC, FL, LP), pp. 425–430.
DAC-2002-BodapatiN #analysis #megamodelling: High-level current macro-model for power-grid analysis (SB, FNN), pp. 385–390.
DAC-2002-ChangC #implementation #self #verification: Self-referential verification of gate-level implementations of arithmetic circuits (YTC, KTC), pp. 311–316.
DAC-2002-GuptaSDGNKKR #coordination #performance #synthesis: Coordinated transformations for high-level synthesis of high performance microprocessor blocks (SG, NS, NDD, RKG, AN, TK, MK, SR), pp. 898–903.
DAC-2002-HuangM #configuration management #parallel: Exploiting operation level parallelism through dynamically reconfigurable datapaths (ZH, SM), pp. 337–342.
DAC-2002-JollyPM #automation #equivalence: Automated equivalence checking of switch level circuits (SJ, ANP, TM), pp. 299–304.
DAC-2002-MolinaMH #multi #synthesis: High-level synthesis of multiple-precision circuitsindependent of data-objects length (MCM, JMM, RH), pp. 612–615.
DAC-2002-OliveiraH #automation #generative #interface #monitoring #specification: High-Level specification and automatic generation of IP interface monitors (MTO, AJH), pp. 129–134.
DAC-2002-SeoKP #algorithm #memory management #synthesis: An integrated algorithm for memory allocation and assignment in high-level synthesis (JS, TK, PRP), pp. 608–611.
DAC-2002-WongMP #concept #synthesis: Forward-looking objective functions: concept & applications in high level synthesis (JLW, SM, MP), pp. 904–909.
DAC-2002-Ykman-CouvreurLVCNK #memory management #network #optimisation #performance: System-level performance optimization of the data queueing memory management in high-speed network processors (CYC, JL, DV, FC, AN, GEK), pp. 518–523.
DATE-2002-BayraktarogluO #fault: Gate Level Fault Diagnosis in Scan-Based BIST (IB, AO), pp. 376–381.
DATE-2002-BonaSSZSZ #embedded #estimation #optimisation: An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores (AB, MS, DS, VZ, CS, RZ), p. 1128.
DATE-2002-CaiGKO #design #top-down #using: Top-Down System Level Design Methodology Using SpecC, VCC and SystemC (LC, DG, PK, MO), p. 1137.
DATE-2002-ChenS #scheduling #synthesis: Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis (CC, MS), pp. 1016–1020.
DATE-2002-FlottesPR #heuristic #scheduling: A Heuristic for Test Scheduling at System Level (MLF, JP, BR), p. 1124.
DATE-2002-FranckenVMG #named #simulation: DAISY-CT: A High-Level Simulation Tool for Continuous-Time Delta Sigma Modulators (KF, MV, EM, GGEG), p. 1110.
DATE-2002-KadayifKVIS #compilation #energy #estimation #framework #named #optimisation: EAC: A Compiler Framework for High-Level Energy Estimation and Optimization (IK, MTK, NV, MJI, AS), pp. 436–442.
DATE-2002-Leveugle #automation #detection #fault: Automatic Modifications of High Level VHDL Descriptions for Fault Detection or Tolerance (RL), pp. 837–841.
DATE-2002-RigaudFRQ #communication #design #modelling: High-Level Modeling and Design of Asynchronous Arbiters for On-Chip Communication Systems (JBR, LF, MR, JQ), p. 1090.
DATE-2002-SavoiuSG #automation #concurrent #modelling #performance #simulation: Automated Concurrency Re-Assignment in High Level System Models for Efficient System-Level Simulation (NS, SKS, RKG), pp. 875–881.
DATE-2002-Sheehan #library: Library Compatible Ceff for Gate-Level Timing (BNS), pp. 826–830.
DATE-2002-WuK #algorithm: Exploiting Idle Cycles for Algorithm Level Re-Computing (KW, RK), pp. 842–846.
SIGMOD-2002-PossSKL #benchmark #metric: TPC-DS, taking decision support benchmarking to the next level (MP, BS, LK, PÅL), pp. 582–587.
ITiCSE-2002-Hazzan #abstraction #concept #learning: Reducing abstraction level when learning computability theory concepts (OH), pp. 156–160.
ITiCSE-2002-Joyce: Group work at postgraduate level: some issues (DJ), p. 220.
PASTE-2002-AkgulM #debugging #execution: Instruction-level reverse execution for debugging (TA, VJM), pp. 18–25.
WCRE-2002-JrW #algorithm #image #parallel: Exposing Data-Level Parallelism in Sequential Image Processing Algorithms (LBBJ, LMW), pp. 245–254.
WCRE-2002-MittermeirC #source code #spreadsheet: Finding High-Level Structures in Spreadsheet Programs (RM, MC), pp. 221–232.
ICALP-2002-GenestMSZ #infinity #model checking: Infinite-State High-Level MSCs: Model-Checking and Realizability (BG, AM, HS, MZ), pp. 657–668.
CHI-2002-DruckerGMW #named #video: SmartSkip: consumer level browsing and skipping of digital video content (SMD, AG, SDM, CW), pp. 219–226.
SIGAda-2002-Conn #ada: Ada, CMM level 4, and the C-130J aircraft (RC), p. 10.
ICEIS-2002-OliveiraFL #approach #framework #named: Frameworks — A High Level Instantiation Approach (TCdO, IMF, CJPdL), pp. 650–657.
CIKM-2002-Al-KhalifaJ #multi #query #xml: Multi-level operator combination in XML query processing (SAK, HVJ), pp. 134–141.
ICML-2002-KleinKM #clustering #constraints #information management: From Instance-level Constraints to Space-Level Constraints: Making the Most of Prior Knowledge in Data Clustering (DK, SDK, CDM), pp. 307–314.
ICPR-v1-2002-HoBG #3d #automation #contest #evolution #segmentation: Level-Set Evolution with Region Competition: Automatic 3-D Segmentation of Brain Tumors (SH, EB, GG), p. 532–?.
ICPR-v2-2002-MassadBM #image: Perceptual Grouping in Grey-Level Images by Combination of Gabor Filtering and Tensor Voting (AM, MB, BM), pp. 677–680.
ICPR-v2-2002-SvenssonNAB #distance #image #representation #using: Using Grey-Level and Distance Information for Medial Surface Representation of Volume Images (SS, IN, CA, GSdB), pp. 324–327.
ICPR-v3-2002-BresEG #clustering #documentation: Unsupervised Clustering of Text Entities in Heterogeneous Grey Level Documents (SB, VE, AG), pp. 224–227.
ICPR-v3-2002-FrelicotRC #recognition: School Level Recognition from Children’s Drawings and Writings (CF, CR, PC), pp. 493–496.
ICPR-v3-2002-Horiuchi #estimation #image #probability: Estimation of Color for Gray-level Image by Probabilistic Relaxation (TH), pp. 867–870.
ICPR-v3-2002-LefevreMV #classification #process #segmentation: A Two Level Classifier Process for Audio Segmentation (SL, BM, NV), pp. 891–894.
ICPR-v3-2002-SuriLSL #3d #automation: Automatic Local Effect of Window/Level on 3-D Scale-Space Ellipsoidal Filtering on Run-Off-Arteries from White Blood Magnetic Resonanc Angiography (JSS, KL, SS, SL), pp. 899–902.
ICPR-v4-2002-BrittoSBS #predict #recognition #string: A String Length Predictor to Control the Level Building of HMMs for Handwritten Numeral Recognition (AdSBJ, RS, FB, CYS), pp. 31–34.
ICPR-v4-2002-ChristoudiasGM #low level: Synergism in Low Level Vision (CMC, BG, PM), pp. 150–155.
SEKE-2002-BryantBARO #assembly #component #generative #specification #two-level grammar #using: Formal specification of generative component assembly using two-level grammar (BRB, CCB, MA, RRR, AMO), pp. 209–212.
OOPSLA-2002-SutterBB #c++ #low level #reuse: Sifting out the mud: low level C++ code reuse (BDS, BDB, KDB), pp. 275–291.
PADL-2002-ShenSNS #eclipse #interface #programming language: A High-Level Generic Interface to External Programming Languages for ECLiPSe (KS, JS, SN, JS), pp. 262–279.
SPLC-2002-DeursenJK #product line #using: Feature-Based Product Line Instantiation Using Source-Level Packages (AvD, MdJ, TK), pp. 217–234.
ASPLOS-2002-MartinezT #concurrent #parallel #thread: Speculative synchronization: applying thread-level speculation to explicitly parallel applications (JFM, JT), pp. 18–29.
CC-2002-HendersonS #c #compilation: Compiling Mercury to High-Level C Code (FH, ZS), pp. 197–212.
HPCA-2002-CarreraRIB #clustering #communication: User-Level Communication in Cluster-Based Servers (EVC, SR, LI, RB), pp. 275–286.
HPCA-2002-SteffanCZM #communication #concurrent #thread: Improving Value Communication for Thread-Level Speculation (JGS, CBC, AZ, TCM), pp. 65–75.
LCTES-SCOPES-2002-MilnerD #performance #pipes and filters: Quick piping: a fast, high-level model for describing processor pipelines (CWM, JWD), pp. 175–184.
ICLP-2002-JamilD #database #deduction #multi #semantics: A Model Theoretic Semantics for Multi-level Secure Deductive Databases (HMJ, GD), pp. 130–147.
ASE-2001-GrundyCL #architecture #distributed #generative: Generation of Distributed System Test-Beds from High-Level Software Architecture Descriptions (JCG, YC, AL), pp. 193–200.
ASE-2001-MarcusM #concept #identification #source code: Identification of High-Level Concept Clones in Source Code (AM, JIM), pp. 107–114.
DAC-2001-CongR #clustering #multi: Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping (JC, MR), pp. 389–394.
DAC-2001-DoboliV #constraints #design #synthesis: Integrated High-Level Synthesis and Power-Net Routing for Digital Design under Switching Noise Constraints (AD, RV), pp. 629–634.
DAC-2001-GuptaSKDGN #design #synthesis: Speculation Techniques for High Level Synthesis of Control Intensive Designs (SG, NS, SK, NDD, RKG, AN), pp. 269–272.
DAC-2001-LaiC #testing: Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip (WCL, KTC), pp. 59–64.
DAC-2001-LiebmannLHG #design #logic: Enabling Alternating Phase Shifted Mask Designs for a Full Logic Gate Level: Design Rules and Design Rule Checking (LL, JL, FLH, IG), pp. 79–84.
DAC-2001-NandiM #analysis #design #embedded #performance: System-Level Power/Performance Analysis for Embedded Systems Design (AN, RM), pp. 599–604.
DAC-2001-OckunzziP #algorithm: Test Strategies for BIST at the Algorithmic and Register-Transfer Levels (KAO, CAP), pp. 65–70.
DAC-2001-PeymandoustM #algebra #algorithm #synthesis #using: Using Symbolic Algebra in Algorithmic Level DSP Synthesis (AP, GDM), pp. 277–282.
DAC-2001-TanRLJ #energy #megamodelling: High-level Software Energy Macro-modeling (TKT, AR, GL, NKJ), pp. 605–610.
DAC-2001-WangRLJ #adaptation #design #energy #optimisation #performance: Input Space Adaptive Design: A High-level Methodology for Energy and Performance Optimization (WW, AR, GL, NKJ), pp. 738–743.
DATE-2001-BadarogluHGDMGEB #generative #multi #scalability #simulation: High-level simulation of substrate noise generation from large digital circuits with multiple supplies (MB, MvH, VG, SD, HDM, GGEG, ME, IB), pp. 326–330.
DATE-2001-CheynetNVRRV #automation #evaluation #program transformation #safety: System safety through automatic high-level code transformations: an experimental evaluation (PC, BN, RV, MR, MSR, MV), pp. 297–301.
DATE-2001-DasguptaCNKC #abstraction #component #linear: Abstraction of word-level linear arithmetic functions from bit-level component descriptions (PD, PPC, AN, SK, AC), pp. 4–8.
DATE-2001-GajskiVRGBPECJ #concurrent #specification: C/C++: progress or deadlock in system-level specification (DG, EV, WR, VG, DB, JP, SEE, PC, GGdJ), pp. 136–137.
DATE-2001-MarculescuN #analysis #modelling #probability: Probabilistic application modeling for system-level perfromance analysis (RM, AN), pp. 572–579.
DATE-2001-NicolescuYJ #communication #design #refinement: Mixed-level cosimulation for fine gradual refinement of communication in SoC design (GN, SY, AAJ), pp. 754–759.
DATE-2001-PomeranzR #order #sequence: Sequence reordering to improve the levels of compaction achievable by static compaction procedures (IP, SMR), pp. 214–218.
DATE-2001-RoussellePBMV #embedded #fault: A register-transfer-level fault simulator for permanent and transient faults in embedded processors (CR, MP, AB, TM, HTV), p. 811.
DATE-2001-SiegmundM #communication #design #interface #modelling #multi #named: SystemCSV — an extension of SystemC for mixed multi-level communication modeling and interface-based system design (RS, DM), pp. 26–33.
DATE-2001-Zhu #abstraction #design #named: MetaRTL: raising the abstraction level of RTL design (JZ), pp. 71–76.
DocEng-2001-NaF #analysis #authoring #documentation #hypermedia #petri net #using: Dynamic documents: authoring, browsing, and analysis using a high-level petri net-based hypermedia system (JCN, RF), pp. 38–47.
ICDAR-2001-PitrelliR #modelling #recognition: Creating Word-Level Language Models for Handwriting Recognition (JFP, AR), pp. 721–725.
ICDAR-2001-TayKLKV #recognition #word: An Analytical Handwritten Word Recognition System with Word-level Discriminant Training (YHT, MK, PML, SK, CVG), pp. 726–730.
ICDAR-2001-VincentF #approach #quantifier: Gray Level Use in a Handwriting Fractal Approach and Morphological Properties Quantification (NV, TF), pp. 307–311.
VLDB-2001-PatonG #information management: Information Management for Genome Level Bioinformatics (NWP, CAG).
CSEET-2001-Tilley #case study #estimation: Preliminary Results from a Case Study of Effort Estimation for Net-Centric Applications at the Undergraduate Level (SRT), p. 56–?.
FASE-J-1998-PadbergGE01 #refinement #rule-based #safety: Rule-based refinement of high-level nets preserving safety properties (JP, MG, CE), pp. 97–118.
ESOP-2001-GraunkeKHF #programming language #web: Programming the Web with High-Level Programming Languages (PTG, SK, SVDH, MF), pp. 122–136.
ESOP-2001-KatsumataO #decompiler #low level: Proof-Directed De-compilation of Low-Level Code (SyK, AO), pp. 352–366.
FASE-2001-NieseSMHBI #consistency #design #industrial #testing: Library-Based Design and Consistency Checking of System-Level Industrial Test Cases (ON, BS, TMS, AH, GB, HDI), pp. 233–248.
FoSSaCS-2001-BuscemiS #calculus #petri net: High-Level Petri Nets as Type Theories in the Join Calculus (MGB, VS), pp. 104–120.
SCAM-2001-BartoliniP #embedded #performance: An Object Level Transformation Technique to Improve the Performance of Embedded Applications (SB, CAP), pp. 26–34.
WCRE-2001-CifuentesWE #analysis #debugging #decompiler #security: Computer Security Analysis through Decompilation and High-Level Debugging (CC, TW, MVE), pp. 375–380.
PLDI-2001-DeLineF #bytecode #low level #protocol: Enforcing High-Level Protocols in Low-Level Software (RD, MF), pp. 59–69.
DLT-2001-GlasserS: Level 5/2 of the Straubing-Thérien Hierarchy for Two-Letter Alphabets (CG, HS), pp. 251–261.
ICALP-2001-MuschollP #communication #finite #protocol #sequence chart: From Finite State Communication Protocols to High-Level Message Sequence Charts (AM, DP), pp. 720–731.
FME-2001-ArditiBCS #generative #testing #validation: Coverage Directed Generation of System-Level Test Cases for the Validation of a DSP System (LA, HB, AC, VS), pp. 449–464.
ICFP-2001-Sheard #unification: Generic Unification via Two-Level Types and Parameterized Modules (TS), pp. 86–97.
SEKE-2001-Mellor #abstraction #execution: Raising the Level of Abstraction: Model Execution and Translation (SJM), p. 1.
SIGIR-2001-SaraivaMFMRZ #scalability: Rank-Preserving Two-Level Caching for Scalable Search Engines (PCS, ESdM, RCF, WMJ, BARN, NZ), pp. 51–58.
UML-2001-AlvarezES #architecture #metamodelling: Mapping between Levels in the Metamodel Architecture (JMÁ, AE, PS), pp. 34–46.
PPDP-2001-PenaR #abstraction #functional #parallel #programming: Parallel Functional Programming at Two Levels of Abstraction (RP, FR), pp. 187–198.
PADL-2001-FlenerHK #compilation #constraints #programming: Compiling High-Level Type Constructors in Constraint Programming (PF, BH, ZK), pp. 229–244.
PADL-2001-Hanus #web: High-Level Server Side Web Scripting in Curry (MH), pp. 76–92.
PADL-2001-Leuschel #csp #design #implementation #prolog #specification: Design and Implementation of the High-Level Specification Language CSP(LP) in Prolog (ML), pp. 14–28.
RE-2001-Stevens #enterprise: Systems Engineering at the Enterprise Level (RS), p. 276.
LCTES-OM-2001-LeeEMC #embedded #energy: An Accurate Instruction-Level Energy Consumption Model for Embedded RISC Processors (SL, AE, SLM, NC), pp. 1–10.
PPoPP-2001-VeldemaHBJB #distributed #memory management #optimisation: Source-level global optimizations for fine-grain distributed shared memory systems (RV, RFHH, RB, CJHJ, HEB), pp. 83–92.
PPoPP-2001-VossE #adaptation #optimisation: High-level adaptive program optimization with ADAPT (MV, RE), pp. 93–102.
SOSP-2001-HeidemannSIGEG #low level #network #performance: Building Efficient Wireless Sensor Networks with Low-Level Naming (JSH, FS, CI, RG, DE, DG), pp. 146–159.
CAV-2001-JohannsenB #design #named: BooStER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstarction (PJ), pp. 373–377.
LICS-2001-JaninL #calculus #monad #μ-calculus: Relating Levels of the μ-Calculus Hierarchy and Levels of the Monadic Hierarchy (DJ, GL), pp. 347–356.
SAT-2001-RanderathSBHKMSC #graph #problem #satisfiability: A Satisfiability Formulation of Problems on Level Graphs (BR, ES, EB, PLH, AK, KM, BS, OC), pp. 269–277.
DAC-2000-BorosRP #configuration management #multi: High-level model of a WDMA passive optical bus for a reconfigurable multiprocessor system (VEB, ADR, SP), pp. 221–226.
DAC-2000-BrandoleseFSS #energy #estimation: An instruction-level functionally-based energy estimation model for 32-bits microprocessors (CB, WF, FS, DS), pp. 346–351.
DAC-2000-CongLW #clustering #multi #performance: Performance driven multi-level and multiway partitioning with retiming (JC, SKL, CW), pp. 274–279.
DAC-2000-EllerveeMCH #data type: System-level data format exploration for dynamically allocated data structures (PE, MM, FC, AH), pp. 556–559.
DAC-2000-HeijningenBDEB #generative #power management #simulation: High-level simulation of substrate noise generation including power supply noise coupling (MvH, MB, SD, ME, IB), pp. 446–451.
DAC-2000-HuangC #composition #constraints: Assertion checking by combined word-level ATPG and modular arithmetic constraint-solving techniques (CYH, KTC), pp. 118–123.
DAC-2000-KrishnaswamyCT #fault #simulation: A switch level fault simulation environment (VK, JC, TT), pp. 780–785.
DAC-2000-NarasimhanR #bound #on the #problem #scheduling #synthesis: On lower bounds for scheduling problems in high-level synthesis (MN, JR), pp. 546–551.
DAC-2000-QuKUP #estimation: Function-level power estimation methodology for microprocessors (GQ, NK, KU, MP), pp. 810–813.
DAC-2000-VandersteenWRDDEB #data flow #performance #simulation: A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers (GV, PW, YR, PD, SD, ME, IB), pp. 440–445.
DAC-2000-WangKS #clustering #latency #memory management #scheduling: Optimal two level partitioning and loop scheduling for hiding memory latency for DSP applications (ZW, MK, EHMS), pp. 540–545.
DATE-2000-BeniniCMMPS #estimation: A Discrete-Time Battery Model for High-Level Power Estimation (LB, GC, AM, EM, MP, RS), pp. 35–39.
DATE-2000-BringmannRM #architecture #multi #synthesis: Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation (OB, WR, CM), pp. 326–332.
DATE-2000-CatthoorDK #architecture #compilation #data transfer #how #memory management #question: How to Solve the Current Memory Access and Data Transfer Bottlenecks: At the Processor Architecture or at the Compiler Level? (FC, NDD, CEK), pp. 426–433.
DATE-2000-CiricYS #implementation #logic #using: Delay Minimization and Technology Mapping of Two-Level Structures and Implementation Using Clock-Delayed Domino Logic (JC, GY, CS), pp. 277–282.
DATE-2000-CornoRSMP #automation #experience #generative #industrial #validation: Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience (FC, MSR, GS, AM, AP), pp. 385–389.
DATE-2000-DubrovaEMM #algorithm #named #optimisation: TOP: An Algorithm for Three-Level Optimization of PLDs (ED, PE, DMM, JCM), p. 751.
DATE-2000-FrohlichGF #clustering #parallel #simulation: A New Partitioning Method for Parallel Simulation of VLSI Circuits on Transistor Level (NF, VG, JF), pp. 679–684.
DATE-2000-GuptaGMC #analysis #program transformation #programmable: Analysis of High-Level Address Code Transformations for Programmable Processors (SG, RKG, MM, FC), pp. 9–13.
DATE-2000-LennardSJHH #design #question #standard: Standards for System-Level Design: Practical Reality or Solution in Search of a Question? (CKL, PS, GGdJ, AH, PH), pp. 576–583.
DATE-2000-MorawiecUR #algorithm #diagrams #simulation #using: Cycle-Based Simulation Algorithms for Digital Systems Using High-Level Decision Diagrams (AM, RU, JR), p. 743.
DATE-2000-MunchWWMS #automation #power management: Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths (MM, NW, BW, RM, JS), pp. 624–631.
DATE-2000-Perez-MontesMDFR #named: XFridge: A SPICE-Based, Portable, User-Friendly Cell-Level Sizing Tool (FMPM, FM, RDC, FVF, ÁRV), p. 739.
DATE-2000-RamanathanG #algorithm #online #power management: System Level Online Power Management Algorithms (DR, RKG), pp. 606–611.
DATE-2000-RustSAT #embedded #implementation #parallel #realtime #specification: From High-Level Specifications Down to Software Implementations of Parallel Embedded Real-Time Systems (CR, FS, PA, JT), pp. 686–691.
DATE-2000-Saab #algorithm #clustering #effectiveness #multi #performance: A New Effective And Efficient Multi-Level Partitioning Algorithm (YS), pp. 112–116.
DATE-2000-SchonherrS #algorithm #automation #equivalence: Automatic Equivalence Check of Circuit Descriptions at Clocked Algorithmic and Register Transfer Level (JS, BS), p. 759.
DATE-2000-ShenoyBC #algorithm #quality #synthesis: A System-Level Synthesis Algorithm with Guaranteed Solution Quality (UNS, PB, ANC), pp. 417–424.
DATE-2000-SousaA #clustering #complexity #fault #modelling #using: Reducing the Complexity of Defect Level Modeling Using the Clustering Effect (JTdS, VDA), pp. 640–644.
DATE-2000-VerkestKS #c++ #design #using: System Level Design Using C++ (DV, JK, FS), pp. 74–81.
DATE-2000-VermeulenCMV #embedded #reuse: Formalized Three-Layer System-Level Reuse Model and Methodology for Embedded Data-Dominated Applications (FV, FC, HDM, DV), pp. 92–98.
HT-2000-NaF #hypermedia #petri net: Context-aware hypermedia in a dynamically-changing environment, supported by a high-level Petri net (JCN, RF), pp. 222–223.
FASE-2000-PadbergHG #algebra #safety: Stepwise Introduction and Preservation of Safety Properties in Algebraic High-Level Net Systems (JP, KH, MG), pp. 249–265.
TACAS-2000-CastilloW #model checking: Model Checking Support for the ASM High-Level Language (GDC, KW), pp. 331–346.
TACAS-2000-Schmidt #analysis #low level #reachability #symmetry: Integrating Low Level Symmetries into Reachability Analysis (KS0), pp. 315–330.
IWPC-2000-AntoniolCM #identification: Identification of Lower-Level Artifacts (GA, GC, EM), p. 253.
IWPC-2000-CounsellNM #architecture #object-oriented #reverse engineering #testing: Architectural Level Hypothesis Testing through Reverse Engineering of Object-Oriented Software (SC, PN, EM), pp. 60–66.
WCRE-2000-Godfrey: Defining, Transforming, and Exchanging High-Level Schemas (MWG), pp. 290–292.
WCRE-2000-MuthannaKPS #design #industrial #maintenance #metric #using: A Maintainability Model for Industrial Software Systems using Design Level Metrics (SM, KK, KP, BS), p. 248–?.
PLDI-2000-LarsenA #parallel #set: Exploiting superword level parallelism with multimedia instruction sets (SL, SPA), pp. 145–156.
PLDI-2000-YiAK #memory management #multi #recursion: Transforming loops to recursion for multi-level memory hierarchies (QY, VSA, KK), pp. 169–181.
ICALP-2000-AlstrupH #algorithm: Improved Algorithms for Finding Level Ancestors in Dynamic Trees (SA, JH), pp. 73–84.
CHI-2000-Balter #analysis #email: Keystroke level analysis of email message organization (OB), pp. 105–112.
CHI-2000-MankoffHA #ambiguity #interface: Providing integrated toolkit-level support for ambiguity in recognition-based interfaces (JM, SEH, GDA), pp. 368–375.
AdaEurope-2000-BriotBC #ada #design #implementation #named: GtkAda: Design and Implementation of a High Level Binding in Ada (EB, JB, AC), pp. 112–124.
AdaEurope-2000-DeshpandeCT #behaviour #object-oriented #reliability #simulation: Improving the Reliability of Object-Oriented Software through Object-Level Behavioral Simulation (MD, FPC, JT), pp. 266–279.
EDOC-2000-QuEM #framework #implementation #protocol: Implementation of an Enterprise-Level Groupware System Based on J2EE Platform and WebDAV Protocol (CQ, TE, CM), pp. 160–169.
ICML-2000-CravenPSBG #coordination #learning #multi #using: Using Multiple Levels of Learning and Diverse Evidence to Uncover Coordinately Controlled Genes (MC, DP, JWS, JB, JDG), pp. 199–206.
ICML-2000-WagstaffC #clustering #constraints: Clustering with Instance-level Constraints (KW, CC), pp. 1103–1110.
ICPR-v1-2000-BaillardHB #3d #segmentation #set: Cooperation between Level Set Techniques and Dense 3D Registration for the Segmentation of Brain Structures (CB, PH, CB), pp. 1991–1994.
ICPR-v1-2000-BrandM #assessment #comparative #detection: A Comparative Assessment of Three Approaches to Pixel-Level Human Skin-Detection (JB, JSDM), pp. 5056–5059.
ICPR-v1-2000-VilarinoCPB: Pixel-Level Snakes (DLV, DC, XMP, VMB), pp. 1640–1643.
ICPR-v3-2000-AlbregtsenND #adaptation #distance #matrix: Adaptive Gray Level Run Length Features from Class Distance Matrices (FA, BN, HED), pp. 3746–3749.
ICPR-v3-2000-CostaBG #algorithm #feature model: Level Curve Tracking Algorithm for Textural Feature Extraction (JPDC, PB, CG), pp. 3921–3924.
ICPR-v3-2000-DeschenesZ #detection #image: Detection of Line Junctions in Gray-Level Images (FD, DZ), pp. 3762–3765.
ICPR-v3-2000-GarciaV #geometry #image: Acceleration of Thresholding and Labeling Operations through Geometric Processing of Gray-Level Images (MAG, BXV), pp. 3429–3432.
ICPR-v3-2000-Jehan-BessonBA #detection #set #using: Detection and Tracking of Moving Objects using a New Level Set Based Method (SJB, MB, GA), pp. 7112–7117.
ICPR-v3-2000-LeiHR #detection #image #low level: Detecting Generic Low-Level Features in Images (BJL, EAH, MJTR), pp. 3979–3982.
ICPR-v3-2000-LuoT #approach #multi #using: Multi-Level Thresholding: Maximum Entropy Approach Using ICM (XL, JT), pp. 3786–3789.
ICPR-v3-2000-Papamarkos #network #reduction #using: Using Local Features in a Neural Network Based Gray-Level Reduction Technique (NP), pp. 7037–7040.
ICPR-v3-2000-ZhaMH #data type #multi #using: Dynamic Control of Mesh LODs (Levels of Detail) by Using a Multiresolution Mesh Data Structure (HZ, YM, TH), pp. 3505–3509.
KDD-2000-LiuHH #multi #summary: Multi-level organization and summarization of the discovered rules (BL, MH, WH), pp. 208–217.
KDD-2000-PairceirMS #database #distributed #exception #multi: Discovery of multi-level rules and exceptions from a distributed database (RP, SIM, BWS), pp. 523–532.
UML-2000-DammHTT #strict #uml: Supporting Several Levels of Restriction in the UML (CHD, KMH, MT, MT), pp. 396–409.
SAIG-2000-KaminCC #component #generative #lightweight: Lightweight and Generative Components 2: Binary-Level Components (SNK, MC, LC), pp. 28–50.
SAC-2000-Ionescu #memory management #multi #realtime: Application-Level Virtual Memory Management in Real-Time Multiprocessor Systems (FI), pp. 610–614.
ICSE-2000-CorbettDHR #interface #java #model checking #named #source code: Bandera: a source-level interface for model checking Java programs (JCC, MBD, JH, R), pp. 762–765.
ICSE-2000-Jalote #tutorial: Moving from ISO9000 to higher levels of the CMM (tutorial session) (PJ), p. 823.
ICSE-2000-LabicheTWD #object-oriented #testing: Testing levels for object-oriented software (YL, PTF, HW, MHD), pp. 136–145.
ASPLOS-2000-ChouCEH #compilation #protocol #using: Using Meta-level Compilation to Check FLASH Protocol Code (AC, BC, DRE, MH), pp. 59–70.
ASPLOS-2000-FlautnerURM #concurrent #interactive #parallel #performance #thread: Thread Level Parallelism and Interactive Performance of Desktop Applications (KF, RU, SKR, TNM), pp. 129–138.
HPCA-2000-BarrosoGNV #integration #performance: Impact of Chip-Level Integration on Performance of OLTP Workloads (LAB, KG, AN, BV), pp. 3–14.
HPCA-2000-WongB #behaviour #policy: Modified LRU Policies for Improving Second-Level Cache Behavior (WAW, JLB), pp. 49–60.
CADE-2000-Harrison #proving #theorem proving #using #verification: High-Level Verification Using Theorem Proving and Formalized Mathematics (JH), pp. 1–6.
CADE-2000-Meier #proving: System Description: TRAMP: Transformation of Machine-Found Proofs into ND-Proofs at the Assertion Level (AM), pp. 460–464.
ASE-1999-CazzolaSST #architecture #behaviour #rule-based: Rule-Based Strategic Reflection: Observing and Modifying Behavior at the Architectural Level (WC, AS, AS, FT), pp. 263–266.
DAC-1999-Bergamaschi #behaviour #graph #logic #network #synthesis: Behavioral Network Graph: Unifying the Domains of High-Level and Logic Synthesis (RAB), pp. 213–218.
DAC-1999-BertaccoDQ #simulation: Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits (VB, MD, SQ), pp. 391–396.
DAC-1999-CampenhoutMH #design #generative #pipes and filters #testing #verification: High-Level Test Generation for Design Verification of Pipelined Microprocessors (DVC, TNM, JPH), pp. 185–188.
DAC-1999-ChinosiZG #clustering #parallel #simulation: Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning (MC, RZ, CG), pp. 562–567.
DAC-1999-Harbison #hardware #trade-off: System-Level Hardware/Software Trade-offs (SPH), pp. 258–259.
DAC-1999-LakshminarayanaRKJD #optimisation #performance: Common-Case Computation: A High-Level Technique for Power and Performance Optimization (GL, AR, KSK, NKJ, SD), pp. 56–61.
DAC-1999-LavagnoS #design #named #specification: ECL: A Specification Environment for System-Level Design (LL, ES), pp. 511–516.
DAC-1999-ParkC #scheduling: Performance-Driven Scheduling with Bit-Level Chaining (SP, KC), pp. 286–291.
DAC-1999-PegatoquetGAB #agile #development: Rapid Development of Optimized DSP Code from a High Level Description Through Software Estimations (AP, EG, MA, LB), pp. 823–826.
DAC-1999-SchaumontCVEB #behaviour #hardware #reuse: Hardware Reuse at the Behavioral Level (PS, RC, SV, ME, IB), pp. 784–789.
DAC-1999-WilkesH #design #hardware #interface: Application of High Level Interface-Based Design to Telecommunications System Hardware (DW, MMKH), pp. 778–783.
DAC-1999-YehCCJ #design: Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications (CWY, MCC, SCC, WBJ), pp. 68–71.
DAC-1999-ZhuG #scheduling #synthesis: Soft Scheduling in High Level Synthesis (JZ, DG), pp. 219–224.
DATE-1999-Arnout #c #design: C for System Level Design (GA), pp. 384–386.
DATE-1999-EvekingHR #automation #scheduling #synthesis #verification: Automatic Verification of Scheduling Results in High-Level Synthesis (HE, HH, GR), pp. 59–64.
DATE-1999-FeldmanKL #modelling #performance: Efficient Techniques for Modeling Chip-Level Interconnect, Substrate and Package Parasitics (PF, SK, DEL), pp. 418–417.
DATE-1999-FornaciariSS #embedded #encoding: Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems (WF, DS, CS), pp. 762–763.
DATE-1999-HorethD #specification #verification: Formal Verification of Word-Level Specifications (SH, RD), pp. 52–57.
DATE-1999-SantosT #fault #simulation #using: Defect-Oriented Mixed-Level Fault Simulation of Digital Systems-on-a-Chip Using HDL (MBS, JPT), p. 549–?.
DATE-1999-TragoudasM #fault #functional #tool support: ATPG Tools for Delay Faults at the Functional Level (ST, MKM), p. 631–?.
DATE-1999-X #ada #c #java #question #specification: Java, VHDL-AMS, ADA or C for System Level Specifications?, p. 720.
DATE-1999-YeCFCNC #design #verification: Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs (LY, FCC, PF, RC, NN, FC), pp. 658–663.
DATE-1999-ZhuG #design #named: OpenJ: An Extensible System Level Design Language (JZ, DG), pp. 480–484.
ICDAR-1999-CesariniFGS #approach #comprehension #documentation #multi: A Two Level Knowledge Approach for Understanding Documents of a Multi-Class Domain (FC, EF, MG, GS), pp. 135–138.
ICDAR-1999-LebourgeoisE #analysis #documentation #using: Document Analysis in Gray Level and Typography Extraction using Character Pattern Redundancies (FL, HE), pp. 177–180.
ICDAR-1999-RemakiC #documentation #image #kernel #product line #using #visual notation: Visual Data Extraction from Bi-level Document Images using a Generalized Kernel Family with Compact Support, in Scale-Space (LR, MC), pp. 609–612.
VLDB-1999-ChenCFGJMTW: High Level Indexing of User-Defined Types (WC, JHC, YCF, JG, MJ, NMM, BTT, YW), pp. 554–564.
VLDB-1999-NinkHR #database #generative #interface #programming: Generating Call-Level Interfaces for Advanced Database Application Programming (UN, TH, NR), pp. 575–586.
CSEET-1999-ThompsonE #case study #experience #re-engineering: Providing New Graduate Opportunities in Software Engineering: Experiences with a UK Master’s Level Conversion Course (JBT, HME), pp. 50–61.
TACAS-1999-BuchholzK #analysis #composition #distributed #tool support: Modular State Level Analysis of Distributed Systems Techniques and Tool Support (PB, PK), pp. 420–434.
CSMR-1999-BengtssonB #architecture #maintenance #predict: Architecture Level Prediction of Software Maintenance (PB, JB), pp. 139–147.
ICSM-1999-RichnerD #information management #object-oriented: Recovering High-Level Views of Object-Oriented Applications from Static and Dynamic Information (TR, SD), pp. 13–22.
STOC-1999-MuthukrishnanPSS #grid #multi #network: Compact Grid Layouts of Multi-Level Networks (SM, MP, SCS, TS), pp. 455–463.
ICALP-1999-CraryM #low level #programming language: Type Structure for Low-Level Programming Languages (KC, JGM), pp. 40–54.
AGTIVE-1999-GatzemeierM #authoring: Improving the Publication Chain Through High-Level Authoring Support (FHG, OM), pp. 255–262.
AGTIVE-1999-PetriuW #architecture #modelling #performance #uml: From UML Descriptions of High-Level Software Architectures to LQN Performance Models (DCP, XW), pp. 47–62.
HCI-CCAD-1999-YuCK #approximate #multi #using: Dynamic event filtering technique using multi-level path approximation in a shared virtual environment (SJY, YCC, KK), pp. 583–587.
HCI-EI-1999-ChenMRK #empirical #evaluation #metric: The Physiological Measurement of User Comfort Levels: An Evaluation Experiment for Comparing Three Types of CRTs (SC, YM, XR, HK), pp. 193–196.
HCI-EI-1999-TakahashiKMFK #adaptation #design #interface: Design of Interface for Operational Support of an Experimental Accelerator with adaptability to User Preference and Skill Level (MT, YK, SM, MF, MK), pp. 251–255.
AdaEurope-1999-RuizG #implementation #low level #runtime: Implementing a New Low-Level Tasking Support for the GNAT Runtime System (JFR, JMGB), pp. 298–307.
SIGAda-1999-Doran #ada #c #low level: Interfacing low-level C device drivers with Ada 95 (SD), pp. 133–143.
CAiSE-1999-JoerisH #flexibility #modelling #process #towards: Towards Flexible and High-Level Modeling and Enacting of Processes (GJ, OH), pp. 88–102.
ICEIS-1999-Gustas #analysis #approach #enterprise #information management: Integrated Approach for Information System Analysis at the Enterprise Level (RG), pp. 435–442.
ICEIS-1999-PopescuM #implementation #perspective: Organizational Level of Intelligent Robots-An Implementation Point of View (AP, GM), p. 779.
ICEIS-1999-RossiterNH #architecture #database #query: Three-Level Architecture for Query Closure in Database Systems (BNR, DAN, MAH), p. 760.
SIGIR-1999-HoenkampSS #category theory #retrieval: Supporting Content Retrieval from WWW via “Basic Level Categories” (poster abstract) (EH, OS, LS), pp. 311–312.
TOOLS-ASIA-1999-CheungCC #modelling #object-oriented #specification: Extending Formal Specification To Object-Oriented Models Through Level-View Structured Schemas (KSC, KOC, TYC), pp. 118–125.
TOOLS-ASIA-1999-LauderK #modelling: Two-Level Modeling (AL, SK), pp. 108–117.
TOOLS-ASIA-1999-TanLTP #architecture #evolution #multi #orthogonal #research #reuse: Research in Evolution and Reuse of Multi-Leveled Orthogonal Software System Architecture (KT, ZyL, SqT, DcP), pp. 204–211.
TOOLS-EUROPE-1999-EveredM #component #programming: Very High Level Programming with Collection Components (ME, GM), pp. 361–370.
TOOLS-PACIFIC-1999-ClarkN #user interface: Application Level User Interfaces for Various Media (DIC, JN), pp. 16–27.
TOOLS-USA-1999-FrankBBHY #adaptation #generative #modelling #process #quality: High level Modelling Languages, Adaptable Process Models and Software Generation: Drivers for Quality and Productivity (UF, DSB, JB, BHS, HY), pp. 563–570.
GCSE-1999-KaminCC #component #generative #lightweight: Lightweight and Generative Components I: Source-Level Components (SNK, MC, LC), pp. 49–64.
SAC-1999-PittsC #simulation #visualisation: Peripherality Based Level of Detail Switching as a Visualization Enhancement of High-Risk Simulations (GP, DC), pp. 98–104.
ICSE-1999-Fordham #maturity #process #question: Software Process Maturity: Is Level five Enough? (RGF), p. 611.
CC-1999-PatelR #implementation #parallel #runtime: Implementation Issues of Loop-Level Speculative Run-Time Parallelization (DP, LR), pp. 183–197.
HPDC-1999-KoussihAS #clustering #memory management #named: Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters (SK, AA, SS), pp. 301–308.
OSDI-1999-Keleher #abstraction #named: Tapeworm: High-Level Abstractions of Shared Accesses (PJK), pp. 201–214.
ASE-1998-GilE #design: Statically Checkable Design Level Traits (JYG, YE), pp. 217–220.
DAC-1998-ChenOIB #analysis #architecture #validation: Validation of an Architectural Level Power Analysis Technique (RYC, RMO, MJI, RSB), pp. 242–245.
DAC-1998-DartuP #analysis #named: TETA: Transistor-Level Engine for Timing Analysis (FD, LTP), pp. 595–598.
DAC-1998-GajskiVNG: System-level exploration with SpecSyn (DG, FV, SN, JG), pp. 812–817.
DAC-1998-GuerraPR #behaviour #optimisation: A Methodology for Guided Behavioral-Level Optimization (LMG, MP, JMR), pp. 309–314.
DAC-1998-NemaniN #estimation #perspective: Delay Estimation VLSI Circuits from a High-Level View (MN, FNN), pp. 591–594.
DAC-1998-SeawrightM #clustering #optimisation: Partitioning and Optimizing Controllers Synthesized from Hierarchical High-Level Descriptions (AS, WM), pp. 770–775.
DAC-1998-TarafdarL #data transfer #synthesis #using: The DT-Model: High-Level Synthesis Using Data Transfers (ST, ML), pp. 114–117.
DATE-1998-AllaraFSS #analysis #profiling: A Model for System-Level Timed Analysis and Profiling (AA, WF, FS, DS), pp. 204–210.
DATE-1998-BeniniMSMS #encoding #optimisation: Address Bus Encoding Techniques for System-Level Power Optimization (LB, GDM, DS, EM, CS), pp. 861–866.
DATE-1998-BringmannR #synthesis: Cross-Level Hierarchical High-Level Synthesis (OB, WR), pp. 451–456.
DATE-1998-GerlachR #design #estimation #scalability: A Scalable Methodology for Cost Estimation in a Transformational High-Level Design Space Exploration Environment (JG, WR), pp. 226–231.
DATE-1998-GoldbergKB #functional #specification #verification: Combinational Verification based on High-Level Functional Specifications (EIG, YK, RKB), pp. 803–808.
DATE-1998-GongCK #architecture #synthesis: Architectural Rule Checking for High-level Synthesis (JG, CTC, KK), pp. 949–950.
DATE-1998-HiguchiS #design: Innovative System-level Design Environment Based on FORM for Transport Processing System (KH, KS), pp. 883–890.
DATE-1998-HorethD #diagrams: Dynamic Minimization of Word-Level Decision Diagrams (SH, RD), pp. 612–617.
DATE-1998-KassabCAK #analysis #constraints: Propagation of Last-Transition-Time Constraints in Gate-Level Timing Analysis (MK, EC, SA, THK), pp. 796–802.
DATE-1998-KhouriLJ #control flow #named #power management #synthesis: IMPACT: A High-Level Synthesis System for Low Power Control-Flow Intensive Circuits (KSK, GL, NKJ), pp. 848–854.
DATE-1998-MaheshwariS #performance #scalability: Efficient Minarea Retiming of Large Level-Clocked Circuits (NM, SSS), pp. 840–845.
DATE-1998-Martin #design: Design Methodologies for System Level IP (GM), pp. 286–289.
DATE-1998-MendiasH #formal method #perspective #synthesis: Correct High-Level Synthesis: a Formal Perspective (JMM, RH), pp. 977–978.
DATE-1998-MirRVH #analysis #fault: Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems (SM, AR, DV, JLH), pp. 810–814.
DATE-1998-Mutz #modelling: Register Transfer Level VHDL Models without Clocks (MM), pp. 153–158.
DATE-1998-PostMG #design #hardware: A System-Level Co-Verification Environment for ATM Hardware Design (GP, AM, TG), pp. 424–428.
DATE-1998-RibasC #equivalence #incremental #on the #reuse #simulation #verification: On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits (LR, JC), pp. 624–629.
DATE-1998-Rosenstiel98a #design #generative #tool support: Next Generation System Level Design Tools (WR), p. 488–?.
DATE-1998-RudnickVECPR #generative #performance #testing #using: Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques (EMR, RV, AE, FC, PP, MSR), pp. 570–576.
DATE-1998-VandenbusscheDLGS #design #interface #specification #top-down: Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon (JV, SD, FL, GGEG, WMCS), pp. 716–720.
DATE-1998-XuK #architecture #synthesis: Layout-Driven High Level Synthesis for FPGA Based Architectures (MX, FJK), pp. 446–450.
DATE-1998-YangP #algorithm #performance #scheduling #synthesis: An Efficient Algorithm to Integrate Scheduling and Allocation in High-Level Test Synthesis (LTY, ZP), pp. 74–81.
ITiCSE-1998-King #education #evaluation #student #topic: An evaluation of strategies for teaching technical computing topics to students at different levels (poster) (CK), p. 285.
FASE-1998-PadbergGE #refinement #rule-based #safety: Rule-Based Refinement of High-Level Nets Preserving Safety Properties (JP, MG, CE), pp. 221–238.
FoSSaCS-1998-Moggi #category theory: Functor Categories and Two-Level Languages (EM), pp. 211–225.
ICSM-1998-CifuentesSF #assembly: Assembly to High-Level Language Translation (CC, DS, AF), pp. 228–237.
IWPC-1998-MancoridisMRCG #automation #clustering #source code #using: Using Automatic Clustering to Produce High-Level System Organizations of Source Code (SM, BSM, CR, YFC, ERG), pp. 45–52.
FM-1998-Borger #analysis #design #state machine #using: High Level System Design and Analysis Using Abstract State Machines (EB), pp. 1–43.
TAGT-1998-KreowskiV: Redundancy and Subsumption in High-Level Replacement Systems (HJK, GV), pp. 215–227.
AdaEurope-1998-ArabanS #library #object-oriented: A Two-Level Matching Mechanism for Object-Oriented Class Libraries (SA, ASMS), pp. 188–200.
EDOC-1998-SyrbeP #analysis: An enterprise-level analysis of customer-provider relationships and implications for QoS enforcement (JHS, TP), pp. 208–217.
CIKM-1998-LiYC #abstraction #database #framework #mining #multi #named #sequence: MALM: A Framework for Mining Sequence Database at Multiple Abstraction Levels (CSL, PSY, VC), pp. 267–272.
ICPR-1998-BorgeforsRB: Coarse-to-fine skeletons from grey-level pyramids (GB, GR, GSdB), pp. 400–402.
ICPR-1998-FlorianiMP #3d #re-engineering #representation: Managing the level of detail in 3D shape reconstruction and representation (LDF, PM, EP), pp. 389–391.
ICPR-1998-Sluzek #multi #segmentation #using: Multi-level contour segmentation using multiple segmentation primitives (AS), pp. 741–743.
ICPR-1998-YahiaB #segmentation #set: Segmentation of deformable templates with level sets characterized by particle systems (HMY, JPB), pp. 1421–1423.
KR-1998-GiacomoRS #execution #monitoring #source code: Execution Monitoring of High-Level Robot Programs (GDG, RR, MS), pp. 453–465.
ECOOP-1998-CordsenS #case study #experience #memory management #paradigm #using: Experiences Developing a Virtual Shared Memory System Using High-Level Object Paradigms (JC, JN, WSP), pp. 285–306.
OOPSLA-1998-WalkerMFWSI #modelling #visualisation: Visualizing Dynamic Software System Information Through High-Level Models (RJW, GCM, BNFB, DW, DS, JI), pp. 271–283.
REFSQ-1998-Paech #case study: The Four Levels of Use Case Description (BP), pp. 207–218.
SAC-1998-EconomakosPT #attribute grammar #multi #synthesis: Incorporating multi-pass attribute grammars for the high-level synthesis of ASICs (GE, GKP, PT), pp. 45–49.
ICSE-1998-KellerS #component #composition #design #towards: Design Components: Towards Software Composition at the Design Level (RKK, RS), pp. 302–311.
ASPLOS-1998-LeeBFSBSA #parallel #scheduling: Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine (WL, RB, MF, DS, JB, VS, SPA), pp. 46–57.
CC-1998-LapkowskiH #multi #pointer: Extended SSA Numbering: Introducing SSA Properties to Language with Multi-level Pointers (CL, LJH), pp. 128–143.
HPCA-1998-JimenezLF #evaluation #performance: Performance Evaluation of Tiling for the Register Level (MJ, JML, AF), pp. 254–265.
HPCA-1998-SteffanM #automation #concurrent #parallel #thread #using: The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization (JGS, TCM), pp. 2–13.
LCTES-1998-LiuG #analysis #automation #bound: Automatic Accurate Time-Bound Analysis for High-Level Languages (YAL, GG), pp. 31–40.
LCTES-1998-LundqvistS #analysis #simulation #using: Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques (TL, PS), pp. 1–15.
LCTES-1998-SeoPH #operating system #performance #realtime: Efficient User-Level I/O in the ARX Real-Time Operating System (YS, JP, SH), pp. 166–175.
JICSLP-1998-DecorteS #analysis #termination: Termination Analysis: Some Practical Properties of the Norm and Level Mapping Space (SD, DDS), pp. 235–249.
JICSLP-1998-Zhou #algorithm #compilation #constraints: A High-Level Intermediate Language and the Algorithms for Compiling Finite-Domain Constraints (NFZ), pp. 70–84.
DAC-1997-Brodersen #design #empirical #integration #named: InfoPad — An Experiment in System Level Design and Integration (RWB), pp. 313–314.
DAC-1997-GuptaN #estimation #megamodelling: Power Macromodeling for High Level Power Estimation (SG, FNN), pp. 365–370.
DAC-1997-KimC #synthesis #using: Power-conscious High Level Synthesis Using Loop Folding (DK, KC), pp. 441–445.
DAC-1997-KirovskiP #power management #realtime #synthesis: System-Level Synthesis of Low-Power Hard Real-Time Systems (DK, MP), pp. 697–702.
DAC-1997-LiW #memory management #multi #synthesis: A Task-Level Hierarchical Memory Model for System Synthesis of Multiprocessors (YL, WW), pp. 153–156.
DAC-1997-MaciiPS #estimation #modelling #optimisation: High-Level Power Modeling, Estimation, and Optimization (EM, MP, FS), pp. 504–511.
DAC-1997-MirROPH #automation #evaluation #fault #named #simulation: SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems (SM, AR, TO, EJP, JLH), pp. 281–286.
DAC-1997-PotkonjakKK #behaviour #case study #design: Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study (MP, KK, RK), pp. 252–257.
DAC-1997-RamprasadSH #estimation #process #statistics: Analytical Estimation of Transition Activity From Word-Level Signal Statistics (SR, NRS, INH), pp. 582–587.
DAC-1997-Tirat-GefenSP #design #multi: Incorporating Imprecise Computation into System-Level Design of Application-Specific Heterogeneous Multiprocessors (YGTG, DCdSJ, ACP), pp. 58–63.
DAC-1997-WillemsBKGM #approach #design #fixpoint: System Level Fixed-Point Design Based on an Interpolative Approach (MW, VB, HK, TG, HM), pp. 293–298.
EDTC-1997-BensoPRRU #approach #fault #graph #low level: A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs (AB, PP, MR, MSR, RU), pp. 560–565.
EDTC-1997-ChakrabortyM #bound #functional #parallel #programmable #testing: A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs (KC, PM), pp. 330–334.
EDTC-1997-CrenshawS #estimation: Accurate high level datapath power estimation (JEC, MS), pp. 590–596.
EDTC-1997-DonnayGSKLB #interface #synthesis: High-level synthesis of analog sensor interface front-ends (SD, GGEG, WMCS, WK, DL, WvB), pp. 56–60.
EDTC-1997-DrechslerHSHB #testing: Testability of 2-level AND/EXOR circuits (RD, HH, HS, JH, BB), pp. 548–553.
EDTC-1997-FlottesPR #behaviour #testing: Analyzing testability from behavioral to RT level (MLF, RP, BR), pp. 158–165.
EDTC-1997-LiuS #graph #heuristic #multi #performance #using: Multi-layer chip-level global routing using an efficient graph-based Steiner tree heuristic (LCEL, CS), pp. 311–318.
EDTC-1997-Schneider #abstraction #architecture #hardware #trade-off: A methodology for hardware architecture trade-off at different levels of abstraction (CS), pp. 537–541.
EDTC-1997-Vahid #clustering #functional: Procedure cloning: a transformation for improved system-level functional partitioning (FV), pp. 487–492.
ICDAR-1997-KangK #classification #framework #multi #probability: Probabilistic Framework for Combining Multiple Classifiers at Abstract Level (HJK, JHK), pp. 870–874.
ICDAR-1997-LeBourgeois #image #multi #robust: Robust Multifont OCR System from Gray Level Images (FL), pp. 1–5.
ICDAR-1997-LeeWH #integration #multi: Integration of Multiple Levels of Contour Information for Chinese-Character Stroke Extraction (CL, BW, WCH), pp. 584–587.
ICDAR-1997-Oguro #documentation #image #representation #using: Faxed Document Image Restoration Using Gray Level Representation (MO), pp. 679–683.
ICDAR-1997-StuckelbergPH #architecture #recognition #using: An Architecture for Musical Score Recognition using High-Level Domain Knowledge (MVS, CP, MH), pp. 813–818.
CSEET-1997-Umphress #case study #education #experience #re-engineering: Experiences in constructing a level-2 software engineering graduate curriculum (DAU), pp. 4–12.
ITiCSE-1997-FeldmanB #concurrent #education #programming: Concurrent programming CAN be introduced into the lower-level undergraduate curriculum (MBF, BDB), pp. 77–79.
ITiCSE-WGR-1997-SajaniemiK #education #implementation: Three-level teaching material and its implementation in a teaching situation (poster) (JS, MK), p. 153.
ITiCSE-WGR-1997-SajaniemiK97a #education #named: SHOW: a system for the presentation of three-level teaching material during lectures (demonstration) (JS, MK), p. 153.
PEPM-1997-NielsonN #framework #multi #λ-calculus: Prescriptive Frameworks for Multi-Level λ-Calculi (FN, HRN), pp. 193–202.
PLDI-1997-KodukulaAP #multi: Data-centric Multi-level Blocking (IK, NA, KP), pp. 346–357.
PLDI-1997-PolettoEK #code generation #flexibility #named #performance: tcc: A System for Fast, Flexible, and High-level Dynamic Code Generation (MP, DRE, MFK), pp. 109–121.
DLT-1997-Paun #distributed: Two-Level Distributed H Systems (GP), pp. 309–327.
HCI-CC-1997-AnkrumS #monitoring #variability: Heart Rate Variability in Eye-Level and Low Monitor Conditions (DRA, KS), pp. 571–574.
HCI-CC-1997-Komatsubara: Psychological Upper and Lower Limits of System Response Time and User’s Preference on Skill Level (AK), pp. 829–832.
AdaEurope-1997-HarbourGG #ada #implementation: Implementing Application-Level Sporadic Server Schedulers in Ada 95 (MGH, JJGG, JCPG), pp. 125–136.
TRI-Ada-1997-BrukardtM #ada: CLAW, a High Level, Portable, Ada 95 Binding for Microsoft Windows (RB, TM), pp. 91–104.
ACIR-1997-Kando #information management #research: Text-Level Structure of Research Papers: Implications for Text-Based Information Processing Systems (NK).
KDD-1997-KramerPH #machine learning #mining: Mining for Causes of Cancer: Machine Learning Experiments at Various Levels of Detail (SK, BP, CH), pp. 223–226.
TOOLS-ASIA-1997-Coplien97a #c++ #programming #using: Advanced C++ Programming Styles: Using C++ as a Higher-Level Language (JC), pp. 418–419.
TOOLS-ASIA-1997-HsiungLC #multi #object-oriented #synthesis: Object-Oriented Technology Transfer to Multiprocessor System-Level Synthesis (PAH, TYL, SJC), pp. 284–293.
TOOLS-ASIA-1997-PeiYJS #framework #modelling #object-oriented #parallel #using: A Method for Using Object-Oriented Frameworks to Support Various High-Level Parallel Computing Models (LP, DY, LJ, DLS), pp. 151–158.
LOPSTR-1997-BibelKKKOSS #approach #multi #synthesis: A Multi-level Approach to Program Synthesis (WB, DSK, CK, FK, JO, SS, GS), pp. 1–27.
POPL-1997-PaigeY #compilation #data type: High Level Reading and Data Structure Compilation (RP, ZY), pp. 456–469.
SAC-1997-ChungP #algorithm #problem #question #representation #search-based #why: Why is problem-dependent and high-level representation scheme better in a genetic algorithm? (SC, RP), pp. 239–246.
HPCA-1997-MarkatosK #kernel #operating system: User-Level DMA without Operating System Kernel Modification (EPM, MK), pp. 322–331.
HPCA-1997-PaiRA #parallel #performance #simulation: The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology (VSP, PR, SVA), pp. 72–83.
HPCA-1997-WelshBE #communication #interface #network #performance: ATM and Fast Ethernet Network Interfaces for User-Level Communication (MW, AB, TvE), pp. 332–342.
CAV-1997-PandeyB #evaluation #symmetry #verification: Exploiting Symmetry When Verifying Transitor-Level Circuits by Symbolic Trajectory Evaluation (MP, REB), pp. 244–255.
DAC-1996-BerrebiKVTHFJB #control flow #data flow #synthesis: Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis (EB, PK, SV, SDT, JCH, JF, AAJ, IB), pp. 573–578.
DAC-1996-Bryant #analysis: Bit-Level Analysis of an SRT Divider Circuit (REB), pp. 661–665.
DAC-1996-ChengTDRK #named #reliability: iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips (YKC, CCT, AD, ER, SMK), pp. 548–551.
DAC-1996-ClarkeKZ #fault #model checking #word: Word Level Model Checking — Avoiding the Pentium FDIV Error (EMC, MK, XZ), pp. 645–648.
DAC-1996-FujimotoK #design #verification: VLSI Design and System Level Verification for the Mini-Disc (TF, TK), pp. 491–496.
DAC-1996-LeeHCF #design #modelling #synthesis #using: Domain-Specific High-Level Modeling and Synthesis for ATM Switch Design Using VHDL (MTCL, YCH, BC, MF), pp. 585–590.
DAC-1996-RaghunathanDJ #analysis #reduction: Glitch Analysis and Reduction in Register Transfer Level (AR, SD, NKJ), pp. 331–336.
DAC-1996-TheobaldNW #heuristic #logic #named: Espresso-HF: A Heuristic Hazard-Free Minimizer for Two-Level Logic (MT, SMN, TW), pp. 71–76.
DAC-1996-WagnerD #bibliography #perspective #synthesis #testing: High-Level Synthesis for Testability: A Survey and Perspective (KDW, SD), pp. 131–136.
DAC-1996-Wolfe #power management: Opportunities and Obstacles in Low-Power System-Level CAD (AW), pp. 15–20.
SIGMOD-1996-HanFWCZK #database #interactive #mining #multi #named #relational: DBMiner: Interactive Mining of Multiple-Level Knowledge in Relational Databases (JH, YF, WW, JC, ORZ, KK), p. 550.
VLDB-1996-Moni #database #distributed #named: DISNIC-PLAN: A NICNET Based Distributed Database for Micro-level Planning in India (MM), p. 586.
ICSM-1996-McCrickardA #architecture #case study #impact analysis #visual notation: Assessing the impact of changes at the architectural level: a case study on graphical debuggers (DSM, GDA), p. 59–?.
WPC-1996-DoorleyC #automation #case study #data flow #diagrams #experience: Experiences in Automatic Leveling of Data Flow Diagrams (MD, AC), pp. 218–229.
WPC-1996-WallnauCMK #approach #architecture #comprehension: The Gadfly: An Approach to Architectural-Level System Comprehension (KCW, PCC, EJM, RK), pp. 178–186.
PLDI-1996-Adl-TabatabaiG #debugging: Source-Level Debugging of Scalar Optimized Code (ARAT, TRG), pp. 33–43.
FME-1996-ShiN #petri net #specification: An Improved Translation of SA/RT Specification Model to High-Level Timed Petri Nets (LS, PN), pp. 518–537.
FME-1996-WangL #concurrent #realtime #verification: Procedure-Level Verification of Real-time Concurrent Systems (FW, CTDL), pp. 682–701.
IFL-1996-Scholz #array #functional #on the #programming: On Programming Scientific Applications in SAC — A Functional Language Extended by a Subsystem for High-Level Array Operations (SBS), pp. 85–104.
CHI-1996-Miller #approach #development #multi #using: Integrating Human Factors in Customer Support Systems Development Using a Multi-Level Organisational Approach (AM), pp. 368–375.
CIKM-1996-FortinL #approach #mining #multi #object-oriented: An Object-Oriented Approach to Multi-Level Association Rule Mining (SF, LL), pp. 65–72.
ICPR-1996-Garcia-SilventeFG #approach #image #multi: A multi-channel-based approach for extracting significant scales on gray-level images (MGS, JFV, JAG), pp. 231–235.
ICPR-1996-GofmanK #approach #detection #image #optimisation #symmetry: Detecting symmetry in grey level images: the global optimization approach (YG, NK), pp. 889–894.
ICPR-1996-GoktepeYA #markov #segmentation: Unsupervised segmentation of gray level Markov model textures with hierarchical self organizing maps (MG, NY, VA), pp. 90–94.
ICPR-1996-Kimmel #difference #image: Affine differential signatures for gray level images of planar shapes (RK), pp. 45–49.
ICPR-1996-Lemaire #nondeterminism #recognition: Use of a priori descriptions in a high-level language and management of the uncertainty in a scene recognition system (JL), pp. 560–564.
ICPR-1996-Molina-GamezS #approach #polynomial #recognition: Sparse groups: A polynomial middle-level approach for object recognition (MCMG, JBSV), pp. 518–522.
ICPR-1996-TsurutaTA #constraints #image #re-engineering #using: Image reconstruction using high-level constraints (NT, RiT, MA), pp. 401–405.
ICPR-1996-ZribiFG #3d #analysis #invariant #set: Set of invariant features for three-dimensional gray-level objects by harmonic analysis (MZ, HF, FG), pp. 549–553.
KDD-1996-CheungNT #information management #maintenance #multi: Maintenance of Discovered Knowledge: A Case in Multi-Level Association Rules (DWLC, VTYN, BWT), pp. 307–310.
KR-1996-McCarthy: From Here to Human-Level AI (JM0), pp. 640–646.
ECOOP-1996-SilvaC #concept #database #design #diagrams #multi #object-oriented #using: Conceptual Design of Active Object-Oriented Database Applications Using Multi-level Diagrams (MJVS, CRC), pp. 366–397.
LOPSTR-1996-BrogiC #composition #logic programming #source code: Specialising Meta-level Compositions of Logic Programs (AB, SC), pp. 275–294.
POPL-1996-EnglerHK #code generation #independence #performance: ‘C: A Language for High-Level, Efficient, and Machine-Independent Dynamic Code Generation (DRE, WCH, MFK), pp. 131–144.
ICSE-1996-DuesterwaldGS #data flow #integration #testing: A Demand-Driven Analyzer for Data Flow Testing at the Integration Level (ED, RG, MLS), pp. 575–584.
ICSE-1996-SefikaSC #design #modelling #monitoring: Monitoring Compliance of a Software System with Its High-Level Design Models (MS, AS, RHC), pp. 387–396.
HPCA-1996-BlumrichDFL #interface #network: Protected, User-Level DMA for the SHRIMP Network Interface (MAB, CD, EWF, KL), pp. 154–165.
HPDC-1996-KimP #distributed #framework #source code: A Source-Level Transformation Framework for RPC-Based Distributed Programs (THK, JMP), pp. 78–87.
HPDC-1996-KumaranQ #automation #network #parallel: Automatic Exploitation of Dual Level Parallelism on a Network of Multiprocessors (SK, MJQ), pp. 616–625.
DAC-1995-Bergamaschi #design #problem #question #tool support: Productivity Issues in High-Level Design: Are Tools Solving the Real Problems? (RAB), pp. 674–677.
DAC-1995-MakW #logic #on the: On Optimal Board-Level Routing for FPGA-Based Logic Emulation (WKM, DFW), pp. 552–556.
DAC-1995-MartinK #behaviour #named #optimisation #power management: Power-Profiler: Optimizing ASICs Power Consumption at the Behavioral Level (RSM, JPK), pp. 42–47.
DAC-1995-MenezesPP #optimisation: Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization (NM, SP, LTP), pp. 690–695.
DAC-1995-Ribas-XirgoC #analysis #fault #simulation: Analysis of Switch-Level Faults by Symbolic Simulation (LR, JC), pp. 352–357.
DAC-1995-VinnakotaHS #design #difference: System-Level Design for Test of Fully Differential Analog Circuits (BV, RH, NJS), pp. 450–454.
DAC-1995-YuguchiNWF #logic #multi: Multi-Level Logic Minimization Based on Multi-Signal Implications (MY, YN, KW, TF), pp. 658–662.
KBSE-1995-Reuss #deduction #synthesis #towards #type system: Towards High-Level Deductive Program Synthesis Based on Type Theory (HR), pp. 174–183.
ICDAR-v1-1995-DeseillignyMS #re-engineering #recognition #string: Characters string recognition on maps, a method for high level reconstruction (MPD, HLM, GS), pp. 249–252.
ICDAR-v1-1995-MaderlechnerM #information management: Conversion of high level information from scanned maps into geographic information systems (GM, HM), pp. 253–256.
ICDAR-v1-1995-PowalkaSW95a #recognition #word: Recognizer characterisation for combining handwriting recognition results at word level (RKP, NS, RJW), pp. 68–73.
ICDAR-v2-1995-Baumann #graph grammar #music #recognition: A simplified attributed graph grammar for high-level music recognition (SB), pp. 1080–1083.
ICDAR-v2-1995-Randriamasy #benchmark #image #metric: A set-based benchmarking method for address bloc location on arbitrarily complex grey level images (SR), pp. 619–622.
ICDAR-v2-1995-TangMXCS #documentation #using: Extraction of reference lines from documents with grey-level background using sub-images of wavelets (YYT, HM, DX, YC, CYS), pp. 571–574.
ICDAR-v2-1995-ZhouHL #classification #recognition: A method of Jia Gu Wen recognition based on a two-level classification (XLZ, XCH, FL), pp. 833–836.
SIGMOD-1995-BerensonBGMOO #sql: A Critique of ANSI SQL Isolation Levels (HB, PAB, JG, JM, EJO, PEO), pp. 1–10.
VLDB-1995-HanF #database #multi #scalability: Discovery of Multiple-Level Association Rules from Large Databases (JH, YF), pp. 420–431.
PEPM-1995-Debray #abstract interpretation #low level #optimisation: Abstract Interpretation and Low-Level Code Optimization (SKD), pp. 111–121.
PLDI-1995-LoE #compilation #optimisation #parallel #scheduling: Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism (JLL, SJE), pp. 151–162.
STOC-1995-DinitzN #graph #incremental #maintenance: A 2-level cactus model for the system of minimum and minimum+1 edge-cuts in a graph and its incremental maintenance (YD, ZN), pp. 509–518.
ICALP-1995-Ambos-Spies #approximate #on the #polynomial: On Optimal Polynomial Time Approximations: P-Levelability vs. Delta-Levelability (Extended Abstract) (KAS), pp. 384–392.
CIKM-1995-Han #concept #mining #multi: Mining Knowledge at Multiple Concept Levels (JH), pp. 19–24.
CIKM-1995-StranieriZ #formal method #reasoning: Levels of Reasoning as the Basis for a Formalisation of Argumentation (AS, JZ), pp. 333–339.
SEKE-1995-Kazimierczak #automation #information management #natural language #programming #representation: Knowledge Representation on the Level of Natural Language for Purposes of Automatic Programming (JK), pp. 140–143.
SEKE-1995-KhoslaD #architecture #integration: Integration of Task Level Architecture with O-O Technology (RK, TSD), pp. 95–97.
SEKE-1995-TchounikineC #experience #fault #prototype: Fault diagnosis expert system for robots: a knowledge level prototyping experience (PT, CC), pp. 268–274.
ECOOP-1995-McAffer #programming: Meta-level Programming with CodA (JM), pp. 190–214.
OOPSLA-1995-ItohYT #concurrent #low level #named #operating system #programming #using: SCONE: Using Concurrent Objects for Low-level Operating System Programming (JiI, YY, MT), pp. 385–398.
OOPSLA-1995-MasuharaMAY #compilation #concurrent #object-oriented #partial evaluation #using: Compiling Away the Meta-Level in Object-Oriented Concurrent Reflective Languages Using Partial Evaluation (HM, SM, KA, AY), pp. 300–315.
PLILP-1995-GluckJ #generative #multi #performance: Efficient Multi-level Generating Extensions for Program Specialization (RG, JJ), pp. 259–278.
SAC-1995-HuizingaH #distributed: Two-level client caching and disconnected operation of notebook computers in distributed systems (DMH, KAH), pp. 390–395.
ESEC-1995-Coen-PorisiniKM #framework #proving: A Formal Framework for ASTRAL Inter-level Proof Obligations (ACP, RAK, DM), pp. 90–108.
FSE-1995-MurphyNS #modelling: Software Reflexion Models: Bridging the Gap Between Source and High-Level Models (GCM, DN, KJS), pp. 18–28.
ICSE-1995-HarrisRY #architecture #reverse engineering: Reverse Engineering to the Architectural Level (DRH, HBR, ASY), pp. 186–195.
HPDC-1995-KohliAS #abstraction #distributed #named: Indigo: User-Level Support for Building Distributed Shared Abstractions (PK, MA, KS), pp. 130–137.
PPoPP-1995-Brewer #automation #modelling #optimisation #statistics: High-Level Optimization via Automated Statistical Modeling (EAB), pp. 80–91.
SOSP-1995-EickenBBV #distributed #interface #named #network #parallel: U-Net: A User-Level Network Interface for Parallel and Distributed Computing (TvE, AB, VB, WV), pp. 40–53.
SOSP-1995-EnglerKO #architecture #kernel #named #operating system #resource management: Exokernel: An Operating System Architecture for Application-Level Resource Management (DRE, MFK, JO), pp. 251–266.
RTA-1995-LescanneR: Explicit Substitutions with de Bruijn’s Levels (PL, JRD), pp. 294–308.
RTA-1995-SuzukiMI #term rewriting: Level-Confluence of Conditional Rewrite Systems with Extra Variables in Right-Hand Sides (TS, AM, TI), pp. 179–193.
DAC-1994-DahlgrenL #modelling #network: Modeling of Intermediate Node States in switch-Level Networks (PD, PL), pp. 722–727.
DAC-1994-FannRJ #scheduling #synthesis: Global Scheduling for High-Level Synthesis Applications (YF, MR, RJ), pp. 542–546.
DAC-1994-KissionDJ #design: Structured Design Methodology for High-Level Design (PK, HD, AAJ), pp. 466–471.
DAC-1994-KolsonND #memory management #synthesis: Minimization of Memory Traffic in High-Level Synthesis (DJK, AN, NDD), pp. 149–154.
DAC-1994-KuehlmannCSL #fault #verification: Error Diagnosis for Transistor-Level Verification (AK, DIC, AS, DPL), pp. 218–224.
DAC-1994-ParulkarBN #representation: Extraction of a High-level structural Representation from Circuit Descriptions with Applications to DFT/BIST (IP, MAB, CN), pp. 345–356.
DAC-1994-PrasadAB #design #incremental #synthesis: A System for Incremental Synthesis to Gate-Level and Reoptimization Following RTL Design Changes (SCP, PA, PWB), pp. 441–446.
DAC-1994-VerbauwhedeSR #estimation #memory management #synthesis: Memory Estimation for High Level Synthesis (IV, CJS, JMR), pp. 143–148.
EDAC-1994-BrashearMOPM #analysis #performance #predict #statistics #using: Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis (RBB, NM, CO, LTP, MRM), pp. 332–337.
EDAC-1994-CamuratiCPBS #design #modelling #verification: System-Level Modeling and Verification: a Comprehensive Design Methodology (PC, FC, PP, CB, BS), pp. 636–640.
EDAC-1994-FlottesHR #automation #specification #synthesis: Automatic Synthesis of BISTed Data Paths From High Level Specification (MLF, DH, BR), pp. 591–598.
EDAC-1994-GhatrajuAM #fixpoint #synthesis: High-Level Synthesis of Digital Circuits by Finding Fixpoints (LG, MHAEB, CM), pp. 94–98.
EDAC-1994-IsmailOJ #clustering #interactive: Interactive System-level Partitioning with PARTIF (TBI, KO, AAJ), pp. 464–468.
EDAC-1994-KeM #synthesis: Synthesis of Delay-Verifiable Two-Level Circuits (WK, PRM), pp. 297–301.
EDAC-1994-NaganumaOH #algorithm #debugging #design #using #validation: High-Level Design Validation Using Algorithmic Debugging (JN, TO, TH), pp. 474–480.
EDAC-1994-NarayanG #interface #synthesis: Synthesis of System-Level Bus Interfaces (SN, DG), pp. 395–399.
EDAC-1994-RamachandranK #synthesis: Incorporating the Controller Effects During Register Transfer Level Synthesis (CR, FJK), pp. 308–313.
EDAC-1994-RouzeyreDS #component #scheduling #synthesis: Component Selection, Scheduling and Control Schemes for High Level Synthesis (BR, DD, GS), pp. 482–489.
EDAC-1994-SafiniaLS #analysis #functional #modelling: Taking Advantage of High Level Functional Information to Refine Timing Analysis and Timing Modeling (CS, RL, GS), pp. 349–353.
EDAC-1994-SousaGTW #fault #modelling: Fault Modeling and Defect Level Projections in Digital ICs (JTdS, FMG, JPT, TWW), pp. 436–442.
EDAC-1994-WurthW #logic #multi #optimisation #performance: Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization (BW, NW), pp. 630–634.
EDAC-1994-ZepterG #data flow #generative: Generating Synchronous Timed Descriptions of Digital Receivers from Dynamic Data Flow System Level Configurations (PZ, TG), p. 672.
KBSE-1994-SelfridgeH #comprehension #visual notation: Graphical Support for Code-Level Software Understanding (PGS, GTH), pp. 117–124.
VLDB-1994-OuzzaniAB #approach #top-down: A Top-Down Approach for Two Level Serializability (MO, MAA, NLB), pp. 226–237.
CSEE-1994-EwardW: Introducing Megaprogramming at the High School and Undergraduate Levels (ME, SPW), pp. 583–596.
CHI-1994-HaunoldK94a #analysis: A keystroke level analysis of a graphics application: manual map digitizing (PH, WK), pp. 337–343.
ICML-1994-Elomaa #learning: In Defense of C4.5: Notes Learning One-Level Decision Trees (TE), pp. 62–69.
KDD-1994-ChuC #abstraction #concept #database: Abstraction of High Level Concepts from Numerical Values in Databases (WWC, KC), pp. 133–144.
KR-1994-BrafmanT #modelling: Belief Ascription and Mental-Level Modelling (RIB, MT), pp. 87–98.
KR-1994-GuarinoCG #category theory #ontology: An Ontology of Meta-Level Categories (NG, MC, PG), pp. 270–280.
SIGIR-1994-Callan #documentation #retrieval: Passage-Level Evidence in Document Retrieval (JPC), pp. 302–310.
ECOOP-1994-OkamuraI #programming #using: Object Location Control Using Meta-level Programming (HO, YI), pp. 299–319.
LOPSTR-1994-BarklundBD #logic programming #multi #programming language: A Basis for a Multi-Level Meta-Logic Programming Language (JB, KB, PD), pp. 262–275.
LOPSTR-1994-Dunin-Keplicz #architecture #development #multi #source code: An Architecture with Multiple Meta-Levels for the Development of Correct Programs (BDK), pp. 293–310.
LOPSTR-1994-Harmelen #cost analysis: A Model of Costs and Benefits of Meta-Level Computation (FvH), pp. 248–261.
LOPSTR-1994-Treur #architecture #reasoning #semantics: Temporal Semantics of Meta-Level Architectures for Dynamic Control of Reasoning (JT), pp. 353–376.
PLILP-1994-CodognetCLQ #named: Sleepers: A Versatile High-Level Control Mechanism (CC, PC, VL, MQ), pp. 308–323.
CADE-1994-Huang #proving #re-engineering: Reconstruction Proofs at the Assertion Level (XH), pp. 738–752.
DAC-1993-ChaiyakulGR: High-Level Transformations for Minimizing Syntactic Variances (VC, DG, LR), pp. 413–418.
DAC-1993-ChatterjeeR #architecture #composition #multi #optimisation: An Architectural Transformation Program for Optimization of Digital Systems by Multi-Level Decomposition (AC, RKR), pp. 343–348.
DAC-1993-CoudertMF #logic: A New Viewpoint on Two-Level Logic Minimization (OC, JCM, HF), pp. 625–630.
DAC-1993-HaworthB #design #towards: Towards Optimal System-Level Design (MSH, WPB), pp. 434–438.
DAC-1993-KarriO #architecture #synthesis: High-Level Synthesis of Fault-Secure Microarchitectures (RK, AO), pp. 429–433.
DAC-1993-MeyerC #fault #multi #performance #simulation: Fast Hierarchical Multi-Level Fault Simulation of Sequential Circuits with Switch-Level Accuracy (WM, RC), pp. 515–519.
DAC-1993-PapaefthymiouR #named: TIM: A Timing Package for Two-Phase, Level-Clocked Circuitry (MCP, KHR), pp. 497–502.
DAC-1993-SeawrightB #performance #synthesis: High-Level Symbolic Construction Technique for High Performance Sequential Synthesis (AS, FB), pp. 424–428.
DAC-1993-SharmaJ93a #architecture #performance #synthesis: Estimating Architectural Resources and Performance for High-Level Synthesis Applications (AS, RJ), pp. 355–360.
DAC-1993-VemuriMSKRV #case study #experience #functional #synthesis #validation: Experiences in Functional Validation of a High Level Synthesis System (RV, PM, PS, NK, JR, RV), pp. 194–201.
DAC-1993-WangDNS #architecture #multi #scalability #synthesis #using: High-Level Synthesis of Scalable Architectures for IIR Filters using Multichip Modules (HW, NDD, AN, KYS), pp. 336–342.
DAC-1993-YuanPR #component #evaluation #logic #simulation: Evaluation of Parts by Mixed-Level DC-Connected Components in Logic Simulation (DCY, LTP, JTR), pp. 367–372.
CSM-1993-BriandMB #design #maintenance: Measuring and Assessing Maintainability at the End of High Level Design (LCB, SM, VRB), pp. 88–97.
DLT-1993-Iwama #low level #trade-off: Low-Level Tradeoffs between Reversals and Alternations (KI), pp. 326–341.
HCI-ACS-1993-Chung #using: Decision Maker’s Knowledge Level and the Selection of Decision Strategies in Using a Decision Support System (HMMC), pp. 487–491.
HCI-ACS-1993-PacholskiW #evaluation #formal method #modelling: Formal Modelling of the Ergonomicity Level Evaluation of Man-Microcomputer Systems (LP, MW), pp. 1029–1032.
INTERCHI-1993-KimF #design #user interface: Providing high-level control and expert assistance in the user interface presentation design (WCK, JDF), pp. 430–437.
TRI-Ada-1993-KoehnemannL #debugging #embedded #testing #tool support #towards: Towards Target-Level Testing and Debugging Tools for Embedded Software (HK, TEL), pp. 288–298.
SEKE-1993-Cooke93a #multi #order #programming language: A High Level Programming Language Based Upon Ordered Multisets (DEC), pp. 117–124.
ECOOP-1993-ChibaM #architecture #design #distributed: Designing an Extensible Distributed Language with a Meta-Level Architecture (SC, TM), pp. 482–501.
OOPSLA-1993-GodinM #maintenance #using: Building and Maintaining Analysis-Level Class Hierarchies Using Galois Lattices (RG, HM), pp. 394–410.
TOOLS-USA-1993-ChandlerH #education #object-oriented: Teaching Object Oriented at University Level: Techniques for Success (JMC, SCH), pp. 619–626.
SAC-1993-AguirreBBG #information management #prototype #representation #using: Using a High Level Knowledge Representation for Expert Systems Knowledge Acquisition and Prototyping (JLA, OB, RFB, MNG), pp. 490–497.
ESEC-1993-Coen-PorisiniM #framework #proving: A Formal Framework for ASTRAL Intra-Level Proof Obligations (ACP, DM), pp. 483–500.
ICSE-1993-KaiserPB #modelling #process: A Bi-Level Language for Software Process Modeling (GEK, SSP, IBS), pp. 132–143.
ICSE-1993-KleynB #graph #programming #specification: A High Level Language for Specifying Graph Based Languages and Their Programming Environments (MFK, JCB), pp. 324–335.
PPoPP-1993-PrinsP #source code: Transforming High-Level Data-Parallel Programs into Vector Operations (JP, DWP), pp. 119–128.
PPoPP-1993-SarukkaiM #analysis #source code: Perturbation Analysis of High Level Instrumentation for SPMD Programs (SRS, ADM), pp. 44–53.
ILPS-1993-Sindaha #scheduling: Branch-Level Scheduling in Aurora: The Dharma Scheduler (RYS), pp. 403–419.
DAC-1992-BergamaschiLK #behaviour #optimisation #synthesis #using: Control Optimization in High-Level Synthesis Using Behavioral Don’t Cares (RAB, DAL, AK), pp. 657–661.
DAC-1992-DuttaRV #distributed #synthesis: Distributed Design-Space Exploration for High-Level Synthesis Systems (RD, JR, RV), pp. 644–650.
DAC-1992-HuangD #compilation #pipes and filters #set #synthesis: High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers (IJH, AMD), pp. 135–140.
DAC-1992-HungP #constraints #design #multi #synthesis: High-Level Synthesis with Pin Constraints for Multiple-Chip Designs (YHH, ACP), pp. 231–234.
DAC-1992-Jones #incremental: Zero Delay versus Positive Delay in an Incremental Switch-Level Simulator (LGJ), pp. 424–427.
DAC-1992-KarriO #fault tolerance #synthesis: Transformation-Based High-Level Synthesis of Fault-Tolerant ASICs (RK, AO), pp. 662–665.
DAC-1992-LaiS #diagrams #multi #verification: Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification (YTL, SS), pp. 608–613.
DAC-1992-LeeNB #generative #named #testing: SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits (KJL, CN, MAB), pp. 26–29.
DAC-1992-LinLE: Analyzing Cycle Stealing on Synchronous Circuits with Level-Sensitive Latches (IL, JAL, KE), pp. 393–398.
DAC-1992-Malik #multi #network #optimisation #using: Optimization of Primitive Gate Networks Using Multiple Output Two-Level Minimization (AAM), pp. 449–453.
DAC-1992-RimJ #branch #representation #synthesis: Representing Conditional Branches for High-Level Synthesis Applications (MR, RJ), pp. 106–111.
DAC-1992-RimJL #synthesis: Optimal Allocation and Binding in High-Level Synthesis (MR, RJ, RDL), pp. 120–123.
DAC-1992-StollD #constraints #synthesis: High-Level Synthesis from VHDL with Exact Timing Constraints (AS, PD), pp. 188–193.
SIGMOD-1992-Lomet #multi #named: MLR: A Recovery Method for Multi-level Systems (DBL), pp. 185–194.
VLDB-1992-SimonKM #implementation #relational: Implementing High Level Active Rules on Top of a Relational DBMS (ES, JK, CdM), pp. 315–326.
SEI-1992-Epley #re-engineering: A Joint Master’s Level Software Engineering Subtrack (DLE), pp. 247–256.
SEI-1992-JacobsP #re-engineering: Creating a Software Engineering Training Program in a Level I Organisation (KJ, RP), pp. 351–359.
ML-1992-IbaL #induction: Induction of One-Level Decision Trees (WI, PL), pp. 233–240.
SEKE-1992-LoiaCQ #framework #implementation #incremental #prolog: Incremental, High Level Implementation of Prolog in an Open System Framework (VL, GC, MQ), pp. 394–403.
ALP-1992-EhrigP #algebra #equation #specification: High-Level-Replacement Systems for Equational Algebraic Specifications (HE, FPP), pp. 3–20.
PLILP-1992-SaidiB #debugging #two-level grammar: Checking and Debugging of Two-level Grammars (SS, JFB), pp. 158–171.
POPL-1992-NirkheP #imperative #partial evaluation #programming language #realtime: Partial Evaluation of High-Level Imperative Programming Languages, with Applications in Hard Real-Time Systems (VN, WP), pp. 269–280.
CC-1992-Poetzsch-Heffter #identification #implementation #specification: Implementing High-Level Identification Specifications (APH), pp. 59–65.
CC-1992-ViklundHF #implementation #programming: The Implementation of ObjectMath — a High-Level Programming Environment for Scientific Computing (LV, JH, PF), pp. 312–318.
HPDC-1992-MehraW #generative: Physical-Level Synthetic Workload Generation for Load-Balancing Experiments (PM, BWW), pp. 208–217.
CAV-1992-HuDDY #specification #verification: Higher-Level Specification and Verification with BDDs (AJH, DLD, AJD, CHY), pp. 82–95.
DAC-1991-AmonB91a #case study #synthesis: Sizing Synchronization Queues: A Case Study in Higher Level Synthesis (TA, GB), pp. 690–693.
DAC-1991-ChenM #pipes and filters #scheduling: Datapath Scheduling for Two-Level Pipelining (CYRC, MZM), pp. 603–606.
DAC-1991-ChewS #logic #multi #simulation: Utilizing Logic Information in Multi-Level Timing Simulation (MPC, AJS), pp. 215–218.
DAC-1991-DuttK #library #synthesis: Bridging High-Level Synthesis to RTL Technology Libraries (NDD, JRK), pp. 526–529.
DAC-1991-Fuhrman #industrial #synthesis #tool support: Industrial Extensions to University High Level Synthesis Tools: Making It Work in the Real World (TEF), pp. 520–525.
DAC-1991-JainB #hardware #simulation: Mapping Switch-Level Simulation onto Gate-Level Hardware Accelerators (AJ, REB), pp. 219–222.
DAC-1991-JainMSW #empirical #evaluation #heuristic #scheduling #synthesis: Empirical Evaluation of Some High-Level Synthesis Scheduling Heuristics (RJ, AM, AS, HW), pp. 686–689.
DAC-1991-Jones91a #simulation: Accelerating Switch-Level Simulation by Function Caching (LGJ), pp. 211–214.
DAC-1991-KucukcakarP #constraints #named: CHOP: A Constraint-Driven System-Level Partitioner (KK, ACP), pp. 514–519.
DAC-1991-NicolauP #incremental #reduction #synthesis: Incremental Tree Height Reduction for High Level Synthesis (AN, RP), pp. 770–774.
DAC-1991-NoteGCM #architecture #named #synthesis #throughput: Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications (SN, WG, FC, HDM), pp. 597–602.
DAC-1991-PangrleBLS #synthesis: Relevant Issues in High-Level Connectivity Synthesis (BMP, FB, DAL, AS), pp. 607–610.
DAC-1991-PaterasR #correlation #generative #multi #random #testing: Generation of Correlated Random Patterns for the Complete Testing of Synthesized Multi-level Circuits (SP, JR), pp. 347–352.
DAC-1991-VandrisS #algorithm #fault #memory management #performance #simulation: Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation (EV, GES), pp. 138–143.
DAC-1991-WengP #3d #scheduling #synthesis: 3D Scheduling: High-Level Synthesis with Floorplanning (JPW, ACP), pp. 668–673.
SIGMOD-1991-HansenU #dependence: An Extended Memoryless Inference Control Method: Accounting for Dependence in Table-level Controls (SCH, EAU), pp. 348–356.
SIGMOD-1991-ShyyS #database #knowledge base #named #programming language: K: A High-Level Knowledge Base Programming Language for Advanced Database Applications (YMS, SYWS), pp. 338–347.
SIGMOD-1991-Stonebraker #multi #persistent: Managing Persistent Objects in a Multi-Level Store (MS), pp. 2–11.
VLDB-1991-HasseW #evaluation #multi #performance #transaction: A Performance Evaluation of Multi-Level Transaction Management (CH, GW), pp. 55–66.
SEI-1991-MeadL #education #re-engineering: Software Engineering: Graduate-Level Courses for AFIT Professional Continuing Education (NRM, PKL), pp. 114–126.
PEPM-1991-Hansen: Properties of Unfolding-based Meta-level Systems (TAH), pp. 243–254.
VDME-1991-1-HeeSV #petri net: Z and High Level Petri Nets (KMvH, LJS, MV), pp. 204–219.
FPCA-1991-Chiueh #architecture #garbage collection: An Architectural Technique for Cache-level Garbage Collection (TcC), pp. 520–537.
AdaEurope-1991-ColombiniTP #ada #realtime: Ada as High Level Language for Real-Time Systems Exploiting RDBMS Techniques (CC, AdT, RP), pp. 384–393.
ML-1991-Jones #refinement #using: Knowledge Refinement Using a High Level, Non-Technical Vocabulary (EKJ), pp. 18–22.
SIGIR-1991-AgostiCG #hypermedia #retrieval: A Two-Level Hypertext Retrieval Model for Legal Data (MA, RC, GG), pp. 316–325.
SIGIR-1991-Rabitti #image #multi #query: Image Query Processing Based on Multi-Level Signatures (FR, PS), pp. 305–314.
TOOLS-USA-1991-StaryM #declarative #specification #user interface: MERCY-High Level Control for Declarative User Interface Specification (CS, KJM), pp. 281–290.
ASPLOS-1991-BagrodiaM #implementation #parallel #performance #source code: Efficient Implementation of High Level Parallel Programs (RB, SM), pp. 142–151.
ASPLOS-1991-CateG #file system #integration: Integration of Compression and Caching for a Two-Level File System (VC, TRG), pp. 200–211.
ASPLOS-1991-Wall #parallel: Limits of Instruction-Level Parallelism (DWW), pp. 176–188.
SOSP-1991-AndersonBLL #effectiveness #kernel #parallel: Scheduler Activations: Effective Kernel Support for the User-Level Management of Parallelism (TEA, BNB, EDL, HML), pp. 95–109.
SOSP-1991-MarshSLM: First-Class User-Level Theads (BDM, MLS, TJL, EPM), pp. 110–121.
CAV-1991-SegerJ #using #verification: A Two-Level Formal Verification Methodology using HOL and COSMOS (CJHS, JJJ), pp. 299–309.
ICLP-1991-ChengRS #metaprogramming #prolog: Higher Level Meta Programming in Qu-Prolog 3: 0 (ASKC, PJR, JS), pp. 285–298.
DAC-1990-ChenM #multi #network #optimisation: Timing Optimization for Multi-Level Combinational Networks (KCC, SM), pp. 339–344.
DAC-1990-GhoshDN90a #generative #logic #testing: Sequential Test Generation at the Register-Transfer and Logic Levels (AG, SD, ARN), pp. 580–586.
DAC-1990-HwangLSW #fault #parallel: A Parallel Pattern Mixed-Level Fault Simulator (TSH, CLL, WZS, CPW), pp. 716–719.
DAC-1990-KundaARN #generative #testing #using: Speed Up of Test Generation Using High-Level Primitives (RPK, JAA, BDR, PN), pp. 594–599.
DAC-1990-MalikBNS #logic #multi: Reduced Offsets for Two-Level Multi-Valued Logic Minimization (AAM, RKB, ARN, ALSV), pp. 290–296.
DAC-1990-MatsumotoWUSHM #generative #layout: Datapath Generator Based on Gate-Level Symbolic Layout (NM, YW, KU, YS, HH, SM), pp. 388–393.
DAC-1990-SarmaDNH #industrial #synthesis: High-Level Synthesis: Technology Transfer to Industry (RCS, MDD, NCN, GH), pp. 549–554.
DAC-1990-SavojB #multi #network: The Use of Observability and External Don’t Cares for the Simplification of Multi-Level Networks (HS, RKB), pp. 297–301.
DAC-1990-WangM #logic #named #simulation: LECSIM: A Levelized Event Driven Compiled Logic Simulation (ZW, PMM), pp. 491–496.
DAC-1990-WhitcombN #data type #synthesis: Abstract Data Types and High-Level Synthesis (GSW, ARN), pp. 680–685.
PODS-1990-WeikumHBM #multi: Multi-Level Recovery (GW, CH, PB, PM), pp. 109–123.
STOC-1990-Mulmuley #diagrams #order: Output Sensitive Construction of Levels and Voronoi Diagrams in R^d of Order 1 to k (KM), pp. 322–330.
GG-1990-EhrigHKP #graph grammar: From Graph Grammars to High Level Replacement Systems (HE, AH, HJK, FPP), pp. 269–291.
CHI-1990-Hudson #adaptation #feedback #semantics: Adaptive semantic snaping — a technique for semantic feedback at the lexical level (SEH), pp. 65–70.
SEKE-1990-JeffreyM #petri net #set: A High-Level Petri Net for a Subset of FGHC (JJ, TM), pp. 260–266.
ICSE-1990-GabrielianF #multi #realtime #specification #verification: Multi-Level Specification and Verification of Real-Time Software (AG, MKF), pp. 52–62.
ICSE-1990-WiledenWRT #specification: Specification Level Interoperability (JCW, ALW, WRR, PLT), pp. 74–85.
PPoPP-1990-FuruichiTI #multi #source code: A Multi-Level Load Balancing Scheme for OR-Parallel Exhaustive Search Programs on the Multi-PSI (MF, KT, NI), pp. 50–59.
PPoPP-1990-Gupta #parallel: Employing Register Channels for the Exploitation of Instruction Level Parallelism (RG), pp. 118–127.
PPoPP-1990-HarveyKTMN #effectiveness #parallel: The Effectiveness of Task-Level Parallelism for High-Level Vision (WH, DK, MT, DM, AN), pp. 156–167.
CAV-1990-NakamuraKFT #logic #using #verification: A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio (HN, YK, MF, HT), pp. 76–85.
DAC-1989-BenkoskiS #interactive #modelling #multi #verification: Timing Verification by Formal Signal Interaction Modeling in a Multi-level Timing Simulator (JB, AJS), pp. 668–673.
DAC-1989-BlaauwSMAR #automation #behaviour #generative #modelling: Automatic Generation of Behavioral Models from Switch-Level Descriptions (DB, DGS, RBMT, JAA, JTR), pp. 179–184.
DAC-1989-DaveP #generative #testing #using: A Functional-Level Test Generation Methodology Using Two-level Representations (UJD, JHP), pp. 722–725.
DAC-1989-Devadas #logic #multi #synthesis: Approaches to Multi-level Sequential Logic Synthesis (SD), pp. 270–276.
DAC-1989-DragomireckyGJDSd #synthesis #user interface #visual notation: High-Level Graphical User Interface Management in the FACE Synthesis Environment (MD, EPG, JRJ, DAD, WDS, MAd), pp. 549–554.
DAC-1989-HoevenLDD #network #simulation: A New Model for the High Level Description and Simulation of VLSI Networks (AJvdH, AAdL, EFD, PD), pp. 738–741.
DAC-1989-HwangOI #communication #complexity #logic #multi #synthesis #using: Multi-Level Logic Synthesis Using Communication Complexity (TH, RMO, MJI), pp. 215–220.
DAC-1989-Knapp #interactive #optimisation: An Interactive Tool for Register-level Structure Optimization (DK), pp. 598–601.
DAC-1989-KravitzBR #parallel #simulation: Massively Parallel Switch-Level Simulation: A Feasibility Study (SAK, REB, RAR), pp. 91–97.
DAC-1989-LagneseT #architecture #clustering #design: Architectural Partitioning for System Level Design (EDL, DET), pp. 62–67.
DAC-1989-PaulinK #algorithm #scheduling #synthesis: Scheduling and Binding Algorithms for High-Level Synthesis (PGP, JPK), pp. 1–6.
DAC-1989-SaldanhaWBS #logic #multi #using: Multi-level Logic Simplification Using Don’t Cares and Filters (AS, ARW, RKB, ALSV), pp. 277–282.
DAC-1989-SalzH #incremental #named: IRSIM: An Incremental MOS Switch-Level Simulator (AS, MH), pp. 173–178.
DAC-1989-VillaS #finite #implementation #logic #named #state machine: NOVA: State Assignment of Finite State Machines for Optimal Two-level Logic Implementations (TV, ALSV), pp. 327–332.
DAC-1989-WangM #functional #scheduling #simulation: Scheduling High-Level Blocks for Functional Simulation (ZW, PMM), pp. 87–90.
PLDI-1989-Venkatesh #evaluation #framework #program analysis #specification: A Framework for Construction and Evaluation of High-Level Specifications for Program Analysis Techniques (GAV), pp. 1–12.
CHI-1989-SinghG #user interface: A high-level user interface management system (GS, MG), pp. 133–138.
KR-1989-Nebel #analysis: A Knowledge Level Analysis of Belief Revision (BN), pp. 301–311.
ML-1989-Hsu #analysis: A Knowledge-Level Analysis of Informing (JYjH), pp. 485–488.
SEKE-1989-LeaC #agile #prototype: A Two-Level Model for Software Rapid Prototyping (RJL, CGC), pp. 73–78.
ASPLOS-1989-JouppiW #parallel: Available Instruction-Level Parallelism for Superscalar and Superpipelined Machines (NPJ, DWW), pp. 272–282.
NACLP-1989-Bezem #logic programming #source code #termination: Characterizing Termination of Logic Programs with Level Mappings (MB), pp. 69–80.
DAC-1988-Boehner #automation #logic #named: LOGEX — an Automatic Logic Extractor Form Transistor to Gate Level for CMOS Technology (MB), pp. 517–522.
DAC-1988-BorrielloD #synthesis: High-Level Synthesis: Current Status and Future Directions (GB, ED), pp. 477–482.
DAC-1988-ChangCS #performance: An Accurate and Efficient Gate Level Delay Calculator for MOS Circuits (FCC, CFC, PS), pp. 282–287.
DAC-1988-ChaoG #fault #modelling: Micro-operation Perturbations in Chip Level Fault Modeling (CHC, FGG), pp. 579–582.
DAC-1988-Cirit #analysis #random #testing: Switch Level Random Pattern Testability Analysis (MAC), pp. 587–590.
DAC-1988-McFarlandPC #synthesis #tutorial: Tutorial on High-Level Synthesis (MCM, ACP, RC), pp. 330–336.
DAC-1988-MicheliK #named #synthesis: HERCULES — a System for High-Level Synthesis (GDM, DCK), pp. 483–488.
DAC-1988-VisweswariahCC #development #verification: Model Development and Verification for High Level Analog Blocks (CV, RC, CFC), pp. 376–382.
DAC-1988-WeiRJ #behaviour #named #synthesis: BECOME: Behavior Level Circuit Synthesis Based on Structure Mapping (RSW, SGR, JYJ), pp. 409–414.
DAC-1988-WolfKA #algorithm #kernel #logic #multi: A Kernel-Finding State Assignment Algorithm for Multi-Level Logic (WW, KK, JA), pp. 433–438.
SIGMOD-1988-BorrP #integration #low level #performance #sql: High Performance SQL Through Low-Level System Integration (AJB, GRP), pp. 342–349.
ESOP-1988-NielsonN #λ-calculus: 2-level λ-lifting (FN, HRN), pp. 328–343.
PLDI-1988-CoutantMR #approach #debugging #named: DOC: A Practical Approach to Source-Level Debugging of Globally Optimized Code (DSC, SM, MR), pp. 125–134.
STOC-1988-Ko: Relativized Polynominal Time Hierarchies Having Exactly K Levels (KIK), pp. 245–253.
PLILP-1988-SchreyeB #abstract interpretation #program transformation: An Application of Abstract Interpretation in Source Level Program Transformation (DDS, MB), pp. 35–57.
ICSE-1988-BarbacciWW #programming: Programming at the Processor-Memory-Switch Level (MB, CBW, JMW), pp. 19–29.
ICSE-1988-ChiuL #concurrent #database #distributed #specification: High-Level Specification of Concurrency Control in Distributed Database Systems (LC, MTL), pp. 309–319.
JICSCP-1988-CosciaFLST88 #compilation #logic programming: Meta-Level Definition and Compilation of Inference Engines in the Epsilon Logic Programming Environment (PC, PF, GL, GS, LT), pp. 359–373.
DAC-1987-DevadasMN #abstraction #on the #verification: On the Verification of Sequential Machines at Differing Levels of Abstraction (SD, HKTM, ARN), pp. 271–276.
DAC-1987-RajsumanMJ #fault #modelling #on the: On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates (RR, YKM, APJ), pp. 244–250.
DAC-1987-Smith #hardware #scalability: A Hardware Switch Level Simulator for Large MOS Circuits (MTS), pp. 95–100.
DAC-1987-SouleB #abstraction #parallel #simulation #statistics: Statistics for Parallelism and Abstraction Level in Digital Simulation (LS, RB), pp. 588–591.
DAC-1987-WangHPZ #named: SSIM: A Software Levelized Compiled-Code Simulator (LTW, NEH, EHP, JJZ), pp. 2–8.
PLDI-1987-Pittman #execution #hybrid #interpreter #performance: Two-level hybrid interpreter/native code execution for combined space-time program efficiency (TP), pp. 150–152.
HCI-CE-1987-PaulW #human-computer #interface #towards: Towards a Truly High-Level and Integrated Human-Computer Interface (DWP, HRW), pp. 53–60.
POPL-1987-LeeP #compilation #generative #semantics: A Realistic Compiler Generator Based on High-Level Semantics (PL, UFP), pp. 284–295.
ESEC-1987-CailletBR #ada #execution: High Level Interpretaton of Execution Traces of Ada Tasks (JFC, CB, BR), pp. 309–317.
ESEC-1987-Selby #design #reuse: Analyzing Software Reuse at the Project and Module Design Levels (RWS), pp. 212–220.
SOSP-1987-MogulRA #network #performance: The Packet Filter: An Efficient Mechanism for User-level Network Code (JCM, RFR, MJA), pp. 39–51.
ICLP-1987-Bacha87 #approach #programming: Meta-Level Programming: A Compiled Approach (HB), pp. 394–410.
DAC-1986-Adler #multi #named: SIMMOS: a multiple-delay switch-level simulator (DA), pp. 159–163.
DAC-1986-BarclayA #algorithm #generative #heuristic #testing: A heuristic chip-level test generation algorithm (DSB, JRA), pp. 257–262.
DAC-1986-BarzilaiBHIS #analysis #fault #named #performance #verification: SLS — a fast switch level simulator for verification and fault coverage analysis (ZB, DKB, LMH, VSI, GMS), pp. 164–170.
DAC-1986-Frank #parallel #simulation: Exploiting parallelism in a switch-level simulation machine (EHF), pp. 20–26.
DAC-1986-HwangKN #modelling #verification: An accuration delay modeling technique for switch-level timing verification (SHH, YHK, ARN), pp. 227–233.
DAC-1986-IvieL #named #simulation: STL — a high level language for simulation and test (JI, KWLL), pp. 517–523.
DAC-1986-MaS #estimation #fault: Mixed-level fault coverage estimation (HKTM, ALSV), pp. 553–559.
DAC-1986-PutatundaSMC #compilation #named: HAPPI: a chip compiler based on double-level-metal technology (RP, DS, SM, JC), pp. 736–743.
DAC-1986-Sasao #generative #multi #named #synthesis #using: MACDAS: multi-level AND-OR circuit synthesis using two-variable function generators (TS), pp. 86–93.
DAC-1986-ShihA #generative #physics #testing: Transistor-level test generation for physical failures in CMOS circuits (HCS, JAA), pp. 243–249.
DAC-1986-TakasakiSNIK #hardware #logic #simulation: HAL II: a mixed level hardware logic simulation system (ST, TS, NN, HI, NK), pp. 581–587.
DAC-1986-TsuchiyaMITMY #design #logic #scalability: Establishment of higher level logic design for very large scale computer (YT, MM, YI, ET, TM, TY), pp. 366–371.
PODS-1986-Weikum #concurrent #multi: A Theoretical Foundation of Multi-Level Concurrency Control (GW), pp. 31–43.
ESOP-1986-Nielson #code generation #correctness #metalanguage: Correctness of Code Generation from a Two-Level Meta-Language (FN), pp. 30–40.
ESOP-1986-NielsonN #aspect-oriented #metalanguage: Pragmatic Aspects of Two-Level Denotational Meta-Languages (HRN, FN), pp. 133–143.
POPL-1986-Coutant #alias #analysis: Retargetable High-Level Alias Analysis (DSC), pp. 110–118.
POPL-1986-CytronLZ: Code Motion of Control Structures in High-Level Languages (RC, AL, FKZ), pp. 70–85.
LICS-1986-Parikh #distributed: Levels of Knowledge in Distributed Computing (RP), pp. 314–321.
DAC-1985-AshokCS #data flow #modelling #simulation #using: Modeling switch-level simulation using data flow (VA, RLC, PS), pp. 637–644.
DAC-1985-BryantS #concurrent #evaluation #fault #performance: Performance evaluation of FMOSSIM, a concurrent switch-level fault simulator (REB, MDS), pp. 715–719.
DAC-1985-Frank #data-driven #simulation #using: Switch-level simulation of VLSI using a special-purpose data-driven computer (EHF), pp. 735–738.
DAC-1985-MokkaralaFA #approach #functional #simulation #verification: A unified approach to simulation and timing verification at the functional level (VRM, AF, RA), pp. 757–761.
DAC-1985-ReddyRA #generative #testing: Transistor level test generation for MOS circuits (MKR, SMR, PA), pp. 825–828.
DAC-1985-RoyDCG #object-oriented: An object-oriented swicth-level simulator (CR, LPD, EC, JG), pp. 623–629.
DAC-1985-Schaefer: A transistor-level logic-with-timing simulator for MOS circuits (TJS), pp. 762–765.
DAC-1985-ShteingartNG #automation #generative #named: RTG: automatic register level test generator (SS, AWN, JG), pp. 803–807.
SIGMOD-1985-VossenB #aspect-oriented #database #relational #retrieval #user interface: A High-Level User Interface for Update and Retrieval in Relational Databases — Language Aspects (GV, VB), pp. 343–353.
ICALP-1985-EngelfrietV #transducer: Characterization of High Level Tree Transducers (JE, HV), pp. 171–178.
ICALP-1985-OrponenRS #complexity #polynomial: Polynomial Levelability and Maximal Complexity Cores (PO, DAR, US), pp. 435–444.
FPCA-1985-PatelSE85 #algorithm #analysis #hardware #multi #named #specification #synthesis: vFP: An Environment for the Multi-level Specification, Analysis, and Synthesis of Hardware Algorithms (DP, MDFS, MDE), pp. 238–255.
SIGIR-1985-ChouekaKP #performance: Efficient Variants of Huffman Codes in High Level Languages (YC, STK, YP), pp. 122–130.
SIGIR-1985-Defude #information retrieval: Different Levels of Expertise for An Expert System in Information Retrieval (BD), pp. 147–153.
POPL-1985-FraserH #low level: High-Level Language Facilities for Low-Level Services (CWF, DRH), pp. 217–224.
ICSE-1985-BrunoM #agile #petri net #prototype #using: Rapid Prototyping of Control Systems Using High Level Petri Nets (GB, GM), pp. 230–237.
SLP-1985-BowenW85 #prolog: A Meta-Level Extension of Prolog (KAB, TW), pp. 48–53.
SLP-1985-OKeefe85 #on the #prolog #tool support: On the Treatment of Cuts in Prolog Source-Level Tools (RAO), pp. 68–72.
DAC-1984-DoshiSS #interactive #logic #multi: THEMIS logic simulator — a mix mode, multi-level, hierarchical, interactive digital circuit simulator (MHD, RBS, DMS), pp. 24–31.
DAC-1984-DussaultLT #design #synthesis: A high level synthesis tool for MOS chip design (JPD, CCL, MMT), pp. 308–314.
DAC-1984-Ousterhout #modelling: Switch-level delay models for digital MOS VLSI (JKO), pp. 542–548.
DAC-1984-ReddyAJ #detection #fault #logic: A gate level model for CMOS combinational logic circuits with application to fault detection (SMR, VDA, SKJ), pp. 504–509.
DAC-1984-ThamWW #design #functional #multi #simulation #verification: Functional design verification by multi-level simulation (KT, RW, DW), pp. 473–478.
DAC-1984-VeigaL #hardware #multi #named: HARPA: A hierarchical multi-level hardware description language (PV, ML), pp. 59–65.
DAC-1984-WieclawskiP #compilation #layout #network #optimisation: Optimization of negative gate networks realized in weinberger-LIKF layout in a boolean level silicon compiler (AW, MAP), pp. 703–704.
ILPC-1984-Sterling84 #logic #problem: Logical Levels of Problem Solving (LS), pp. 231–242.
DAC-1983-Hahn #design #multi: Computer Design Language — Version Munich (CDLM) a modern multi-level language (WH), pp. 4–11.
DAC-1983-Ramachandran: An improved switch-level simulator for MOS circuits (VR), pp. 293–299.
DAC-1983-SasakiKOT #hardware #logic #named: HAL: A block level HArdware Logic simulator (TS, NK, KO, KT), pp. 150–156.
DAC-1983-StevensA #logic #multi: BIMOS, an MOS oriented multi-level logic simulator (PS, GA), pp. 100–106.
DAC-1983-Vida-TorkuR #fault #multi #quality: Quality level and fault coverage for multichip modules (EKVT, CER), pp. 201–206.
DAC-1983-WalkerT #behaviour: Behavioral level transformation in the CMU-DA system (RAW, DET), pp. 788–789.
VLDB-1983-Subieta #database #network #relational: High-Level Navigational Facilities for Network and Relational Databases (KS), pp. 380–386.
DAC-1982-DesMaraisSW #functional #modelling #simulation: A functional level modelling language for digital simulation (PJD, ESYS, PSW), pp. 315–320.
DAC-1982-LightnerH #algorithm #functional #megamodelling #testing: Implication algorithms for MOS switch level functional macromodeling implication and testing (MRL, GDH), pp. 691–698.
SCC-1982-Turba #execution: A Facility for the Downward Execution of a High-Level Language (TNT), pp. 127–133.
GG-1982-RosenfeldW #image #parallel: Cellular computers for parallel region-level image processing (AR, AYW), pp. 333–348.
GG-1982-Staples #evaluation #performance #representation: Two-level expression representation for faster evaluation (JS), pp. 392–404.
CADE-1982-SterlingB #verification: Meta-Level Inference and Program Verification (LS, AB), pp. 144–150.
ILPC-1982-MaluszynskiN82 #comparison #logic programming #programming language #prolog: A Comparison of the Logic Programming Language Prolog with Two-levels Grammars (JM, JFN), pp. 193–199.
DAC-1981-BellonSG #hardware: Hardware description levels and test for complex circuits (CB, GS, JMG), pp. 213–219.
DAC-1981-Bryant #named: MOSSIM: A switch-level simulator for MOS LSI (REB), pp. 786–790.
DAC-1981-HaferP #analysis #design #formal method #logic #specification: A formal method for the specification, analysis, and design of register-transfer level digital logic (LJH, ACP), pp. 846–853.
DAC-1981-HirschhornHB #algorithm #data type #functional #simulation: Functional level simulation in FANSIM3 — algorithms, data structures and results (SH, MH, CB), pp. 248–255.
STOC-1981-AdachiIK #combinator #complexity #game studies #low level: Low Level Complexity for Combinatorial Games (AA, SI, TK), pp. 228–237.
DAC-1980-dAbreuT #concurrent #fault #functional: An accurate functional level concurrent fault simulator (MAd, EWT), pp. 210–217.
DAC-1980-KimS #design #implementation: Issues in IC implementation of high level, abstract designs (JHK, DPS), pp. 85–91.
DAC-1980-NashRST #functional #simulation: Functional level simulation at Raytheon (DCN, KR, PS, MT), pp. 634–641.
DAC-1980-SasakiYKNTN #logic #named #scalability #verification: MIXS: A mixed level simulator for large digital system logic verification (TS, AY, SK, TN, KT, NN), pp. 626–633.
DAC-1980-ThompsonKRRSB #functional #simulation: The incorporation of functional level element routines into an existing digital simulation system (EWT, PGK, WRRJ, DR, JS, RvB), pp. 394–401.
STOC-1980-EhrigM #algebra #complexity #implementation #specification: Complexity of Implementations on the Level of Algebraic Specifications (HE, BM), pp. 281–293.
POPL-1980-Reid #approach #documentation #pretty-printing: A High-Level Approach to Computer Document Formatting (BKR), pp. 24–31.
CADE-1980-BundyW #algebra #multi #using: Using Meta-Level Inference for Selective Application of Multiple Rewrite Rules in Algebraic Manipulation (AB, BW), pp. 24–38.
DAC-1979-Bening #logic #physics #simulation: Developments in computer simulation of gate level physical logic (LB), pp. 561–567.
DAC-1979-HillC #generative #multi #named #simulation: SABLE: A tool for generating structured, multi-level simulations (DDH, WMvC), pp. 272–279.
DAC-1979-Johnson #behaviour #development: Behavioral-level test development (WAJ), pp. 171–179.
DAC-1979-Wilcox #functional #logic #simulation: Digital logic simulation at the gate and functional level (PSW), pp. 242–248.
ICALP-1979-DembinskiM #equation #two-level grammar: Two Level Grammars: CF-Grammars with Equation Schemes (PD, JM), pp. 171–187.
ICALP-1979-Wegner #approach #decidability #two-level grammar: Bracketed Two-Level Grammars — A Decidable and Practical Approach to Language Definitions (LMW), pp. 668–682.
POPL-1979-Fong #automation #source code: Automatic Improvement of Programs in Very High Level Languages (ACF), pp. 21–28.
DAC-1978-ChenC #multi: Multi-sim, a dynamic multi-level simulator (RCC, JEC), pp. 386–391.
DAC-1978-HaferP #automation #design #process: Register-transfer level digital design automation: The allocation process (LJH, ACP), pp. 213–219.
DAC-1978-TokoroSITIO #simulation: A module level simulation technique for systems composed of LSI’s and MSI’s (MT, MS, MI, ET, TI, HO), pp. 418–427.
DAC-1978-YamadaWFF #automation #fault #generative #scalability #testing: Automatic System Level Test Generation and Fault Location for Large Digital Systems (AY, NW, TF, SF), pp. 347–352.
GG-1978-Hesse #graph grammar: Two-Level Graph Grammars (WH), pp. 255–269.
DAC-1977-AbramoviciBK #concurrent #fault #functional #modelling #simulation: Concurrent fault simulation and functional level modeling (MA, MAB, KK), pp. 128–137.
SIGMOD-1977-Schmidt: Some High-level Language Constructs for Data of Type Relation (Abstract) (JWS), p. 9.
VLDB-1977-TohKS #independence #multi #physics: Multi-Level Structures of the DBTG Data Model for an Achievement of Physical Data Independence (TT, SK, KS), pp. 403–414.
POPL-1977-Fong: Generalized Common Subexpressions in Very High Level Languages (ACF), pp. 48–57.
POPL-1977-PaigeS #reduction: Reduction in Strength of High Level Operations (RP, JTS), pp. 58–71.
POPL-1977-Rosen #control flow: Applications of High-Level Control Flow (BKR), pp. 38–47.
VLDB-J-1975-NavatheF76 #abstraction #database #scalability: Restructuring for Large Data Bases: Three Levels of Abstraction (SBN, JPF), pp. 138–158.
SIGMOD-1976-Date #architecture #database: An Architecture for High-Level Language Database Extensions (CJD), pp. 101–122.
VLDB-1976-SenkoA #abstraction #data access #physics: DIAM II and Levels of Abstraction — The Physical Device Level: A General Model for Access Methods (MES, EBA), pp. 79–94.
POPL-1976-FongU #induction: Induction Variables in Very High Level Languages (ACF, JDU), pp. 104–112.
ICSE-1976-Mashey #programming language #using: Using a Command Language as a High-Level Programming Language (JRM), pp. 169–176.
ICSE-1976-NeumannFLR #development #multi #proving #security: Software Development and Proofs of Multi-Level Security (PGN, RJF, KNL, LR), pp. 421–428.
ICSE-1976-ShankarC #abstraction #specification: Dat Flow, Abstraction Levels and Specifications for Communications Switching Systems (KSS, CSC), pp. 585–591.
DAC-1975-ThompsonB75a #implementation #logic #multi #re-engineering #simulation: The software engineering technique of data hiding as applied to multi-level model implementation of logical devices in digital simulation (EWT, NB), pp. 195–201.
DAC-1975-ThompsonS #fault #simulation: Three levels of accuracy for the simulation of different fault types in digital systems (EWT, SAS), pp. 105–113.
SIGMOD-1975-McGee #data type #network: File-Level Operations on Network Data Structures (WCM), pp. 32–47.
SIGMOD-1975-Shoshani #approach #database: A Logical-Level Approach to Data Base Conversion (AS), pp. 112–122.
SIGMOD-1975-ShuHL #named: CONVERT: A High Level Translation Definition Language for Data Conversion (Abstract) (NCS, BCH, VYL), p. 111.
VLDB-1975-GeyM #keyword: Keyword Access to a Mass Storage Device at the Record Level (FCG, MMM), pp. 572–588.
VLDB-1975-NavatheF #abstraction #database #scalability: Restructuring for Large Data Bases: Three Levels of Abstraction (SBN, JPF), p. 174.
VLDB-1975-SchmidB #architecture #database #multi #relational: A Multi-Level Architecture for Relational Data Base Systems (HAS, PAB), pp. 202–226.
VLDB-1975-Tsubaki #database #multi: Multi-Level Data Model in DPLS — Database, Dynamic Program Control & Open-Ended Pol Support (MT), pp. 538–539.
POPL-1975-Schwartz #automation #data type: Automatic Data Structure Choice in a Language of Very High Level (JTS), pp. 36–40.
SOSP-1975-LamS #algorithm #analysis #scheduling: Analysis of a Level Algorithm for Preemptive Scheduling (SL, RS), pp. 178–186.
SIGFIDET-1974-CopelandS #memory management: A High Level Data Sublanguage for a Context-Addressed Sequential Memory (GPC, SYWS), pp. 265–276.
ICALP-1974-Wijngaarden #generative #power of #two-level grammar: The Generative Power of Two-Level Grammars (AvW), pp. 9–16.
DAC-1973-SzygendaL #functional #logic #simulation: Integrated techniques for functional and gate-level digital logic simulation (SAS, AAL), pp. 159–172.
SOSP-1973-Scheffler #memory management: Optimal Folding of a Paging Drum in a Three Level Memory System (LJS), pp. 58–65.
SOSP-1969-VarehaRG: Strategies for structuring two level memories in a paging environment (ALV, RMR, MMG), pp. 54–59.
SHARE-1965-Frayne #problem: Three levels of the wiring interconnection problem (DKF).