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Travelled to:
1 × France
1 × Germany
Collaborated with:
X.Zhang F.Xia A.Yakovlev F.P.Burns A.Koelmans A.Yakovlev
Talks about:
asynchron (2) synthesi (1) electron (1) verilog (1) toolset (1) design (1) power (1) dynam (1) wide (1) rang (1)

Person: Delong Shang

DBLP DBLP: Shang:Delong

Contributed to:

DATE 20142014
DATE v1 20042004

Wrote 2 papers:

DATE-2014-ShangZXY #design
Asynchronous design for new on-chip wide dynamic range power electronics (DS, XZ, FX, AY), pp. 1–6.
DATE-v1-2004-BurnsSKY #synthesis #tool support #using
An Asynchronous Synthesis Toolset Using Verilog (FPB, DS, AK, AY), pp. 724–725.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.