BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × Germany
Collaborated with:
F.Liu J.J.Flomenberg S.Ozev
Talks about:
hierarch (1) varianc (1) circuit (1) analysi (1) correl (1) analog (1) trace (1) model (1) graph (1) loop (1)

Person: Devaka V. Yasaratne

DBLP DBLP: Yasaratne:Devaka_V=

Contributed to:

DATE 20052005

Wrote 1 papers:

DATE-2005-LiuFYO #analysis #correlation #graph #modelling
Hierarchical Variance Analysis for Analog Circuits Based on Graph Modelling and Correlation Loop Tracing (FL, JJF, DVY, SO), pp. 126–131.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.