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Travelled to:
1 × France
Collaborated with:
C.Passerone L.Lavagno A.L.Rosa F.Intini R.Passerone L.M.Reyneri
Talks about:
implement (2) architectur (1) reconfigur (1) processor (1) structur (1) platform (1) parallel (1) paprica (1) control (1) circuit (1)

Person: Francesco Gregoretti

DBLP DBLP: Gregoretti:Francesco

Contributed to:

DATE v2 20042004
PDP 19961996
PDP 19951995

Wrote 3 papers:

DATE-v2-2004-RosaPGL #configuration management #framework #implementation
Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform (ALR, CP, FG, LL), pp. 1218–1223.
PDP-1996-GregorettiILPR #design #implementation
Design and Implementation of the Control Structure of the PAPRICA-3 Processor (FG, FI, LL, RP, LMR), pp. 290–296.
PDP-1995-GregorettiP #architecture #parallel #testing #using
Using a massively parallel architecture for integrated circuits testing (FG, CP), pp. 332–338.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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