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Travelled to:
1 × USA
Collaborated with:
R.J.S.II
Talks about:
layout (1) verif (1) optim (1) pcb (1) lsi (1)

Person: H. Nelson Brady

DBLP DBLP: Brady:H=_Nelson

Contributed to:

DAC 19811981

Wrote 1 papers:

DAC-1981-BradyS #layout #optimisation #verification
Verification and optimization for LSI & PCB layout (HNB, RJSI), pp. 365–371.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.