Travelled to:1 × France
1 × USA
Collaborated with:K.Usami M.Igarashi T.Ishikawa M.Kanazawa M.Takahashi M.Hamada T.Terazawa T.Kuroda T.Kodaka S.Sasaki T.Tokuyoshi R.Ohyama N.Nonogaki K.Kitayama T.Mori Y.Ueda Y.Okuda T.Kizu Y.Tsuboi N.Matsumoto
Talks about:design (2) core (2) methodolog (1) processor (1) implement (1) transpar (1) techniqu (1) scalabl (1) exploit (1) voltag (1)
Person: Hideho Arakida
DBLP: Arakida:Hideho
Contributed to:
2009
1998Wrote 2 papers:
- DATE-2009-KodakaSTONKMUAOKTM #design #implementation #manycore #scalability #thread
- Design and implementation of scalable, transparent threads for multi-core media processor (TK, SS, TT, RO, NN, KK, TM, YU, HA, YO, TK, YT, NM), pp. 1035–1039.
- DAC-1998-UsamiIIKTHATK #design #power management #scalability
- Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques (KU, MI, TI, MK, MT, MH, HA, TT, TK), pp. 483–488.