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Travelled to:
1 × China
1 × USA
Collaborated with:
K.Ghose F.Afram M.T.Yourst D.V.Ponomarev
Talks about:
processor (2) implement (1) multicor (1) mechan (1) commit (1) simul (1) group (1) lsim (1) base (1) rob (1)

Person: Hui Zeng

DBLP DBLP: Zeng:Hui

Contributed to:

HPCA 20132013
DAC 20092009

Wrote 2 papers:

HPCA-2013-AframZG #implementation
A group-commit mechanism for ROB-based processors implementing the X86 ISA (FA, HZ, KG), pp. 47–58.
DAC-2009-ZengYGP #manycore #named
MPTLsim: a simulator for X86 multicore processors (HZ, MTY, KG, DVP), pp. 226–231.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.