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Travelled to:
3 × USA
Collaborated with:
J.J.Sharkey H.Zeng M.T.Yourst K.Ghose M.Ozsoy C.Donovick I.Gorelik N.B.Abu-Ghazaleh
Talks about:
processor (3) malwar (2) effici (2) framework (1) multicor (1) instruct (1) schedul (1) detect (1) simul (1) onlin (1)

Person: Dmitry V. Ponomarev

DBLP DBLP: Ponomarev:Dmitry_V=

Contributed to:

HPCA 20152015
DAC 20092009
HPCA 20062006

Wrote 3 papers:

HPCA-2015-OzsoyDGAP #detection #framework #online #performance
Malware-aware processors: A framework for efficient online malware detection (MO, CD, IG, NBAG, DVP), pp. 651–661.
DAC-2009-ZengYGP #manycore #named
MPTLsim: a simulator for X86 multicore processors (HZ, MTY, KG, DVP), pp. 226–231.
HPCA-2006-SharkeyP #performance #smt
Efficient instruction schedulers for SMT processors (JJS, DVP), pp. 288–298.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.