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Travelled to:
1 × USA
Collaborated with:
L.L.Biro J.Grodstein W.J.Grundmann Y.Yen
Talks about:
design (1) custom (1) verif (1) devic (1) time (1) full (1) cmos (1)

Person: Jengwei Pan

DBLP DBLP: Pan:Jengwei

Contributed to:

DAC 19911991

Wrote 1 papers:

DAC-1991-PanBGGY #design #verification
Timing Verification on a 1.2M-Device Full-Custom CMOS Design (JP, LLB, JG, WJG, YTY), pp. 551–554.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.