Travelled to:
1 × France
1 × USA
Collaborated with:
D.Tadesse D.Sheffield E.Lenge R.I.Bahar J.Pan L.L.Biro W.J.Grundmann Y.Yen
Talks about:
time (2) pattern (1) analysi (1) design (1) depend (1) custom (1) verif (1) model (1) devic (1) delay (1)
Person: Joel Grodstein
DBLP: Grodstein:Joel
Contributed to:
Wrote 2 papers:
- DATE-2007-TadesseSLBG #analysis #modelling #satisfiability #using
- Accurate timing analysis using SAT and pattern-dependent delay models (DT, DS, EL, RIB, JG), pp. 1018–1023.
- DAC-1991-PanBGGY #design #verification
- Timing Verification on a 1.2M-Device Full-Custom CMOS Design (JP, LLB, JG, WJG, YTY), pp. 551–554.