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Travelled to:
1 × China
1 × Germany
1 × USA
Collaborated with:
L.Zhang Y.Han X.Li Y.Wang Y.Yu S.Ren R.Hou T.Jiang L.Zhang P.Qi H.Wang X.Gu S.Zhang
Talks about:
processor (1) asymmetri (1) virtual (1) topolog (1) perform (1) lifetim (1) variat (1) server (1) enhanc (1) effect (1)

Person: Jianbo Dong

DBLP DBLP: Dong:Jianbo

Contributed to:

HPCA 20132013
DAC 20112011
DATE 20102010

Wrote 3 papers:

HPCA-2013-HouJZQDWGZ #effectiveness
Cost effective data center servers (RH, TJ, LZ, PQ, JD, HW, XG, SZ), pp. 179–187.
DAC-2011-DongZHWL
Wear rate leveling: lifetime enhancement of PRAM with endurance variation (JD, LZ, YH, YW, XL), pp. 972–977.
DATE-2010-ZhangYDHRL #manycore #symmetry
Performance-asymmetry-aware topology virtualization for defect-tolerant NoC-based many-core processors (LZ, YY, JD, YH, SR, XL), pp. 1566–1571.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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