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Travelled to:
2 × USA
Collaborated with:
H.D.Schnurmann R.M.Peters E.R.Hsieh R.A.Rasmussen W.T.Davis
Talks about:
test (2) generat (1) system (1) memori (1) delay (1) autom (1) chip (1) lsi (1)

Person: L. J. Vidunas

DBLP DBLP: Vidunas:L=_J=

Contributed to:

DAC 19841984
DAC 19771977

Wrote 2 papers:

DAC-1984-SchnurmannVP #automation #memory management #testing
An automated system for testing LSI memory chips (HDS, LJV, RMP), pp. 454–458.
DAC-1977-HsiehRVD #generative #testing
Delay test generation (ERH, RAR, LJV, WTD), pp. 486–491.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.