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Travelled to:
1 × Cyprus
1 × Finland
1 × Hungary
1 × Spain
1 × Sweden
2 × Germany
Collaborated with:
S.Crespi-Reghizzi A.Morzenti G.Bertoni P.Fragneto A.Borsotti A.Cherubini K.Atasu M.Macchetti C.D.Nucci E.Rodaro C.Citrini G.Pelosi L.Sportiello
Talks about:
implement (2) regular (2) express (2) effici (2) ambigu (2) pars (2) cryptographi (1) determinist (1) architectur (1) programm (1)

Person: Luca Breveglieri

DBLP DBLP: Breveglieri:Luca

Contributed to:

CIAA 20152015
LATA 20142014
AFL 20082008
DATE Designers’ Forum 20062006
SAC 20042004
DATE 20012001
DLT 19931993

Wrote 8 papers:

CIAA-2015-BorsottiBCM #ambiguity #automaton #parsing #regular expression
From Ambiguous Regular Expressions to Deterministic Parsing Automata (AB, LB, SCR, AM), pp. 35–48.
CIAA-2015-BorsottiBCM15a #ambiguity #named #parsing #regular expression
BSP: A Parsing Tool for Ambiguous Regular Expressions (AB, LB, SCR, AM), pp. 313–316.
LATA-2014-BreveglieriCM #network #parsing
Shift-Reduce Parsers for Transition Networks (LB, SCR, AM), pp. 222–235.
AFL-2008-BreveglieriCNR #equation #problem #satisfiability
NP-completeness of the alphabetical satisfiability problem for trace equations (LB, AC, CDN, ER), pp. 111–121.
DATE-DF-2006-BertoniBFPS #implementation
Software implementation of Tate pairing over GF(2m) (GB, LB, PF, GP, LS), pp. 7–11.
SAC-2004-AtasuBM #implementation #performance #platform
Efficient AES implementations for ARM based platforms (KA, LB, MM), pp. 841–845.
DATE-2001-BertoniBF #architecture #encryption #finite #multi #performance
Efficient finite field digital-serial multiplier architecture for cryptography applications (GB, LB, PF), p. 812.
DLT-1993-BreveglieriCCC #parallel
Fair First Languages and Parallel Programme Schemes (LB, AC, CC, SCR), pp. 389–418.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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