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Travelled to:
1 × USA
Collaborated with:
M.Borgatti L.Cali G.D.Sandre B.Forét D.Iezzi F.Lertora G.Muzzi M.Pasotti P.L.Rolandi
Talks about:
reconfigur (1) process (1) signal (1) memori (1) multi (1) flash (1) embed (1) port (1) fpga (1)

Person: Marco Poles

DBLP DBLP: Poles:Marco

Contributed to:

DAC 20032003

Wrote 1 papers:

DAC-2003-BorgattiCSFILMPPR #configuration management #embedded #memory management #multi
A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory (MB, LC, GDS, BF, DI, FL, GM, MP, MP, PLR), pp. 691–695.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.