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Travelled to:
1 × USA
Collaborated with:
P.Salverda L.Pompe
Talks about:
implement (1) hierarchi (1) softwar (1) hardwar (1) rambus (1) memori (1) direct (1) trade (1) mpage (1) off (1)

Person: Philip Machanick

DBLP DBLP: Machanick:Philip

Contributed to:

ASPLOS 19981998

Wrote 1 papers:

ASPLOS-1998-MachanickSP #implementation #memory management #trade-off
Hardware-Software Trade-Offs in a Direct Rambus Implementation of the RAMpage Memory Hierarchy (PM, PS, LP), pp. 105–114.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.