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Travelled to:
4 × France
4 × Germany
Collaborated with:
V.d.Armas J.A.Montiel-Nelson A.Núñez S.López K.Eshraghian S.Nooshabadi J.F.López G.M.Callicó P.G.Potter W.Luk P.Y.K.Cheung R.Arteaga F.Tobajas R.Esper-Chaín J.Sosa C.Arbelo A.Kanstein M.Berekovic J.Mignolet
Talks about:
high (3) architectur (2) implement (2) hardwar (2) design (2) comput (2) speed (2) reconfigur (1) technolog (1) subsystem (1)

Person: Roberto Sarmiento

DBLP DBLP: Sarmiento:Roberto

Contributed to:

DATE 20102010
DATE 20082008
DATE 20072007
DATE 20052005
DATE 20002000
DATE 19991999
DATE 19981998

Wrote 8 papers:

DATE-2010-LopezSPLC #hardware #image
Exploration of hardware sharing for image encoders (SL, RS, PGP, WL, PYKC), pp. 1737–1742.
DATE-2008-ArteagaF #architecture #hardware #implementation #named #novel
GMDS: Hardware implementation of novel real output queuing architecture (RA, FT, REC, VdA, RS), pp. 1450–1455.
DATE-2007-ArbeloKLLBSM #architecture #configuration management #kernel #video
Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: the H.264/AVC deblocking filter (CA, AK, SL, JFL, MB, RS, JYM), pp. 177–182.
DATE-2005-LopezCLS #estimation #quality
A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation (SL, GMC, JFL, RS), pp. 2–7.
A Single Phase Latch for High Speed GaAs Domino Circuits (SN, JAMN, AN, RS, JS), p. 760.
DATE-1999-Montiel-NelsonNASN #design #logic #using
High Speed GaAs Subsystem Design using Feed Through Logic (JAMN, SN, VdA, RS, AN), p. 509–?.
DATE-1998-Montiel-NelsonASN #compilation #design
A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design (JAMN, VdA, RS, AN), pp. 947–948.
EDAC-1994-SarmientoE #implementation
Implementation of a CORDIC Processor for CFFT Computation in Gallium Arsenide Technology (RS, KE), pp. 238–244.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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