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Travelled to:
1 × USA
Collaborated with:
G.Descamps S.Bagalkotkar S.Ganesan A.Pirson
Talks about:
design (2) processor (1) network (1) million (1) factori (1) gate (1) use (1)

Person: Satish Iyengar

DBLP DBLP: Iyengar:Satish

Contributed to:

DAC 20032003

Wrote 1 papers:

DAC-2003-DescampsBGIP #design #network #using
Design of a 17-million gate network processor using a design factory (GED, SB, SG, SI, AP), pp. 844–849.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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