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Travelled to:
1 × France
1 × USA
Collaborated with:
F.Vahid Y.Wu S.Lonardi C.Huang
Talks about:
acceler (2) system (2) clock (2) microprocessor (1) frequenc (1) multipl (1) partit (1) domain (1) assign (1) onlin (1)

Person: Scott Sirowy

DBLP DBLP: Sirowy:Scott

Contributed to:

DAC 20102010
DATE 20072007

Wrote 3 papers:

DAC-2010-SirowyHV #online
Online SystemC emulation acceleration (SS, CH, FV), pp. 30–35.
DATE-2007-SirowyWLV #clustering
Two-level microprocessor-accelerator partitioning (SS, YW, SL, FV), pp. 313–318.
DATE-2007-SirowyWLV07a #multi
Clock-frequency assignment for multiple clock domain systems-on-a-chip (SS, YW, SL, FV), pp. 397–402.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.