328 papers:
- DAC-2015-CampbellLMC #debugging #detection #fault #hybrid #synthesis #using #validation
- Hybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles (KAC, DL, SM, DC), p. 6.
- DAC-2015-CavigelliMB #embedded #network #realtime
- Accelerating real-time embedded scene labeling with convolutional networks (LC, MM, LB), p. 6.
- DAC-2015-CongGHRY #architecture #network
- On-chip interconnection network for accelerator-rich architectures (JC, MG, YH, GR, BY), p. 6.
- DAC-2015-JassiMS #design #grammarware #integration #named
- GRIP: grammar-based IP integration and packaging for acceleration-rich SoC designs (MJ, DMG, US), p. 6.
- DAC-2015-JiangLZYW #effectiveness #feature model #image #performance
- A 127 fps in full hd accelerator based on optimized AKAZE with efficiency and effectiveness for image feature extraction (GJ, LL, WZ, SY, SW), p. 6.
- DAC-2015-JiangWS #clustering #power management #sorting
- A low power unsupervised spike sorting accelerator insensitive to clustering initialization in sub-optimal feature space (ZJ, QW, MS), p. 6.
- DAC-2015-LiuMLLCLWJBWY #configuration management #design #named
- RENO: a high-efficient reconfigurable neuromorphic computing accelerator design (XL, MM, BL, HL, YC, BL, YW, HJ, MB, QW, JY), p. 6.
- DAC-2015-TeimouriTS #challenge
- Revisiting accelerator-rich CMPs: challenges and solutions (NT, HT, GS), p. 6.
- DAC-2015-WangLZYW #architecture #configuration management #control flow
- Acceleration of control flows on reconfigurable architecture with a composite method (JW, LL, JZ, SY, SW), p. 6.
- DATE-2015-ChenKXMLYVSCY #algorithm #array #learning
- Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip (PYC, DK, ZX, AM, BL, JY, SBKV, JsS, YC, SY), pp. 854–859.
- DATE-2015-FernandoWNKC #agile #algorithm #design #synthesis #using
- (AS)2: accelerator synthesis using algorithmic skeletons for rapid design space exploration (SF, MW, CN, AK, HC), pp. 305–308.
- DATE-2015-GheolbanoiuPC #adaptation #hybrid
- Hybrid adaptive clock management for FPGA processor acceleration (AG, LP, SC), pp. 1359–1364.
- DATE-2015-GiefersPH #kernel
- Accelerating arithmetic kernels with coherent attached FPGA coprocessors (HG, RP, CH), pp. 1072–1077.
- DATE-2015-KadryKMNSPPJS #case study #comparative #generative #simulation #testing
- Comparative study of test generation methods for simulation accelerators (WK, DK, AM, AN, VS, JSP, SBP, WJ, JCS), pp. 321–324.
- DATE-2015-KhanhSKA #dependence #design #synthesis
- Exploiting loop-array dependencies to accelerate the design space exploration with high level synthesis (PNK, AKS, AK, KMMA), pp. 157–162.
- DATE-2015-KhanSH #adaptation #manycore #power management
- Power-efficient accelerator allocation in adaptive dark silicon many-core systems (MUKK, MS, JH), pp. 916–919.
- DATE-2015-LiuDNL #hardware #named #realtime
- FastTree: a hardware KD-tree construction acceleration engine for real-time ray tracing (XL, YD, YN, ZL), pp. 1595–1598.
- DATE-2015-MazloumiM #hybrid #memory management #multi
- A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors (AM, MM), pp. 908–911.
- DATE-2015-NguyenASS #gpu #simulation
- Accelerating complex brain-model simulations on GPU platforms (HADN, ZAA, GS, CS), pp. 974–979.
- DATE-2015-PaulinoFBC #configuration management #execution #hardware #using
- Transparent acceleration of program execution using reconfigurable hardware (NMCP, JCF, JB, JMPC), pp. 1066–1071.
- DATE-2015-PeemenMC #embedded #optimisation #reuse
- Inter-tile reuse optimization applied to bandwidth constrained embedded accelerators (MP, BM, HC), pp. 169–174.
- DATE-2015-RajendranRadhika
- Path selection based acceleration of conditionals in CGRAs (SR, AS, MH), pp. 121–126.
- DATE-2015-RamachandranHHM #fault
- FPGA accelerated DNA error correction (AR, YH, WmWH, JM, DC), pp. 1371–1376.
- DATE-2015-SchneiderHKWW #fault #simulation
- GPU-accelerated small delay fault simulation (ES, SH, MAK, XW, HJW), pp. 1174–1179.
- DATE-2015-SonghoriMLK #automation #data analysis #framework #hardware #named
- AHEAD: automated framework for hardware accelerated iterative data analysis (EMS, AM, XL, FK), pp. 942–947.
- DATE-2015-TuYOLW #architecture #configuration management #hardware #named
- RNA: a reconfigurable architecture for hardware neural acceleration (FT, SY, PO, LL, SW), pp. 695–700.
- DATE-2015-WangHNYYWYZ #energy #in memory #recognition
- An energy-efficient non-volatile in-memory accelerator for sparse-representation based face recognition (YW, HH, LN, HY, MY, CW, WY, JZ), pp. 932–935.
- DATE-2015-WangLZ #big data #named
- SODA: software defined FPGA based accelerators for big data (CW, XL, XZ), pp. 884–887.
- SIGMOD-2015-HeimelKM #estimation #kernel #modelling #multi #self
- Self-Tuning, GPU-Accelerated Kernel Density Models for Multidimensional Selectivity Estimation (MH, MK, VM), pp. 1477–1492.
- SIGMOD-2015-KatsisOPZ #incremental #maintenance
- Utilizing IDs to Accelerate Incremental View Maintenance (YK, KWO, YP, KKZ), pp. 1985–2000.
- SIGMOD-2015-LiCP #encoding
- A Padded Encoding Scheme to Accelerate Scans by Leveraging Skew (YL, CC, JMP), pp. 1509–1524.
- TACAS-2015-Wijs #branch #gpu #similarity
- GPU Accelerated Strong and Branching Bisimilarity Checking (AW), pp. 368–383.
- SAS-2015-CattaruzzaASK #analysis #bound
- Unbounded-Time Analysis of Guarded LTI Systems with Inputs by Abstract Acceleration (DC, AA, PS, DK), pp. 312–331.
- ICML-2015-IoffeS #network #normalisation
- Batch Normalization: Accelerating Deep Network Training by Reducing Internal Covariate Shift (SI, CS), pp. 448–456.
- ICML-2015-YuCL #learning #multi #online #rank
- Accelerated Online Low Rank Tensor Learning for Multivariate Spatiotemporal Streams (RY, DC, YL), pp. 238–247.
- KDD-2015-BegumUWK #clustering #novel
- Accelerating Dynamic Time Warping Clustering with a Novel Admissible Pruning Strategy (NB, LU, JW, EJK), pp. 49–58.
- KDD-2015-KadkhodaieCSB #multi
- Accelerated Alternating Direction Method of Multipliers (MK, KC, MS, AB), pp. 497–506.
- SEKE-2015-CostaSRSAP #collaboration #nearest neighbour
- A Collaborative Method to Reduce the Running Time and Accelerate the k-Nearest Neighbors Search (AAMC, RRdS, FBAR, GS, HOdA, AP), pp. 105–109.
- SAC-2015-MartinCBGP #algorithm #gpu
- OpenACC-based GPU acceleration of an optical flow algorithm (NM, JC, GB, CG, MP), pp. 96–98.
- SAC-2015-RodriguesJD #recommendation #using
- Accelerating recommender systems using GPUs (AVR, AJ, ID), pp. 879–884.
- ESEC-FSE-2015-BellKMD #dependence #detection #java #performance
- Efficient dependency detection for safe Java test acceleration (JB, GEK, EM, MD), pp. 770–781.
- ASPLOS-2015-LiuCLZZTFZC #machine learning #named
- PuDianNao: A Polyvalent Machine Learning Accelerator (DFL, TC, SL, JZ, SZ, OT, XF, XZ, YC), pp. 369–381.
- CGO-2015-McAfeeO #framework #generative #learning #multi #named
- EMEURO: a framework for generating multi-purpose accelerators via deep learning (LCM, KO), pp. 125–135.
- CGO-2015-OhM #web
- Snapshot-based loading-time acceleration for web applications (JO, SMM), pp. 179–189.
- HPCA-2015-FarahaniAMK #architecture #memory management #named #standard
- NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules (AFF, JHA, KM, NSK), pp. 283–295.
- HPCA-2015-MoreauWNSECO #approximate #named #programmable
- SNNAP: Approximate computing on programmable SoCs via neural acceleration (TM, MW, JN, AS, HE, LC, MO), pp. 603–614.
- HPCA-2015-NeuwirthFNB #architecture #communication #scalability
- Scalable communication architecture for network-attached accelerators (SN, DF, MN, UB), pp. 627–638.
- HPDC-2015-BestaH #hardware #memory management #transaction
- Accelerating Irregular Computations with Hardware Transactional Memory and Active Messages (MB, TH), pp. 161–172.
- HPDC-2015-SabneSE #clustering #named #pipes and filters #programming
- HeteroDoop: A MapReduce Programming System for Accelerator Clusters (AS, PS, RE), pp. 235–246.
- PPoPP-2015-HaidarDLTD #hardware #linear #towards
- Towards batched linear solvers on accelerated hardware platforms (AH, TD, PL, ST, JJD), pp. 261–262.
- PPoPP-2015-KimLV #multi #programming
- An OpenACC-based unified programming model for multi-accelerator systems (JK, SL, JSV), pp. 257–258.
- ASE-2014-RajanSSK #execution #using
- Accelerated test execution using GPUs (AR, SS, PS, DK), pp. 97–102.
- DAC-2014-CongGGGGR #architecture
- Accelerator-Rich Architectures: Opportunities and Progresses (JC, MAG, MG, BG, KG, GR), p. 6.
- DAC-2014-CongLXZ #architecture #clustering #reuse
- An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers (JC, PL, BX, PZ), p. 6.
- DAC-2014-GuoBS #modelling #self
- Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques (XG, WB, MRS), p. 6.
- DAC-2014-LiuGJA #named #pipes and filters
- CGPA: Coarse-Grained Pipelined Accelerators (FL, SG, NPJ, DIA), p. 6.
- DAC-2014-RoyMIT #multi #performance
- Tile Before Multiplication: An Efficient Strategy to Optimize DSP Multiplier for Accelerating Prime Field ECC for NIST Curves (DBR, DM, MI, JT), p. 6.
- DATE-2014-BurgioTCMB #clustering #embedded #hardware #memory management #parallel
- Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters (PB, GT, FC, AM, LB), pp. 1–6.
- DATE-2014-ParkYLL #graph #memory management #representation
- Accelerating graph computation with racetrack memory and pointer-assisted graph representation (EP, SY, SL, HL), pp. 1–4.
- DATE-2014-PaulKBP #energy #hardware #memory management
- Energy-efficient hardware acceleration through computing in the memory (SP, RK, SB, RP), pp. 1–6.
- SIGMOD-2014-ArnoldHFSKL #database #set
- An application-specific instruction set for accelerating set-oriented database primitives (OA, SH, GF, BS, TK, WL), pp. 767–778.
- VLDB-2014-LiP #named
- WideTable: An Accelerator for Analytical Data Processing (YL, JMP), pp. 907–918.
- HIMI-DE-2014-ItoW #challenge #communication
- Three Key Challenges in ARM-COMS for Entrainment Effect Acceleration in Remote Communication (TI, TW), pp. 177–186.
- CAiSE-2014-WalleC #information management
- Risk Accelerators in Disasters — Insights from the Typhoon Haiyan Response on Humanitarian Information Management and Decision Support (BVdW, TC), pp. 12–23.
- ICML-c1-2014-LinX #adaptation #continuation #optimisation
- An Adaptive Accelerated Proximal Gradient Method and its Homotopy Continuation for Sparse Optimization (QL, LX), pp. 73–81.
- ICML-c1-2014-Shalev-Shwartz0 #coordination #probability
- Accelerated Proximal Stochastic Dual Coordinate Ascent for Regularized Loss Minimization (SSS, TZ), pp. 64–72.
- ICML-c2-2014-YuKC #algorithm
- Saddle Points and Accelerated Perceptron Algorithms (AWY, FKK, JGC), pp. 1827–1835.
- ICPR-2014-AodhaSBTGJ #interactive #machine learning
- Putting the Scientist in the Loop — Accelerating Scientific Progress with Interactive Machine Learning (OMA, VS, GJB, MT, MAG, KEJ), pp. 9–17.
- OOPSLA-2014-ZhangLBF #abstract syntax tree #optimisation
- Accelerating iterators in optimizing AST interpreters (WZ, PL, SB, MF), pp. 727–743.
- POPL-2014-JeannetSS #linear
- Abstract acceleration of general linear loops (BJ, PS, SS), pp. 529–540.
- SAC-2014-RockiBS #abstraction #future of #performance #programming #question
- The future of accelerator programming: abstraction, performance or can we have both? (KR, MB, RS), pp. 886–895.
- ASPLOS-2014-ChenDSWWCT #named #ubiquitous
- DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning (TC, ZD, NS, JW, CW, YC, OT), pp. 269–284.
- ASPLOS-2014-MenychtasSS #performance #scheduling
- Disengaged scheduling for fair, protected access to fast computational accelerators (KM, KS, MLS), pp. 301–316.
- CGO-2014-NagarakatteMZ #named #pointer
- WatchdogLite: Hardware-Accelerated Compiler-Based Pointer Checking (SN, MMKM, SZ), p. 175.
- CGO-2014-YeSX #analysis #detection
- Accelerating Dynamic Detection of Uses of Undefined Values with Static Value-Flow Analysis (DY, YS, JX), p. 154.
- HPCA-2014-FytrakiVKFG #monitoring #named #programmable
- FADE: A programmable filtering accelerator for instruction-grain monitoring (SF, EV, YOK, BF, BG), pp. 108–119.
- HPCA-2014-PariharH #approach #dependence #metaheuristic
- Accelerating decoupled look-ahead via weak dependence removal: A metaheuristic approach (RP, MCH), pp. 662–677.
- HPDC-2014-El-HelwHB #clustering #manycore #named #pipes and filters
- Glasswing: accelerating mapreduce on multi-core and many-core clusters (IEH, RFHH, HEB), pp. 295–298.
- HPDC-2014-LeeV #compilation #named #performance #research
- OpenARC: open accelerator research compiler for directive-based, efficient heterogeneous computing (SL, JSV), pp. 115–120.
- PPoPP-2014-SungGGGH #matrix
- In-place transposition of rectangular matrices on accelerators (IJS, JGL, JMGL, NG, WmWH), pp. 207–218.
- CASE-2013-OkumaEHK #novel
- A novel nonlinear compensator based on digital acceleration control (MO, TE, YH, YK), pp. 942–947.
- DAC-2013-NajjarV #compilation #perspective
- FPGA code accelerators — the compiler perspective (WAN, JRV), p. 6.
- DAC-2013-ParkZDK #recognition
- Accelerators for biologically-inspired attention and recognition (MSP, CZ, MD, SK), p. 6.
- DATE-2013-BertaccoCBFVKP #on the
- On the use of GP-GPUs for accelerating compute-intensive EDA applications (VB, DC, NB, FF, SV, AMK, HDP), pp. 1357–1366.
- DATE-2013-JooyaB #power management #using
- Using synchronization stalls in power-aware accelerators (AJ, AB), pp. 400–403.
- DATE-2013-LotfianJ #architecture #hardware #power management #smarttech #using
- An ultra-low power hardware accelerator architecture for wearable computers using dynamic time warping (RL, RJ), pp. 913–916.
- DATE-2013-Pham-QuocHWABB #design #hardware #hybrid
- Hybrid interconnect design for heterogeneous hardware accelerators (CPQ, JH, SW, ZAA, JB, KB), pp. 843–846.
- DATE-2013-SchryverTW #monte carlo #multi
- A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model (CdS, PT, NW), pp. 248–253.
- DATE-2013-ShengWLY #named #parallel
- SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors (XS, YW, YL, HY), pp. 865–868.
- DATE-2013-ThabetLAPD #architecture #flexibility #hardware #manycore #performance
- An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture (FT, YL, CA, JMP, RD), pp. 531–534.
- VLDB-2013-RamanABCKKLLLLMMPSSSSZ
- DB2 with BLU Acceleration: So Much More than Just a Column Store (VR, GKA, RB, NC, DK, VK, JL, SL, SL, GML, TM, RM, IP, BS, DS, RS, AJS, LZ), pp. 1080–1091.
- ICSM-2013-DitMVP #component #library #maintenance #research #using
- Supporting and Accelerating Reproducible Research in Software Maintenance Using TraceLab Component Library (BD, EM, MLV, DP), pp. 330–339.
- IFL-2013-GrelckW #adaptation #array #functional #generative #performance
- Next Generation Asynchronous Adaptive Specialization for Data-Parallel Functional Array Processing in SAC: Accelerating the Availability of Specialized High Performance Code (CG, HW), p. 117.
- HILT-2013-MichellMP #manycore #programming #realtime
- Real-time programming on accelerator many-core processors (SM, BM, LMP), pp. 23–36.
- CIKM-2013-VanderbauwhedeFACM #throughput #using
- High throughput filtering using FPGA-acceleration (WV, AF, LA, SRC, MM), pp. 1245–1248.
- SAC-2013-HeckelerSK #component #execution #robust #testing #using
- Accelerated robustness testing of state-based components using reverse execution (PH, BS, TK), pp. 1188–1195.
- CGO-2013-WangWC #android #bytecode #named
- Acceldroid: Co-designed acceleration of Android bytecode (CW, YW, MC), p. 10.
- HPCA-2013-SampsonYWCW #3d #parallel
- Sonic Millip3De: A massively parallel 3D-stacked accelerator for 3D ultrasound (RS, MY, SW, CC, TFW), pp. 318–329.
- HPCA-2013-YueZ #symmetry
- Accelerating write by exploiting PCM asymmetries (JY, YZ), pp. 282–293.
- HPDC-2013-HeBTGGMS #detection
- I/O acceleration with pattern detection (JH, JB, AT, GG, GAG, CM, XHS), pp. 25–36.
- LCTES-2013-Wu
- HW/SW co-designed acceleration of dynamic languages (YW), pp. 1–2.
- DAC-2012-Al-MaashriDCCXNC #algorithm #recognition
- Accelerating neuromorphic vision algorithms for recognition (AAM, MD, MC, NC, YX, VN, CC), pp. 579–584.
- DAC-2012-ChatterjeeKMZB #architecture
- Checking architectural outputs instruction-by-instruction on acceleration platforms (DC, AK, RM, AZ, VB), pp. 955–961.
- DAC-2012-CongGGGR #architecture
- Architecture support for accelerator-rich CMPs (JC, MAG, MG, BG, GR), pp. 843–849.
- DAC-2012-MelpignanoBFJLHCD #embedded #evaluation #framework #manycore #performance #visual notation
- Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications (DM, LB, EF, BJ, TL, GH, FC, DD), pp. 1137–1142.
- DAC-2012-PurandareAH #correctness #proving #regular expression
- Proving correctness of regular expression accelerators (MP, KA, CH), pp. 350–355.
- DAC-2012-VincoCBF #architecture #gpu #named
- SAGA: SystemC acceleration on GPU architectures (SV, DC, VB, FF), pp. 115–120.
- DATE-2012-Al-HashimiM #framework #hardware #question #verification
- Accelerators and emulators: Can they become the platform of choice for hardware verification? (BMAH, RM), p. 430.
- DATE-2012-BeniniFFM #composition #ecosystem #embedded #named #scalability
- P2012: Building an ecosystem for a scalable, modular and high-efficiency embedded computing accelerator (LB, EF, DF, DM), pp. 983–987.
- DATE-2012-Chian #industrial #modelling
- New foundry models — accelerations in transformations of the semiconductor industry (MC), p. 2.
- DATE-2012-LiuTW #analysis #approach #graph #parallel #statistics
- Parallel statistical analysis of analog circuits by GPU-accelerated graph-based approach (XL, SXDT, HW), pp. 852–857.
- DATE-2012-LiuTWY #simulation
- A GPU-accelerated envelope-following method for switching power converter simulation (XL, SXDT, HW, HY), pp. 1349–1354.
- DATE-2012-MammoCPNZMB #approximate #simulation
- Approximating checkers for simulation acceleration (BM, DC, DP, AN, AZ, RM, VB), pp. 153–158.
- DATE-2012-ParkKSNI #classification
- An FPGA-based accelerator for cortical object classification (MSP, SK, JS, VN, MJI), pp. 691–696.
- DATE-2012-StipicTZCUV #data access #hardware #metadata #named #performance
- TagTM — accelerating STMs with hardware tags for fast meta-data access (SS, ST, FZ, AC, OSÜ, MV), pp. 39–44.
- DATE-2012-SuriBE #approach #multi #problem #scalability
- A scalable GPU-based approach to accelerate the multiple-choice knapsack problem (BS, UDB, PE), pp. 1126–1129.
- VLDB-2012-WangHLWZS #cpu #gpu #hybrid #image
- Accelerating Pathology Image Data Cross-Comparison on CPU-GPU Hybrid Systems (KW, YH, RL, FW, XZ, JHS), pp. 1543–1554.
- VLDB-2012-YangLW #database #named #sequence
- ALAE: Accelerating Local Alignment with Affine Gap Exactly in Biosequence Databases (XY, HL, BW), pp. 1507–1518.
- PLDI-2012-NagarakatteBMM #concurrent #debugging #detection #manycore
- Multicore acceleration of priority-based schedulers for concurrency bug detection (SN, SB, MMKM, MM), pp. 543–554.
- IFL-2012-ThiemannC
- Agda Meets Accelerate (PT, MMTC), pp. 174–189.
- ICEIS-J-2012-GottardiPC12a #approach #framework #modelling #reuse #using
- Accelerating Crosscutting Framework Reuse Using a Model-Based Approach (TG, OPL, VVdC), pp. 257–273.
- CIKM-2012-KozawaAK #database #gpu #mining #nondeterminism #probability
- GPU acceleration of probabilistic frequent itemset mining from uncertain databases (YK, TA, HK), pp. 892–901.
- CIKM-2012-MasadaT #gpu #topic
- Extraction of topic evolutions from references in scientific articles and its GPU acceleration (TM, AT), pp. 1522–1526.
- CIKM-2012-YaoC #locality #matrix
- Accelerating locality preserving nonnegative matrix factorization (GY, DC), pp. 2271–2274.
- ICML-2012-McAfeeO #code generation #network #static analysis
- Utilizing Static Analysis and Code Generation to Accelerate Neural Networks (LCM, KO), p. 192.
- ICML-2012-OuyangG #probability
- Stochastic Smoothing for Nonsmooth Minimizations: Accelerating SGD by Exploiting Structure (HO, AGG), p. 198.
- ICML-2012-YueHG
- Hierarchical Exploration for Accelerating Contextual Bandits (YY, SAH, CG), p. 128.
- ICPR-2012-LiuW12b #performance #recognition #robust
- Accelerated robust sparse coding for fast face recognition (GL, YY, HW), pp. 3394–3397.
- ICPR-2012-LoWCC #3d #estimation #locality #people
- Acceleration of vanishing point-based line sampling scheme for people localization and height estimation via 3D line sampling (KHL, CJW, JHC, HTC), pp. 2788–2791.
- ICPR-2012-WakaharaY #correlation #image
- Acceleration of GAT correlation for distortion-tolerant image matching (TW, YY), pp. 746–749.
- KDD-2012-HuZLYH #matrix
- Accelerated singular value thresholding for matrix completion (YH, DZ, JL, JY, XH), pp. 298–306.
- KMIS-2012-Damtew #community #health
- Accelerating Health Service and Data Capturing Trough Community Health Workers in Rural Ethiopia — A Pre-requisite to Progress (ZAD), pp. 168–177.
- SAC-2012-FazackerleyML #database #gpu
- GPU accelerated AES-CBC for database applications (SF, SMM, RL), pp. 873–878.
- SAC-2012-MbarekKPA #design #modelling #power management #using
- Using model driven engineering to reliably accelerate early Low Power Intent Exploration for a system-on-chip design (OM, AK, AP, MA), pp. 1580–1587.
- ASPLOS-2012-OlszewskiZKAA #analysis #named
- Aikido: accelerating shared data dynamic analyses (MO, QZ, DK, JA, SPA), pp. 173–184.
- ASPLOS-2012-VasicNMKB #named #resource management
- DejaVu: accelerating resource allocation in virtualized environments (NV, DMN, SM, DK, RB), pp. 423–436.
- CGO-2012-AnsaloniBHC #multi #program analysis
- Deferred methods: accelerating dynamic program analysis on multicores (DA, WB, AH, LYC), pp. 242–251.
- HPCA-2012-BensonCFHGNS #design #hardware #implementation #integration
- Design, integration and implementation of the DySER hardware accelerator into OpenSPARC (JB, RC, CF, CHH, VG, TN, KS), pp. 115–126.
- HPCA-2012-MillerPTST #named #process
- Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips (TNM, XP, RT, NS, RT), pp. 27–38.
- HPCA-2012-SalapuraKNM
- Accelerating business analytics applications (VS, TK, PN, JEM), pp. 413–422.
- PPoPP-2012-TaoBB #development #gpu #kernel #scalability #using
- Using GPU’s to accelerate stencil-based computation kernels for the development of large scale scientific applications on heterogeneous systems (JT, MB, SRB), pp. 287–288.
- DAC-2011-KinsmanN #configuration management #on the fly
- Dynamic binary translation to a reconfigurable target for on-the-fly acceleration (PK, NN), pp. 286–287.
- DAC-2011-MoffittSV #clustering #functional #robust #verification
- Robust partitioning for hardware-accelerated functional verification (MDM, MAS, PGV), pp. 854–859.
- DATE-2011-ChangMFWHYN #architecture #hardware #hybrid #optimisation
- Optimization of stateful hardware acceleration in hybrid architectures (XC, YM, HF, KW, RH, HY, TN), pp. 567–570.
- DATE-2011-ChenGSS #analysis #performance
- Data-oriented performance analysis of SHA-3 candidates on FPGA accelerated computers (ZC, XG, AS, PS), pp. 1650–1655.
- DATE-2011-ChrysanthouCSP #algorithm #parallel
- Parallel accelerators for GlimmerHMM bioinformatics algorithm (NC, GC, ES, IP), pp. 94–99.
- DATE-2011-KesturDN #named #streaming
- SHARC: A streaming model for FPGA accelerators and its application to Saliency (SK, DD, VN), pp. 1237–1242.
- DATE-2011-WangKAWMA #energy #simulation #using
- Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique (LW, TJK, BMAH, ASW, GVM, INAG), pp. 1267–1272.
- ICDAR-2011-WakaharaY #invariant #recognition
- Affine-Invariant Recognition of Handwritten Characters via Accelerated KL Divergence Minimization (TW, YY), pp. 1095–1099.
- VLDB-2011-MoerkotteN #query
- Accelerating Queries with Group-By and Join by Groupjoin (GM, TN), pp. 843–851.
- SAS-2011-SchrammelJ #data flow #source code #verification
- Logico-Numerical Abstract Acceleration and Application to the Verification of Data-Flow Programs (PS, BJ), pp. 233–248.
- CHI-2011-JunuzovicIHZTB #bibliography #multimodal #using #what
- What did i miss?: in-meeting review using multimodal accelerated instant replay (air) conferencing (SJ, KI, RH, ZZ, JCT, CB), pp. 513–522.
- DHM-2011-GrafHKM #3d #multi #re-engineering #realtime #video
- Accelerated Real-Time Reconstruction of 3D Deformable Objects from Multi-view Video Channels (HG, LH, SK, CM), pp. 282–291.
- DHM-2011-SchieferKOHE #3d #metric
- 3D Human Motion Capturing Based Only on Acceleration and Angular Rate Measurement for Low Extremities (CS, TK, EO, IH, RPE), pp. 195–203.
- DUXU-v2-2011-RyderSY #framework #grid
- The Grid Intelligent Planning Framework: Planning Electric Utility Investments in a Time of Accelerating Change (GR, FS, SY), pp. 205–214.
- HIMI-v1-2011-AsaoKK
- Effects of Joint Acceleration on Rod’s Length Perception by Dynamic Touch (TA, YK, KK), pp. 381–390.
- KDD-2011-Inchiosa #data mining #mining #scalability #using
- Accelerating large-scale data mining using in-database analytics (MEI), p. 778.
- KDIR-2011-Goble
- Accelerating Scientists’ Knowledge Turns (CAG), p. 7.
- POPL-2011-PrabhuRMH #analysis #named
- EigenCFA: accelerating flow analysis with GPUs (TP, SR, MM, MWH), pp. 511–522.
- SAC-2011-ParisAL #on-demand
- Accelerated chaining: a better way to harness peer power in video-on-demand applications (JFP, AA, DDEL), pp. 534–539.
- ASPLOS-2011-CasperOHBKO #hardware #memory management #transaction
- Hardware acceleration of transactional memory on commodity systems (JC, TO, SH, NGB, CK, KO), pp. 27–38.
- CGO-2011-MehraraM #execution #web
- Dynamically accelerating client-side web applications through decoupled execution (MM, SAM), pp. 74–84.
- HPCA-2011-HouZHWFGC #challenge #data type #performance #streaming
- Efficient data streaming with on-chip accelerators: Opportunities and challenges (RH, LZ, MCH, KW, HF, YG, XC), pp. 312–320.
- HPCA-2011-LeeTST #fine-grained #multi #named #thread
- HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor (SL, DT, YS, JT), pp. 99–110.
- PPoPP-2011-HongKOO #algorithm #graph
- Accelerating CUDA graph algorithms at maximum warp (SH, SKK, TO, KO), pp. 267–276.
- CASE-2010-LamS #hardware
- Accelerating shortest path computations in hardware (SKL, TS), pp. 63–68.
- DAC-2010-KinsmanN #algorithm #design #hardware #robust
- Robust design methods for hardware accelerators for iterative algorithms in scientific computing (ABK, NN), pp. 254–257.
- DAC-2010-SirowyHV #online
- Online SystemC emulation acceleration (SS, CH, FV), pp. 30–35.
- DATE-2010-FuHLL
- Accelerating Lightpath setup via broadcasting in binary-tree waveguide in Optical NoCs (BF, YH, HL, XL), pp. 933–936.
- DATE-2010-GiraldoMJM #hardware #using
- A HMMER hardware accelerator using divergences (JFEG, NM, RPJ, ACMAdM), pp. 405–410.
- DATE-2010-MehdipourHKIKMAF #quantum #scalability
- Mapping scientific applications on a large-scale data-path accelerator implemented by single-flux quantum (SFQ) circuits (FM, HH, HK, KI, IK, KM, HA, AF), pp. 993–996.
- CIKM-2010-WangCLC #approach #mining #modelling #probability
- Accelerating probabilistic frequent itemset mining: a model-based approach (LW, RC, SDL, DWLC), pp. 429–438.
- ICML-2010-BardenetK #algorithm #optimisation
- Surrogating the surrogate: accelerating Gaussian-process-based global optimization with a mixture cross-entropy algorithm (RB, BK), pp. 55–62.
- ICML-2010-JojicGK #composition
- Accelerated dual decomposition for MAP inference (VJ, SG, DK), pp. 503–510.
- SAC-2010-AnastasiadisSP #detection #multi #performance
- A fast multiplier-less edge detection accelerator for FPGAs (NA, IS, KZP), pp. 510–515.
- SAC-2010-DaniVAS #manycore
- Accelerating multi-core simulators (AMD, KV, BA, YNS), pp. 2377–2382.
- SAC-2010-SiderisMP #hardware #java
- A hardware peripheral for Java bytecodes translation acceleration (IS, NKM, KZP), pp. 552–553.
- ASPLOS-2010-VlachosGKCFGM #monitoring #named #online #parallel #thread
- ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications (EV, MLG, MAK, SC, BF, PBG, TCM), pp. 271–284.
- HPCA-2010-LeeLSKKS #clustering #manycore
- COMIC++: A software SVM system for heterogeneous multicore accelerator clusters (JL, JL, SS, JK, SK, ZS), pp. 1–12.
- HPDC-2010-GharaibehAGR #gpu
- A GPU accelerated storage system (AG, SAK, SG, MR), pp. 167–178.
- HPDC-2010-LinWG #gpu #migration
- OpenGL application live migration with GPU acceleration in personal cloud (YL, WW, KG), pp. 280–283.
- PPoPP-2010-SandesM #comparison #gpu #named #sequence #using
- CUDAlign: using GPU to accelerate the comparison of megabase genomic sequences (EFdOS, ACMAdM), pp. 137–146.
- CAV-2010-BozgaIK #performance
- Fast Acceleration of Ultimately Periodic Relations (MB, RI, FK), pp. 227–242.
- DAC-2009-AlimohammadFC #verification
- FPGA-based accelerator for the verification of leading-edge wireless systems (AA, SFF, BFC), pp. 844–847.
- DATE-2009-AfratisGSMCPP #database #design #implementation
- Design and implementation of a database filter for BLAST acceleration (PA, CG, ES, GGM, GC, IP, DNP), pp. 166–171.
- DATE-2009-AnsaloniBP #architecture #embedded
- Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration (GA, PB, LP), pp. 542–547.
- DATE-2009-ChenKLA
- Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing (XC, JK, SL, VA), pp. 1530–1535.
- VLDB-2009-LeglerLSK #distributed #mining #robust #using
- Robust Distributed Top-N Frequent Pattern Mining Using the SAP BW Accelerator (TL, WL, JS, JK), pp. 1438–1449.
- HCD-2009-RoblesAAP #process
- Accelerating the Knowledge Innovation Process (GCR, GAH, AAAL, RPG), pp. 184–192.
- HCI-AUII-2009-MatsuiIK #image #recognition #using
- Front Environment Recognition of Personal Vehicle Using the Image Sensor and Acceleration Sensors for Everyday Computing (TM, TI, YK), pp. 151–158.
- HCI-NT-2009-OkuboF #development #estimation #using
- Development of Estimation System for Concentrate Situation Using Acceleration Sensor (MO, AF), pp. 131–140.
- ICML-2009-Doshi-VelezG #process
- Accelerated sampling for the Indian Buffet Process (FDV, ZG), pp. 273–280.
- ICML-2009-JiY
- An accelerated gradient method for trace norm minimization (SJ, JY), pp. 457–464.
- SEKE-2009-WilliamsR #risk management #statistics #using
- Accelerated Risk Management using Statistical Triggers (RW, KR), pp. 643–648.
- OOPSLA-2009-CharlesFSDV #eclipse #ide
- Accelerating the creation of customized, language-Specific IDEs in Eclipse (PC, RMF, SMSJ, ED, JJV), pp. 191–206.
- GPCE-2009-Nikhil #design #hardware #using
- Using GPCE principles for hardware systems and accelerators: (bridging the gap to HW design) (RSN), pp. 1–2.
- ASPLOS-2009-SulemanMQP #architecture #execution #manycore #symmetry
- Accelerating critical section execution with asymmetric multi-core architectures (MAS, OM, MKQ, YNP), pp. 253–264.
- HPCA-2009-FanKDM #programmable
- Bridging the computation gap between programmable processors and hardwired accelerators (KF, MK, GSD, SAM), pp. 313–322.
- LCTES-2009-UdupaGT #execution #multi #source code
- Synergistic execution of stream programs on multicores with accelerators (AU, RG, MJT), pp. 99–108.
- PPoPP-2009-KistlerGBB
- Petascale computing with accelerators (MK, JAG, DAB, BB), pp. 241–250.
- PPoPP-2009-Quintana-OrtiIQG #hardware #linear #multi
- Solving dense linear systems on platforms with multiple hardware accelerators (GQO, FDI, ESQO, RAvdG), pp. 121–130.
- DAC-2008-Cummings #design #verification
- SystemVerilog implicit port enhancements accelerate system design & verification (CEC), pp. 231–236.
- DAC-2008-DasikaDFMB #using
- DVFS in loop accelerators using BLADES (GSD, SD, KF, SAM, DMB), pp. 894–897.
- DAC-2008-DavisTYZ #configuration management #hardware #satisfiability
- A practical reconfigurable hardware accelerator for Boolean satisfiability solvers (JDD, ZT, FY, LZ), pp. 780–785.
- DAC-2008-GulatiK #fault #simulation #towards #using
- Towards acceleration of fault simulation using graphics processing units (KG, SPK), pp. 822–827.
- DAC-2008-LuSHWX #effectiveness #multi #optimisation
- Customizing computation accelerators for extensible multi-issue processors with effective optimization techniques (YSL, LS, LH, ZW, NX), pp. 197–200.
- DAC-2008-SavolainenR #design #interface #mobile #performance #standard
- Standard interfaces in mobile terminals: increasing the efficiency of device design and accelerating innovation (RS, TR), p. 592.
- DATE-2008-BeckRGC #configuration management #embedded
- Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications (ACSB, MBR, GG, LC), pp. 1208–1213.
- DATE-2008-ThoguluvaRC #architecture #performance #programmable #security #using
- Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor (JT, AR, STC), pp. 1148–1153.
- TACAS-2008-CaniartFLZ #model checking
- Accelerating Interpolation-Based Model-Checking (NC, EF, JL, MZ), pp. 428–442.
- DLT-2008-EsparzaKL #analysis #fixpoint
- Derivation Tree Analysis for Accelerated Fixed-Point Computation (JE, SK, ML), pp. 301–313.
- ICPR-2008-KiserSM #algorithm
- Accelerating active contour algorithms with the Gradient Diffusion Field (WK, PS, CM), pp. 1–4.
- ASPLOS-2008-BhargavaSSM #2d
- Accelerating two-dimensional page walks for virtualized systems (RB, BS, FS, SM), pp. 26–35.
- HPCA-2008-VenkataramaniDSP #named #programmable
- FlexiTaint: A programmable accelerator for dynamic taint propagation (GV, ID, YS, MP), pp. 173–184.
- HPDC-2008-Al-KiswanyGSYR #distributed #named
- StoreGPU: exploiting graphics processing units to accelerate distributed storage systems (SAK, AG, ESN, GY, MR), pp. 165–174.
- SAT-2008-DavisTYZ #design #hardware #performance #satisfiability
- Designing an Efficient Hardware Implication Accelerator for SAT Solving (JDD, ZT, FY, LZ), pp. 48–62.
- DAC-2007-DongL #performance #simulation #using
- Accelerating Harmonic Balance Simulation Using Efficient Parallelizable Hierarchical Preconditioning (WD, PL), pp. 436–439.
- DAC-2007-GhodratLR #analysis #estimation #hybrid #using
- Accelerating System-on-Chip Power Analysis Using Hybrid Power Estimation (MAG, KL, AR), pp. 883–886.
- DATE-2007-ClausZMS #configuration management #hardware #using #video
- Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system (CC, JZ, FHM, WS), pp. 498–503.
- DATE-2007-SirowyWLV #clustering
- Two-level microprocessor-accelerator partitioning (SS, YW, SL, FV), pp. 313–318.
- DATE-2007-YeungTB #framework #interactive #interface #multi #novel
- Interactive presentation: Novel test infrastructure and methodology used for accelerated bring-up and in-system characterization of the multi-gigahertz interfaces on the cell processor (PY, AT, PB), pp. 725–730.
- SAS-2007-LerouxS #analysis #data flow
- Accelerated Data-Flow Analysis (JL, GS), pp. 184–199.
- CIAA-2007-KleinB07a
- Accelerating Boyer Moore Searches on Binary Texts (STK, MBN), pp. 130–143.
- CHI-2007-GrossmanDB #learning #online
- Strategies for accelerating on-line learning of hotkeys (TG, PD, RB), pp. 1591–1600.
- HCI-IPT-2007-HeBPC #mobile
- Accelerated Rendering of Vector Graphics on Mobile Devices (GH, BB, ZP, XC), pp. 298–305.
- SAC-2007-ChenL #hardware
- Use of hardware Z-buffered rasterization to accelerate ray tracing (CCC, DSML), pp. 1046–1050.
- CGO-2007-HormatiCM
- Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping (AH, NC, SAM), pp. 341–353.
- HPCA-2007-ZhangTC #adaptation #thread
- Accelerating and Adapting Precomputation Threads for Effcient Prefetching (WZ, DMT, BC), pp. 85–95.
- CAV-2007-AlfaroF #algorithm #game studies
- An Accelerated Algorithm for 3-Color Parity Games with an Application to Timed Games (LdA, MF), pp. 108–120.
- CAV-2007-JonssonS #model checking
- Systematic Acceleration in Regular Model Checking (BJ, MS), pp. 131–144.
- DATE-DF-2006-RaabeHAZ #detection #prototype
- Space-efficient FPGA-accelerated collision detection for virtual prototyping (AR, SH, JKA, GZ), pp. 206–211.
- SIGMOD-2006-LeeLWZX #data access #mobile
- CS cache engine: data access accelerator for location-based service in mobile environments (KCKL, WCL, JW, BZ, JX), pp. 787–789.
- VLDB-2006-LeglerLR #data mining #mining
- Data Mining with the SAP Netweaver BI Accelerator (TL, WL, AR), pp. 1059–1068.
- VLDB-2006-ShivamBC #cost analysis #learning #modelling #optimisation
- Active and Accelerated Learning of Cost Models for Optimizing Scientific Applications (PS, SB, JSC), pp. 535–546.
- SAS-2006-GonnordH #analysis #linear
- Combining Widening and Acceleration in Linear Relation Analysis (LG, NH), pp. 144–160.
- ICML-2006-VishwanathanSSM #probability #random
- Accelerated training of conditional random fields with stochastic gradient methods (SVNV, NNS, MWS, KPM), pp. 969–976.
- ICPR-v2-2006-SungZL #learning #scalability #set
- Accelerating the SVM Learning for Very Large Data Sets (ES, YZ, XL), pp. 484–489.
- ICPR-v2-2006-YangN #recognition #scalability #set
- Layered Search Spaces for Accelerating Large Set Character Recognition (YY, MN), pp. 1006–1009.
- ICPR-v3-2006-MinM #gpu
- Tensor Voting Accelerated by Graphics Processing Units (GPU) (CM, GGM), pp. 1103–1106.
- ICPR-v3-2006-VidholmSN #3d
- Accelerating the Computation of 3D Gradient Vector Flow Fields (EV, PS, IN), pp. 677–680.
- SAC-2006-FengQWZ #mining #query #xml
- Exploit sequencing to accelerate hot XML query pattern mining (JF, QQ, JW, LZ), pp. 517–524.
- ASPLOS-2006-TarditiPO #named #parallel #using
- Accelerator: using data parallelism to program GPUs for general-purpose uses (DT, SP, JO), pp. 325–335.
- HPCA-2006-PenryFHWSAC #parallel #simulation
- Exploiting parallelism and structure to accelerate the simulation of chip multi-processors (DAP, DF, DH, RW, GS, DIA, DC), pp. 29–40.
- CAV-2006-BoigelotH #hybrid #power of
- The Power of Hybrid Acceleration (BB, FH), pp. 438–451.
- DATE-2005-CoburnRR #estimation #hardware
- Hardware Accelerated Power Estimation (JC, SR, AR), pp. 528–529.
- DATE-2005-FahmyCL #detection #hardware #markov
- Hardware Acceleration of Hidden Markov Model Decoding for Person Detection (SAF, PYKC, WL), pp. 8–13.
- DATE-2005-GoossensDGPRR #design #network #performance #verification
- A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification (KG, JD, OPG, SGP, AR, ER), pp. 1182–1187.
- DATE-2005-RaabeBAZ #architecture #detection #hardware #simulation
- Hardware Accelerated Collision Detection — An Architecture and Simulation Results (AR, BB, JKA, GZ), pp. 130–135.
- DATE-2005-SchnerrBR #agile #prototype #simulation
- Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs (JS, OB, WR), pp. 792–797.
- DATE-2005-StecheleCHS #information management #visual notation
- A Coprocessor for Accelerating Visual Information Processing (WS, LAC, SH, JLS), pp. 26–31.
- MSR-2005-OhiraOOM #collaboration #network #social #using
- Accelerating cross-project knowledge collaboration using collaborative filtering and social networks (MO, NO, TO, KiM), pp. 71–75.
- CHI-2005-GnanayuthamBC #interface #paradigm #personalisation
- Discrete acceleration and personalised tiling as brain?body interface paradigms for neurorehabilitation (PG, CB, GC), pp. 261–270.
- SEKE-2005-HongCC #fuzzy #learning #performance
- Learning Efficiency Improvement of Fuzzy CMAC by Aitken Acceleration Method (CMH, CMC, HYC), pp. 556–595.
- SAC-2005-BuenoTT #algorithm #approximate #query #search-based #similarity #using
- Accelerating approximate similarity queries using genetic algorithms (RB, AJMT, CTJ), pp. 617–622.
- DAC-2004-KimYKK #functional #hardware #performance #simulation
- Communication-efficient hardware acceleration for fast functional simulation (YIK, WSY, YSK, CMK), pp. 293–298.
- DATE-v1-2004-HounsellT #embedded #synthesis
- Co-Processor Synthesis: A New Methodology for Embedded Software Acceleration (BIH, RT), pp. 682–683.
- DATE-v2-2004-CrisuCVL #development #embedded #framework #named
- GRAAL — A Development Framework for Embedded Graphics Accelerators (DC, SC, SV, PL), pp. 1366–1367.
- DATE-2005-GalanisMTSG04 #clustering #configuration management #hybrid
- A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms (MDG, AM, GT, DS, CEG), pp. 247–252.
- VLDB-2004-BandiSAA #case study #database #hardware
- Hardware Acceleration in Commercial Databases: A Case Study of Spatial Operations (NB, CS, AEA, DA), pp. 1021–1032.
- TACAS-2004-BardinFL #automaton #performance
- FASTer Acceleration of Counter Automata in Practice (SB, AF, JL), pp. 576–590.
- ICPR-v2-2004-KimuraKK #image #multi #retrieval #similarity #using
- Acceleration of Similarity-Based Partial Image Retrieval using Multistage Vector Quantization (AK, TK, KK), pp. 993–996.
- SPLC-2004-Geppert #development #how #product line #question #testing
- How Can Testing Keep Pace with Accelerated Development in Software Product Line Engineering? (CWK, BG), pp. 308–309.
- DAC-2003-HenftlingZBZE #architecture
- Re-use-centric architecture for a fully accelerated testbench environment (RH, AZ, MB, MZ, WE), pp. 372–375.
- DAC-2003-HwangLSSFYHV #design #embedded
- Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system (DDH, BCL, PS, KS, YF, SY, AH, IV), pp. 60–65.
- ICDAR-2003-YangVN #recognition #scalability #set #using
- Accelerating Large Character Set Recognition using Pivots (YY, OV, MN), pp. 262–267.
- SIGMOD-2003-SunAA #hardware
- Hardware Acceleration for Spatial Selections and Joins (CS, DA, AEA), pp. 455–466.
- VLDB-2003-LiPHCAAT #scalability #web
- CachePortal II: Acceleration of Very Large Scale Data Center-Hosted Database-driven Web Applications (WSL, OP, WPH, KSC, DA, YA, KT), pp. 1109–1112.
- CSEET-2003-Mason #development #process #re-engineering
- Aligning Workforce Development & Software Process Improvement Strategy for Accelerated Adoption of Software Engineering Capability (JM), pp. 70–77.
- ICML-2003-Elkan #difference #using
- Using the Triangle Inequality to Accelerate k-Means (CE), pp. 147–153.
- ICML-2003-MooreW #learning #network
- Optimal Reinsertion: A New Search Operator for Accelerated and More Accurate Bayesian Network Structure Learning (AWM, WKW), pp. 552–559.
- CAV-2003-BardinFLP #named #performance
- FAST: Fast Acceleration of Symbolikc Transition Systems (SB, AF, JL, LP), pp. 118–121.
- CAV-2003-BoigelotHJ #automaton #hybrid #using
- Hybrid Acceleration Using Real Vector Automata (Extended Abstract) (BB, FH, SJ), pp. 193–205.
- DAC-2002-CadambiMA #functional #hardware #performance #scalability #simulation
- A fast, inexpensive and scalable hardware acceleration technique for functional simulation (SC, CM, PA), pp. 570–575.
- DAC-2002-MemikM #flexibility #network
- A flexible accelerator for layer 7 networking applications (GM, WHMS), pp. 646–651.
- SIGMOD-2002-DattaDTVSR #approach #implementation #web
- Proxy-based acceleration of dynamically generated content on the world wide web: an approach and implementation (AD, KD, HMT, DEV, S, KR), pp. 97–108.
- SIGMOD-2002-Grust #xpath
- Accelerating XPath location steps (TG), pp. 109–120.
- VLDB-2002-LiHKSPAC #web
- Issues and Evaluations of Caching Solutions for Web Application Acceleration (WSL, WPH, DVK, RS, OP, DA, KSC), pp. 1019–1030.
- ICPR-v2-2002-LiWZ #algorithm #network
- Step Acceleration Based Training Algorithm for Feedforward Neural Networks (YL, KW, DZ), pp. 84–87.
- ICSE-2002-AugustinBS #collaboration #development
- Accelerating software development through collaboration (LA, DB, GS), pp. 559–563.
- SAT-2002-MonassonC #algorithm #analysis #exponential #random #satisfiability #scalability
- Restart method and exponential acceleration of random 3-SAT instances resolutions: A large deviation analysis of the Davis-Putnam-Loveland-Logemann algorithm (RM, SC), p. 11.
- DATE-2001-StaaBHPMKH #data transformation #design
- Data management: limiter or accelerator for electronic design creativity (PvS, RB, HH, BP, JM, WK, WH), pp. 162–163.
- VLDB-2001-DattaDTVRF #case study #comparative #web
- A Comparative Study of Alternative Middle Tier Caching Solutions to Support Dynamic Web Content Acceleration (AD, KD, HMT, DEV, KR, DF), pp. 667–670.
- VLDB-2001-LiCHPALHAY #e-commerce #web
- Cache Portal: Technology for Accelerating Database-driven e-commerce Web Sites (WSL, KSC, WPH, OP, DA, QL, WKWH, YA, CY), pp. 699–700.
- ICEIS-v2-2001-LeriasLMMTT #towards
- Towards E-Management as Enabler for Accelerated Change (HL, JL, PM, AM, ICT, JPT), pp. 807–814.
- ICPR-v3-2000-GarciaV #geometry #image
- Acceleration of Thresholding and Labeling Operations through Geometric Processing of Gray-Level Images (MAG, BXV), pp. 3429–3432.
- CAV-2000-PnueliS #liveness #verification
- Liveness and Acceleration in Parameterized Verification (AP, ES), pp. 328–343.
- DATE-1999-MeinelS #model checking #order #performance
- Increasing Efficiency of Symbolic Model Checking by Accelerating Dynamic Variable Reordering (CM, CS), pp. 760–761.
- ICDAR-1999-TangSMRTC #2d #algorithm #composition
- Accelerating the 2-D Mallat Decomposition Algorithm with Cyclical Convolution and FNTT (YYT, QS, HM, DBR, YT, ZKC), pp. 87–90.
- HCI-EI-1999-TakahashiKMFK #adaptation #design #interface
- Design of Interface for Operational Support of an Experimental Accelerator with adaptability to User Preference and Skill Level (MT, YK, SM, MF, MK), pp. 251–255.
- ICML-1999-Meila #algorithm
- An Accelerated Chow and Liu Algorithm: Fitting Tree Distributions to High-Dimensional Sparse Data (MM), pp. 249–257.
- KDD-1999-PellegM #algorithm #geometry #reasoning
- Accelerating Exact k-means Algorithms with Geometric Reasoning (DP, AWM), pp. 277–281.
- DAC-1998-ZhongAMM #case study #configuration management #problem #satisfiability #using
- Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability (PZ, PA, SM, MM), pp. 194–199.
- STOC-1998-MourrainP #equation #multi #polynomial
- Asymptotic Acceleration of Solving Multivariate Polynomial Systems of Equations (BM, VYP), pp. 488–496.
- LOPSTR-1998-BaalenR #deduction #synthesis #using
- Using Decision Procedures to Accelerate Domain-Specific Deductive Synthesis Systems (JVB, SR), pp. 61–70.
- ASPLOS-1998-CitronFR #implementation #multi
- Accelerating Multi-Media Processing by Implementing Memoing in Multiplication and Division Units (DC, DGF, LR), pp. 252–261.
- EDTC-1997-ShojiHSKN #behaviour #simulation
- Acceleration of behavioral simulation on simulation specific machines (MS, FH, SS, SK, HN), pp. 373–377.
- HCI-CC-1997-MurakiNSO #information management
- Information Sharing Accelerated by Work History Based Contribution Management, Leads to Knowhow Sharing (KM, NN, KS, NO), pp. 81–84.
- DAC-1996-TauschW #multi
- Multipole Accelerated Capacitance Calculation for Structures with Multiple Dielectrics with high Permittivity Ratios (JT, JKW), pp. 367–370.
- ICPR-1996-FerrariBG #array #classification
- A VLSI array processor accelerator for k-NN classification (AF, MB, RG), pp. 723–727.
- DAC-1995-KassabMRT #architecture #fault #functional #simulation
- Software Accelerated Functional Fault Simulation for Data-Path Architectures (MK, NM, JR, JT), pp. 333–338.
- DAC-1995-SilburtPBNDW #behaviour #concurrent #design #hardware #modelling #simulation
- Accelerating Concurrent Hardware Design with Behavioural Modelling and System Simulation (AS, IP, JB, SN, MD, GW), pp. 528–533.
- KDD-1995-Thiesson #network #quantifier #semistructured data
- Accelerated Quantification of Bayesian Networks with Incomplete Data (BT), pp. 306–311.
- DAC-1994-HenftlingWA #fault #simulation
- Path Hashing to Accelerate Delay Fault Simulation (MH, HCW, KA), pp. 522–526.
- EDAC-1994-VermeirenSE #fault #simulation
- A Suggestion for Accelerating the Analog Fault Simulation (WV, BS, GE), p. 662.
- VLDB-1994-AnandBH #database #empirical #performance #scalability
- An Empirical Performance Study of the Ingres Search Accelerator for a Large Property Management Database System (SSA, DAB, JGH), pp. 676–685.
- STOC-1994-VavasisY
- An accelerated interior point method whose running time depends only on A (extended abstract) (SAV, YY), pp. 512–521.
- ICML-1994-Mataric #learning
- Reward Functions for Accelerated Learning (MJM), pp. 181–189.
- DAC-1993-KamonTW #3d #multi #named
- FastHenry: A Multipole-Accelerated 3-D Inductance Extraction Program (MK, MJT, JW), pp. 678–683.
- KBSE-1993-DrummondHI #automation
- Accelerating Browsing By Automatically Inferring A User’s Search Goal (CD, RH, DI), p. 23.
- HCI-SHI-1993-Nakamura93a #problem #tool support
- Problem Solving Support System as Thinking Acceleration Tools (TN), pp. 297–302.
- DAC-1992-NaborsW #3d #algorithm #multi
- Multipole-Accelerated 3-D Capacitance Extraction Algorithms for Structures with Conformal Dielectrics (KN, JW), pp. 710–715.
- DAC-1991-JainB #hardware #simulation
- Mapping Switch-Level Simulation onto Gate-Level Hardware Accelerators (AJ, REB), pp. 219–222.
- DAC-1991-Jones91a #simulation
- Accelerating Switch-Level Simulation by Function Caching (LGJ), pp. 211–214.
- ICALP-1990-Wiedermann #metric #normalisation #problem #ram
- Normalizing and Accelerating RAM Computations and the Problem of Reasonable Space Measures (JW), pp. 125–138.
- DAC-1989-BhatN #architecture
- Special Purpose Architecture for Accelerating Bitmap DRC (NBB, SKN), pp. 674–677.
- ML-1989-NumaoS #learning #similarity
- Explanation-Based Acceleration of Similarity-Based Learning (MN, MS), pp. 58–60.
- DAC-1988-Lewis #hardware #programmable #simulation
- A Programmable Hardware Accelerator for Compiled Electrical Simulation (DML), pp. 172–177.
- DAC-1988-MaoC #algorithm #generative #metric #named #self #testing #using
- Dytest: A Self-Learning Algorithm Using Dynamic Testability Measures to Accelerate Test Generation (WM, MDC), pp. 591–596.
- DAC-1987-AgrawalDEFJK #architecture #design #hardware
- Architecture and Design of the MARS Hardware Accelerator (PA, WJD, AKE, WCF, HVJ, ASK), pp. 101–107.
- DAC-1987-Forbes #heuristic
- Heuristic Acceleration of Force-Directed Placement (RF), pp. 735–740.
- DAC-1987-SchultzB #fault #simulation
- Accelerated Transition Fault Simulation (MHS, FB), pp. 237–243.
- DAC-1987-VladimirescuWKBKDNJL #hardware #simulation
- A Vector Hardware Accelerator with Circuit Simulation Emphasis (AV, DW, MK, ZB, AK, KD, KCN, NJ, SL), pp. 89–94.
- DAC-1987-WonSE #hardware
- A Hardware Accelerator for Maze Routing (YW, SS, YMEZ), pp. 800–806.
- STOC-1986-ColeV #algorithm #design #metaprogramming #parallel
- Deterministic coin tossing and accelerating cascades: micro and macro techniques for designing parallel algorithms (RC, UV), pp. 206–219.
- OOPSLA-1986-MillerCLV
- The Application Accelerator Illustration System (MSM, HC, CL, SRV), pp. 294–302.
- DAC-1985-HefferanSBN
- The STE-264 accelerated electronic CAD system (PMH, RJSI, VB, DLN), pp. 352–358.
- DAC-1985-SpiraH #array #hardware #layout
- Hardware acceleration of gate array layout (PMS, CH), pp. 359–366.
- DAC-1984-Banin #automation #design #hardware
- Hardware accelerators in the design automation environment (RB), p. 648.