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Travelled to:
1 × USA
Collaborated with:
N.Bagherzadeh J.Yang C.Chun C.Wang W.Hu C.F.Fajardo Z.Fang R.Iyer G.F.Garcia L.Zhao
Talks about:
platform (2) network (2) chip (2) architecurt (1) architectur (1) processor (1) parallel (1) handheld (1) integr (1) effici (1)

Person: Seung Eun Lee

DBLP DBLP: Lee:Seung_Eun

Contributed to:

DAC 20112011
PDP 20112011
PDP 20102010

Wrote 3 papers:

DAC-2011-FajardoFIGLZ #architecture #effectiveness #embedded #named #platform
Buffer-integrated-Cache: a cost-effective SRAM architecture for handheld and embedded platforms (CFF, ZF, RI, GFG, SEL, LZ), pp. 966–971.
PDP-2011-YangCBL #framework #multi
Load Balancing for Data-Parallel Applications on Network-on-Chip Enabled Multi-processor Platform (JY, CC, NB, SEL), pp. 439–446.
PDP-2010-WangHLB #power management
Area and Power-efficient Innovative Network-on-Chip Architecurte (CW, WHH, SEL, NB), pp. 533–539.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.