Travelled to:1 × France
3 × Germany
Collaborated with:P.Manolios D.Vroon R.Kane
Talks about:verif (3) processor (2) refin (2) model (2) monolith (1) pipelin (1) collaps (1) automat (1) analysi (1) safeti (1)
Person: Sudarshan K. Srinivasan
DBLP: Srinivasan:Sudarshan_K=
Contributed to:
2007
200620052004Wrote 4 papers:
- CAV-2007-ManoliosSV #analysis #named
- BAT: The Bit-Level Analysis Tool (PM, SKS, DV), pp. 303–306.
- DATE-2006-KaneMS #pipes and filters #verification
- Monolithic verification of deep pipelines with collapsed flushing (RK, PM, SKS), pp. 1234–1239.
- DATE-2005-ManoliosS #modelling #performance #refinement #verification
- Refinement Maps for Efficient Verification of Processor Models (PM, SKS), pp. 1304–1309.
- DATE-v1-2004-ManoliosS #automation #liveness #modelling #safety #using #verification #web
- Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements (PM, SKS), pp. 168–175.