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Travelled to:
1 × Germany
1 × Japan
1 × USA
Collaborated with:
Q.Zhu R.Oishi T.Nakata T.Kato M.Kawakami T.Myojin H.Ogawa K.Hirono M.Tatsuoka R.Watanabe T.Otsuka R.Okamura X.Li T.Takabatake
Talks about:
design (2) synthesi (1) product (1) process (1) network (1) develop (1) switch (1) physic (1) integr (1) studi (1)

Person: Takashi Hasegawa

DBLP DBLP: Hasegawa:Takashi

Contributed to:

DAC 20152015
SPLC 20132013
DATE 20052005

Wrote 3 papers:

DAC-2015-TatsuokaWOHZOLT #design #synthesis
Physically aware high level synthesis design flow (MT, RW, TO, TH, QZ, RO, XL, TT), p. 6.
SPLC-2013-KatoKMOHH #case study #development #network
Case study of applying SPLE to development of network switch products (TK, MK, TM, HO, KH, TH), pp. 198–207.
DATE-2005-ZhuOHN #design #process #uml
Integrating UML into SoC Design Process (QZ, RO, TH, TN), pp. 836–837.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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