Travelled to:1 × France
1 × Germany
1 × USA
Collaborated with:S.Parameswaran R.G.Ragel M.Shafique J.A.Ambrose S.Rehman J.Henkel S.Radhakrishnan
Talks about:processor (3) resili (2) error (2) embed (2) checkpoint (1) recoveri (1) instruct (1) configur (1) spatial (1) softwar (1)
Person: Tuo Li
DBLP: Li:Tuo
Contributed to:
2013
20132012Wrote 3 papers:
- DAC-2013-LiSARHP #adaptation #embedded #fault #named #runtime
- RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors (TL, MS, JAA, SR, JH, SP), p. 7.
- DATE-2013-LiSRRRAHP #configuration management #named
- CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors (TL, MS, SR, SR, RGR, JAA, JH, SP), pp. 707–712.
- DATE-2012-LiRP #embedded #hardware #named
- Reli: Hardware/software Checkpoint and Recovery scheme for embedded processors (TL, RGR, SP), pp. 875–880.