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Travelled to:
2 × USA
Collaborated with:
R.L.Costello P.Sadayappan W.L.McKnight J.Ramanathan
Talks about:
uniform (1) support (1) process (1) problem (1) switch (1) requir (1) inform (1) design (1) simul (1) model (1)

Person: V. Ashok

DBLP DBLP: Ashok:V=

Contributed to:

DAC 19851985
DAC 19841984

Wrote 2 papers:

DAC-1985-AshokCS #data flow #modelling #simulation #using
Modeling switch-level simulation using data flow (VA, RLC, PS), pp. 637–644.
DAC-1984-AshokMR #design #problem #process
Uniform support for information handling and problem solving required by the VLSI design process (VA, WLM, JR), pp. 694–696.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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