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Travelled to:
1 × Denmark
1 × France
1 × Germany
3 × USA
Collaborated with:
J.R.Villarreal Z.Guo B.Buyukkurt F.Vahid L.Roh A.P.W.Böhm K.A.Vissers A.Gordon-Ross P.Viana E.Barros D.C.Suresh G.Stitt
Talks about:
hardwar (2) generat (2) compil (2) data (2) code (2) reconfigur (1) perspect (1) dataflow (1) configur (1) softwar (1)

Person: Walid A. Najjar

DBLP DBLP: Najjar:Walid_A=

Contributed to:

DAC 20132013
DATE 20072007
DATE 20052005
LCTES 20042004
LCTES 20032003
FPCA 19931993

Wrote 6 papers:

DAC-2013-NajjarV #compilation #perspective
FPGA code accelerators — the compiler perspective (WAN, JRV), p. 6.
DATE-2007-Gordon-RossVVNB #configuration management #energy #performance
A one-shot configurable-cache tuner for improved energy and performance (AGR, PV, FV, WAN, EB), pp. 755–760.
DATE-2005-GuoBNV #c #generative
Optimized Generation of Data-Path from C Codes for FPGAs (ZG, BB, WAN, KAV), pp. 112–117.
LCTES-2004-GuoBN #compilation #configuration management #hardware #reuse
Input data reuse in compiling window operations onto reconfigurable hardware (ZG, BB, WAN), pp. 249–256.
LCTES-2003-SureshNVVS #clustering #embedded #hardware #profiling #tool support
Profiling tools for hardware/software partitioning of embedded applications (DCS, WAN, FV, JRV, GS), pp. 189–198.
FPCA-1993-RohNB #clustering #data flow #evaluation #generative
Generation and Quantitative Evaluation of Dataflow Clusters (LR, WAN, APWB), pp. 159–168.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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