BibSLEIGH corpus
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Travelled to:
1 × Germany
2 × USA
3 × France
Collaborated with:
F.Vahid A.Jara-Berrocal P.Viana E.Barros A.Flynn A.D.George N.Dutt W.A.Najjar E.J.Keogh
Talks about:
cach (5) reconfigur (3) configur (3) tune (3) architectur (2) partial (2) system (2) embed (2) bitstream (1) parametr (1)

Person: Ann Gordon-Ross

DBLP DBLP: Gordon-Ross:Ann

Contributed to:

DATE 20102010
DATE 20092009
DAC 20072007
DATE 20072007
DAC 20062006
DATE v1 20042004

Wrote 7 papers:

DATE-2010-Jara-BerrocalG #architecture #configuration management #embedded #named
VAPRES: A Virtual Architecture for Partially Reconfigurable Embedded Systems (AJB, AGR), pp. 837–842.
DATE-2009-FlynnGG #configuration management
Bitstream relocation with local clock domains for partially reconfigurable FPGAs (AF, AGR, ADG), pp. 300–303.
DATE-2009-Jara-BerrocalG #architecture #communication #composition #configuration management #named #parametricity #scalability
SCORES: A scalable and parametric streams-based communication architecture for modular reconfigurable systems (AJB, AGR), pp. 268–273.
DAC-2007-Gordon-RossV #configuration management #self
A Self-Tuning Configurable Cache (AGR, FV), pp. 234–237.
DATE-2007-Gordon-RossVVNB #configuration management #energy #performance
A one-shot configurable-cache tuner for improved energy and performance (AGR, PV, FV, WAN, EB), pp. 755–760.
DAC-2006-VianaGKBV #configuration management #performance
Configurable cache subsetting for fast cache tuning (PV, AGR, EJK, EB, FV), pp. 695–700.
DATE-v1-2004-Gordon-RossVD #automation #embedded
Automatic Tuning of Two-Level Caches to Embedded Applications (AGR, FV, ND), pp. 208–213.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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