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Travelled to:
1 × France
3 × USA
Collaborated with:
S.Fang C.Chen J.Wang J.Fan S.Lee K.Chang S.Chen
Talks about:
waveform (2) problem (2) circuit (2) vlsi (2) time (2) rout (2) transient (1) constrain (1) multilay (1) consider (1)

Person: Wu-Shiung Feng

DBLP DBLP: Feng:Wu=Shiung

Contributed to:

DAC 19941994
DAC 19921992
DAC 19911991

Wrote 4 papers:

DAC-1994-ChenF #analysis #using
Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform Eelaxation (CJC, WSF), pp. 581–585.
An Accurate Time-Domain Current Waveform Simulator for VLSI Circuits (JHW, JTF, WSF), pp. 562–566.
DAC-1992-FangFL #approach #multi #performance #problem
A New Efficient Approach to Multilayer Channel Routing Problem (SCF, WSF, SLL), pp. 579–584.
DAC-1991-FangCFC #multi #problem
Constrained via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems (SCF, KEC, WSF, SJC), pp. 60–65.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.