Travelled to:1 × Germany
2 × France
Collaborated with:P.Schaumont Z.Chen A.Sinha M.Srivastav S.Huang D.Ganta M.B.Henry L.Nazhandali
Talks about:sha (2) implement (1) hierarchi (1) distribut (1) finalist (1) boundari (1) perform (1) control (1) analysi (1) acceler (1)
Person: Xu Guo
DBLP: Guo:Xu
Contributed to:
201220112009Wrote 3 papers:
- DATE-2012-GuoSHGHNS #implementation
- ASIC implementations of five SHA-3 finalists (XG, MS, SH, DG, MBH, LN, PS), pp. 1006–1011.
- DATE-2011-ChenGSS #analysis #performance
- Data-oriented performance analysis of SHA-3 candidates on FPGA accelerated computers (ZC, XG, AS, PS), pp. 1650–1655.
- DATE-2009-GuoS #bound #design #distributed #optimisation #using
- Optimizing the HW/SW boundary of an ECC SoC design using control hierarchy and distributed storage (XG, PS), pp. 454–459.