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Travelled to:
1 × France
2 × USA
Collaborated with:
K.Cheng A.Krstic M.Marek-Sadowska
Talks about:
perform (2) restructur (1) submicron (1) instantan (1) approxim (1) maximum (1) current (1) circuit (1) analysi (1) suppli (1)

Person: Yi-Min Jiang

DBLP DBLP: Jiang:Yi=Min

Contributed to:

DAC 19991999
DATE 19981998
DAC 19971997

Wrote 3 papers:

DAC-1999-JiangC #analysis #performance #power management
Analysis of Performance Impact Caused by Power Supply Noise in Deep Submicron Devices (YMJ, KTC), pp. 760–765.
DATE-1998-JiangC #approximate #estimation
Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits (YMJ, KTC), pp. 698–702.
DAC-1997-JiangKCM #logic #optimisation #performance
Post-Layout Logic Restructuring for Performance Optimization (YMJ, AK, KTC, MMS), pp. 662–665.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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