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Travelled to:
1 × USA
Collaborated with:
A.C.Parker
Talks about:
constraint (1) synthesi (1) multipl (1) design (1) level (1) high (1) chip (1) pin (1)

Person: Yung-Hua Hung

DBLP DBLP: Hung:Yung=Hua

Contributed to:

DAC 19921992

Wrote 1 papers:

DAC-1992-HungP #constraints #design #multi #synthesis
High-Level Synthesis with Pin Constraints for Multiple-Chip Designs (YHH, ACP), pp. 231–234.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.