BibSLEIGH
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Used together with:
devic (1)
layout (1)
generat (1)
compil (1)
high (1)

Stem hvdev$ (all stems)

1 papers:

DACDAC-1987-Elias #case study #compilation #generative #layout #re-engineering
A Case Study in Silicon Compilation Software Engineering, HVDEV High Voltage Device Layout Generator (NJE), pp. 82–88.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.