11 papers:
DATE-2007-RaoOK #fault tolerance #interactive #logic- Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs (WR, AO, RK), pp. 865–869.
DAC-2002-MoB- River PLAs: a regular circuit structure (FM, RKB), pp. 201–206.
- DATE-2002-TienTC
- Crosstalk Alleviation for Dynamic PLAs (TKT, TKT, SCC), pp. 683–687.
- DAC-1990-UpadhyayaT #case study
- BIST PLAs, Pass or Fail — A Case Study (SJU, JAT), pp. 724–727.
- DAC-1990-WeyDC #design
- Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement (CLW, JD, TYC), pp. 327–332.
- DAC-1988-WeyC #named
- PLAYGROUND: Minimization of PLAs with Mixed Ground True Outputs (CLW, TYC), pp. 421–426.
- DAC-1985-Hedlund #optimisation
- Electrical optimization of PLAs (KSH), pp. 681–687.
- DAC-1983-Chuquillanqui #problem #scalability
- Internal connection problem in large optimized PLAs (SC), pp. 795–802.
- DAC-1982-ChuquillanquiS #named #optimisation #scalability
- PAOLA: A tool for topological optimization of large PLAS (SC, TPS), pp. 300–306.
- DAC-1979-Ayres79a
- Silicon compilation-a hierarchical use of PLAs (RA), pp. 314–326.
- DAC-1978-Cha #testing
- A testing strategy for PLAs (CWC), pp. 326–334.
