BibSLEIGH
BibSLEIGH corpus
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Used together with:
ilp (2)
processor (2)
exploit (2)
workload (2)
awar (2)

Stem tlp$ (all stems)

6 papers:

DACDAC-2015-KhdrPSH #resource management
Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips (HK, SP, MS, JH), p. 6.
DATEDATE-2013-RutzigBC #configuration management #energy #framework #multi
A transparent and energy aware reconfigurable multiprocessor platform for simultaneous ILP and TLP exploitation (MBR, ACSB, LC), pp. 1559–1564.
HPCAHPCA-2012-LeeK #architecture #cpu #gpu #named #policy
TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture (JL, HK), pp. 91–102.
CCCC-2009-GaoLXN #concurrent #predict #recursion #source code #thread
Exploiting Speculative TLP in Recursive Programs by Dynamic Thread Prediction (LG, LL, JX, TFN), pp. 78–93.
HPCAHPCA-2003-RedstoneEL #named #smt #thread
Mini-Threads: Increasing TLP on Small-Scale SMT Processors (JR, SJE, HML), pp. 19–30.
HPCAHPCA-2001-CorbalEV #generative
DLP + TLP Processors for the Next Generation of Media Workloads (JC, RE, MV), pp. 219–228.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.