Circuit design challenges at the 14nm technology node
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James D. Warnock
Circuit design challenges at the 14nm technology node
DAC, 2011.

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@inproceedings{DAC-2011-Warnock,
	author        = "James D. Warnock",
	booktitle     = "{Proceedings of the 48th Design Automation Conference}",
	doi           = "10.1145/2024724.2024833",
	isbn          = "978-1-4503-0636-2",
	pages         = "464--467",
	publisher     = "{ACM}",
	title         = "{Circuit design challenges at the 14nm technology node}",
	year          = 2011,
}

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