BibSLEIGH — Proceedings of the 48th Design Automation Conference

Leon Stok, Nikil D. Dutt, Soha Hassoun
Proceedings of the 48th Design Automation Conference
DAC, 2011.

SYS

@proceedings{DAC-2011,
	acmid         = "2024724",
	address       = "San Diego, California, USA",
	editor        = "Leon Stok and Nikil D. Dutt and Soha Hassoun",
	isbn          = "978-1-4503-0636-2",
	publisher     = "{ACM}",
	title         = "{Proceedings of the 48th Design Automation Conference}",
	year          = 2011,
}

Contents (187 items)

DAC-2011-ZinnerNGSW #network: Application and realization of gateways between conventional automotive and IP/ethernet-based networks (HZ, JN, TG, JS, TW), pp. 1–6.
DAC-2011-LimVH #challenge #network #realtime: Challenges in a future IP/ethernet-based in-car network for real-time applications (HTL, LV, DH), pp. 7–12.
DAC-2011-RameshG #design #modelling #verification: Rigorous model-based design & verification flow for in-vehicle software (SR, AAG), pp. 13–16.
DAC-2011-QinWLSG #memory management #named #performance: MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems (ZQ, YW, DL, ZS, YG), pp. 17–22.
DAC-2011-ChangS #approach: Plugging versus logging: a new approach to write buffer management for solid-state disks (LPC, YCS), pp. 23–28.
DAC-2011-HsuCHKD #file system #reliability: A version-based strategy for reliability enhancement of flash file systems (PHH, YHC, PCH, TWK, DHCD), pp. 29–34.
DAC-2011-TsengGS #comprehension #memory management: Understanding the impact of power loss on flash memory (HWT, LMG, SS), pp. 35–40.
DAC-2011-WangXAP #classification #learning #policy #power management #using: Deriving a near-optimal power management policy using model-free reinforcement learning and Bayesian classification (YW, QX, ACA, MP), pp. 41–46.
DAC-2011-HsuLFWHHY #analysis #design #manycore #modelling #named: PowerDepot: integrating IP-based power modeling with ESL power analysis for multi-core SoC designs (CWH, JLL, SCF, CCW, SYH, WTH, JCY), pp. 47–52.
DAC-2011-ShinKCP #scalability: Dynamic voltage scaling of OLED displays (DS, YK, NC, MP), pp. 53–58.
DAC-2011-ParkYL #hybrid #in memory #memory management #power management: Power management of hybrid DRAM/PRAM-based main memory (HP, SY, SL), pp. 59–64.
DAC-2011-TamB #question: To DFM or not to DFM? (WCT, RD(B), pp. 65–70.
DAC-2011-ZhangDWT #composition #detection #self: Self-aligned double patterning decomposition for overlay minimization and hot spot detection (HZ, YD, MDFW, ROT), pp. 71–76.
DAC-2011-MirandaRBW #design #modelling #standard #statistics #using: Statistical characterization of standard cells using design of experiments with response surface modeling (MM, PR, LB, GIW), pp. 77–82.
DAC-2011-RyzhenkoB #geometry #layout #physics #synthesis: Physical synthesis onto a layout fabric with regular diffusion and polysilicon geometries (NR, SB), pp. 83–88.
DAC-2011-BailisRGBS #injection #named: Dimetrodon: processor-level preventive thermal management via idle cycle injection (PB, VJR, SG, DMB, MIS), pp. 89–94.
DAC-2011-GeQ #machine learning #multi #using: Dynamic thermal management for multimedia applications using machine learning (YG, QQ), pp. 95–100.
DAC-2011-NowrozWR #modelling #using: Improved post-silicon power modeling using AC lock-in techniques (ANN, GW, SR), pp. 101–106.
DAC-2011-KungHSS #optimisation: Thermal signature: a simple yet accurate thermal index for floorplan optimization (JK, IH, SSS, YS), pp. 108–113.
DAC-2011-DensmoreHKSAWV #biology #design #synthesis: Joint DAC/IWBDA special session design and synthesis of biological circuits (DD, MH, SK, XS, AA, EW, CV), pp. 114–115.
DAC-2011-ZhaiNS #adaptation #modelling #network #process #streaming: Modeling adaptive streaming applications with parameterized polyhedral process networks (JTZ, HN, TS), pp. 116–121.
DAC-2011-CheC #compilation #embedded #manycore #memory management #source code: Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming (WC, KSC), pp. 122–127.
DAC-2011-KimS #data access #memory management #named: CuMAPz: a tool to analyze memory access patterns in CUDA (YK, AS), pp. 128–133.
DAC-2011-IqbalSH #dependence #fault #monte carlo #named #power management #probability #scheduling: SEAL: soft error aware low power scheduling by Monte Carlo state space under the influence of stochastic spatial and temporal dependencies (NI, MAS, JH), pp. 134–139.
DAC-2011-ChangJC #functional: Simultaneous functional and timing ECO (HYC, IHRJ, YWC), pp. 140–145.
DAC-2011-TangWHH #incremental #logic #multi #synthesis: Interpolation-based incremental ECO synthesis for multi-error logic rectification (KFT, CAW, PKH, CY(H), pp. 146–151.
DAC-2011-LiLZ #multi #scheduling: Optimal multi-domain clock skew scheduling (LL, YL, HZ), pp. 152–157.
DAC-2011-LiuYX #low cost: Re-synthesis for cost-efficient circuit-level timing speculation (YL, FY, QX), pp. 158–163.
DAC-2011-HuangY #algorithm: An exact algorithm for the construction of rectilinear Steiner minimum trees among complex obstacles (TH, EFYY), pp. 164–169.
DAC-2011-Nieberg: Gridless pin access in detailed routing (TN), pp. 170–175.
DAC-2011-MaYW #algorithm: An optimal algorithm for layer assignment of bus escape routing on PCBs (QM, EFYY, MDFW), pp. 176–181.
DAC-2011-HsuSPCH #algorithm #distributed #geometry #layout: A distributed algorithm for layout geometry operations (KTH, SS, YCP, CC, TYH), pp. 182–187.
DAC-2011-JungMPL #3d #analysis #optimisation #reliability: TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC (MJ, JM, DZP, SKL), pp. 188–193.
DAC-2011-DyerMK #hybrid #modelling #process: Hybrid modeling of non-stationary process variations (ELD, MM, FK), pp. 194–199.
DAC-2011-DongL #performance #predict: Efficient SRAM failure rate prediction via Gibbs sampling (CD, XL), pp. 200–205.
DAC-2011-ChaiJ #complexity #equation #linear #matrix: Direct matrix solution of linear complexity for surface integral-equation based impedance extraction of high bandwidth interconnects (WC, DJ), pp. 206–211.
DAC-2011-BurnsCKPWS #3d #challenge #design: Design, CAD and technology challenges for future processors: 3D perspectives (JB, GC, EK, RP, JDW, MS), p. 212.
DAC-2011-BeyneMP #3d #development #integration: 3D heterogeneous system integration: application driver for 3D technology development (EB, PM, GVdP), p. 213.
DAC-2011-Borkar #3d #design #energy #integration #performance: 3D integration for energy efficient system design (SB), pp. 214–219.
DAC-2011-Topaloglu #3d #challenge #integration: Applications driving 3D integration and corresponding manufacturing challenges (ROT), pp. 220–223.
DAC-2011-HeRK #concept analysis #embedded #generative #testing: Test-case generation for embedded simulink via formal concept analysis (NH, PR, DK), pp. 224–229.
DAC-2011-BayrakRBSI #analysis #automation #towards: A first step towards automatic application of power analysis countermeasures (AGB, FR, PB, FXS, PI), pp. 230–235.
DAC-2011-SchmitzLEPA #evaluation #framework #named #performance #platform: TPM-SIM: a framework for performance evaluation of trusted platform modules (JS, JL, JE, DP, NBAG), pp. 236–241.
DAC-2011-PotkonjakMNW #architecture #difference: Differential public physically unclonable functions: architecture and applications (MP, SM, AN, SW), pp. 242–247.
DAC-2011-WeiP #security #using: Integrated circuit security techniques using variable supply voltage (SW, MP), pp. 248–253.
DAC-2011-ObergHITSK #data flow: Information flow isolation in I2C and USB (JO, WH, AI, MT, TS, RK), pp. 254–259.
DAC-2011-Saha #architecture #composition #named #reuse #scalability: CIRUS: a scalable modular architecture for reusable drivers (BS), pp. 260–261.
DAC-2011-Paulin #challenge #industrial #multi #perspective #programming: Programming challenges & solutions for multi-processor SoCs: an industrial perspective (PGP), pp. 262–267.
DAC-2011-ThieleSYB #analysis #embedded #multi #synthesis: Thermal-aware system analysis and software synthesis for embedded multi-processors (LT, LS, HY, IB), pp. 268–273.
DAC-2011-BuiLLPR #architecture #multi: Temporal isolation on multiprocessing architectures (DNB, EAL, IL, HDP, JR), pp. 274–279.
DAC-2011-Jandhyala #automation #design #network #social #tool support #web: Physics-based field-theoretic design automation tools for social networks and web search (VJ), pp. 280–281.
DAC-2011-GaillardonBMNCO #3d #architecture #question #towards: Can we go towards true 3-D architectures? (PEG, MHBJ, PHM, JPN, FC, IO), pp. 282–283.
DAC-2011-Fey #analysis #data flow #multi: Orchestrated multi-level information flow analysis to understand SoCs (GF), pp. 284–285.
DAC-2011-KinsmanN #configuration management #on the fly: Dynamic binary translation to a reconfigurable target for on-the-fly acceleration (PK, NN), pp. 286–287.
DAC-2011-MeguerdichianP: Device aging-based physically unclonable functions (SM, MP), pp. 288–289.
DAC-2011-KarakonstantisBATGR #platform: Significance driven computation on next-generation unreliable platforms (GK, NB, CDA, GT, VG, KR), pp. 290–291.
DAC-2011-AadithyaVDR #impact analysis #named #predict #probability #random: MUSTARD: a coupled, stochastic/deterministic, discrete/continuous technique for predicting the impact of random telegraph noise on SRAMs and DRAMs (KVA, SV, AD, JSR), pp. 292–297.
DAC-2011-GongYH #analysis #monte carlo #orthogonal #performance #probability: Fast non-monte-carlo transient noise analysis for high-precision analog/RF circuits by stochastic orthogonal polynomials (FG, HY, LH), pp. 298–303.
DAC-2011-MukherjeeFBL #automation #linear #scalability: Automatic stability checking for large linear analog integrated circuits (PM, GPF, RB, PL), pp. 304–309.
DAC-2011-HaoTSS #analysis #bound #performance #process: Performance bound analysis of analog circuits considering process variations (ZH, SXDT, RS, GS), pp. 310–315.
DAC-2011-Li #memory management: Rethinking memory redundancy: optimal bit cell repair for maximum-information storage (XL0), pp. 316–321.
DAC-2011-ZhengSXHBC #array #framework #platform #programmable: Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability (RZ, JS, CX, NH, BB, YC), pp. 322–327.
DAC-2011-Kocher #challenge #complexity: Complexity and the challenges of securing SoCs (PK), pp. 328–331.
DAC-2011-KrishnamurthyMS #encryption #energy: High-performance energy-efficient encryption in the sub-45nm CMOS Era (RK, SM, FS), p. 332.
DAC-2011-TorranceJ #reverse engineering #state of the art: The state-of-the-art in semiconductor reverse engineering (RT, DJ), pp. 333–338.
DAC-2011-WuWFT #distributed #manycore #scheduling #simulation: A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation (MHW, PCW, CYF, RST), pp. 339–344.
DAC-2011-YunKKH #embedded #manycore #parallel #simulation: Simulation environment configuration for parallel simulation of multicore embedded systems (DY, JK, SK, SH), pp. 345–350.
DAC-2011-CoptyKN #analysis #architecture #performance #statistics #transaction: Transaction level statistical analysis for efficient micro-architectural power and performance studies (EC, GK, SN), pp. 351–356.
DAC-2011-BroedersL #behaviour #modelling: Extracting behavior and dynamically generated hierarchy from SystemC models (HB, RvL), pp. 357–362.
DAC-2011-HuangQFQ #constraints #realtime #throughput: Throughput maximization for periodic real-time systems under the maximal temperature constraint (HH, GQ, JF, MQ), pp. 363–368.
DAC-2011-LifaEP #configuration management #detection #fault #optimisation #performance: Performance optimization of error detection based on speculative reconfiguration (AAL, PE, ZP), pp. 369–374.
DAC-2011-SchneiderGCBEP #on the #quantifier: On the quantification of sustainability and extensibility of FlexRay schedules (RS, DG, SC, UDB, PE, ZP), pp. 375–380.
DAC-2011-ZhaoAZ #embedded #energy #realtime: Generalized reliability-oriented energy management for real-time embedded applications (BZ, HA, DZ), pp. 381–386.
DAC-2011-HuangYX #multi #scheduling: Customer-aware task allocation and scheduling for multi-mode MPSoCs (LH, RY, QX), pp. 387–392.
DAC-2011-ReimannLGHT #constraints #realtime #string #synthesis: Symbolic system synthesis in the presence of stringent real-time constraints (FR, ML, MG, CH, JT), pp. 393–398.
DAC-2011-LiuDPC #approximate #composition #design #set: Supervised design space exploration by compositional approximation of Pareto sets (HYL, ID, MP, LPC), pp. 399–404.
DAC-2011-LiuZXL #clustering #hybrid #in memory #memory management #power management: Power-aware variable partitioning for DSPs with hybrid PRAM and DRAM main memory (TL, YZ, CJX, ML), pp. 405–410.
DAC-2011-PaulaNNOH #named: TAB-BackSpace: unlimited-length trace buffers with zero additional on-chip overhead (FMdP, AN, ZN, AO, AJH), pp. 411–416.
DAC-2011-ChungXZA #statistics #testing: Testability driven statistical path selection (JC, JX, VZ, JAA), pp. 417–422.
DAC-2011-ChenO #fault #statistics: Diagnosing scan clock delay faults through statistical timing pruning (MC, AO), pp. 423–428.
DAC-2011-Pomeranz #clustering #fault: Diagnosis of transition fault clusters (IP), pp. 429–434.
DAC-2011-KimG #reliability: Leakage-aware redundancy for reliable sub-threshold memories (SK, MRG), pp. 435–440.
DAC-2011-ZhouJBHS #library #standard: A 40 nm inverse-narrow-width-effect-aware sub-threshold standard cell library (JZ, SJ, BB, LH, JS), pp. 441–446.
DAC-2011-BanY #layout #modelling #optimisation: Layout aware line-edge roughness modeling and poly optimization for leakage minimization (YB, JSY), pp. 447–452.
DAC-2011-AbrishamiLQFP #optimisation #power management: Post sign-off leakage power optimization (HA, JL, JQ, JF, MP), pp. 453–458.
DAC-2011-Singh #challenge: Lithography at 14nm and beyond: choices and challenges (VS), p. 459.
DAC-2011-Hu #how #why: New sub-20nm transistors: why and how (CH), pp. 460–463.
DAC-2011-Warnock #challenge #design: Circuit design challenges at the 14nm technology node (JDW), pp. 464–467.
DAC-2011-KumarT #realtime: Cool shapers: shaping real-time tasks for improved thermal guarantees (PK, LT), pp. 468–473.
DAC-2011-DellingerGR #kernel #linux #multi #realtime: ChronOS Linux: a best-effort real-time multiprocessor Linux kernel (MD, PG, BR), pp. 474–479.
DAC-2011-KuoSR #analysis #performance #reachability #source code #using: Efficient WCRT analysis of synchronous programs using reachability (MMYK, RS, PSR), pp. 480–485.
DAC-2011-StattelmannBR #optimisation #performance #simulation: Fast and accurate source-level simulation of software timing considering complex code optimizations (SS, OB, WR), pp. 486–491.
DAC-2011-HolcombBS #performance #verification: Abstraction-based performance verification of NoCs (DEH, BAB, SAS), pp. 492–497.
DAC-2011-YounKH #analysis #convergence: Global convergence analysis of mixed-signal systems (SY, JK, MH), pp. 498–503.
DAC-2011-Mador-HaimAM #consistency #how #memory management #modelling #question #testing: Litmus tests for comparing memory consistency models: how long do they need to be? (SMH, RA, MMKM), pp. 504–509.
DAC-2011-NguyenWSK #abstraction #hardware: Formal hardware/software co-verification by interval property checking with abstraction (MDN, MW, DS, WK), pp. 510–515.
DAC-2011-HuG #distributed #grid #synthesis: Distributed Resonant clOCK grid Synthesis (ROCKS) (XH, MRG), pp. 516–521.
DAC-2011-JooK #fine-grained #named: WaveMin: a fine-grained clock buffer polarity assignment combined with buffer sizing (DJ, TK), pp. 522–527.
DAC-2011-LinLCHC #random: Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuits (CWL, JML, YCC, CPH, SJC), pp. 528–533.
DAC-2011-AarestadLPAA #process: Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect (JA, CL, JP, DA, KA), pp. 534–539.
DAC-2011-HochmanBW #empirical #reduction: A stabilized discrete empirical interpolation method for model reduction of electrical, thermal, and microelectromechanical systems (AH, BNB, JKW), pp. 540–545.
DAC-2011-YeLGY #framework #megamodelling #novel: A novel framework for passive macro-modeling (ZY, YL, MG, ZY), pp. 546–551.
DAC-2011-HsiaoD #bound #parallel #scalability: A highly scalable parallel boundary element method for capacitance extraction (YCH, LD), pp. 552–557.
DAC-2011-ZhaoF #3d #gpu #parallel #performance #platform: Fast multipole method on GPU: tackling 3-D capacitance extraction on massively parallel SIMD platforms (XZ, ZF), pp. 558–563.
DAC-2011-SingermanAB #transaction #validation: Transaction based pre-to-post silicon validation (ES, YA, SB), pp. 564–568.
DAC-2011-AdirNSZMS #validation #verification: Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor (AA, AN, GS, AZ, CM, JS), pp. 569–574.
DAC-2011-MillerBHDCB #analysis #testing #validation: A method to leverage pre-silicon collateral and analysis for post-silicon testing and validation (GM, BB, YCH, JD, XC, GB), pp. 575–578.
DAC-2011-YangBC #detection #embedded #energy #fault #using: Energy-efficient MIMO detection using unequal error protection for embedded joint decoding system (YSY, PB, GC), pp. 579–584.
DAC-2011-KesturIPANC #architecture #co-evolution #design #framework #re-engineering #using: An algorithm-architecture co-design framework for gridding reconstruction using FPGAs (SK, KMI, SP, AAM, VN, CC), pp. 585–590.
DAC-2011-ShoaibJV #algorithm #data-driven #energy #framework #monitoring #platform: A low-energy computation platform for data-driven biomedical monitoring algorithms (MS, NKJ, NV), pp. 591–596.
DAC-2011-KernZSNT #network: Accuracy of ethernet AVB time synchronization under varying temperature conditions for automotive networks (AK, HZ, TS, JN, JT), pp. 597–602.
DAC-2011-ChippaRRC #scalability #trade-off: Dynamic effort scaling: managing the quality-efficiency tradeoff (VKC, AR, KR, STC), pp. 603–608.
DAC-2011-HongSK #case study #estimation #performance #throughput: Emulation based high-accuracy throughput estimation for high-speed connectivities: case study of USB2.0 (BH, CS, DK), pp. 609–614.
DAC-2011-Stergiou #diagrams #network #order #permutation: Implicit permutation enumeration networks and binary decision diagrams reordering (SS), pp. 615–620.
DAC-2011-LinH #satisfiability #using: Using SAT-based Craig interpolation to enlarge clock gating functions (THL, CY(H), pp. 621–626.
DAC-2011-RahmanATS #library #physics #reduction #synthesis: Power reduction via separate synthesis and physical libraries (MR, RA, HT, CS), pp. 627–632.
DAC-2011-PuggelliWKS #logic #question #robust #synthesis #tool support: Are logic synthesis tools robust? (AP, TW, AK, ALSV), pp. 633–638.
DAC-2011-NandakumarM #3d #layout: Layout effects in fine grain 3D integrated regular microprocessor blocks (VSN, MMS), pp. 639–644.
DAC-2011-LungSHSC #3d #fault tolerance #network: Fault-tolerant 3D clock network (CLL, YSS, SHH, YS, SCC), pp. 645–651.
DAC-2011-LiuZYZ #3d #algorithm: An integrated algorithm for 3D-IC TSV assignment (XL, YZ, GKY, XZ), pp. 652–657.
DAC-2011-ShiSW #3d #design: Non-uniform micro-channel design for stacked 3D-ICs (BS, AS, PW), pp. 658–663.
DAC-2011-HsuCB #3d #design: TSV-aware analytical placement for 3D IC designs (MKH, YWC, VB), pp. 664–669.
DAC-2011-CongLS #3d: Thermal-aware cell and through-silicon-via co-placement for 3D ICs (JC, GL, YS), pp. 670–675.
DAC-2011-SunLT #analysis #approximate #grid #incremental #performance #power management: Efficient incremental analysis of on-chip power grid via sparse approximation (PS, XL, MYT), pp. 676–681.
DAC-2011-GhaniN #branch #grid #power management #using #verification: Power grid verification using node and branch dominance (NHAG, FNN), pp. 682–687.
DAC-2011-HaddadN #analysis #grid #power management #using: Power grid correction using sensitivity analysis under an RC model (PAH, FNN), pp. 688–693.
DAC-2011-VelamalaLTC #design #logic: Design sensitivity of single event transients in scaled logic circuits (JV, RL, MT, YC), pp. 694–699.
DAC-2011-ReviriegoMB #ad hoc #design #fault #memory management #reliability #sequence: Designing ad-hoc scrubbing sequences to improve memory reliability against soft errors (PR, JAM, SB), pp. 700–705.
DAC-2011-WangTW #metric #optimisation: In-field aging measurement and calibration for power-performance optimization (SW, MT, LW), pp. 706–711.
DAC-2011-SorgenfreiS #detection #using: Single-molecule electronic detection using nanoscale field-effect devices (SS, KLS), pp. 712–717.
DAC-2011-SternRVRCPFR: CMOS compatible nanowires for biosensing (ES, DAR, AV, NKR, JMC, JP, TMF, MR), pp. 718–722.
DAC-2011-SonkusaleD #integration: Heterogeneous integration of carbon nanotubes and graphene microassemblies for environmental and breath sensing (SRS, MRD), pp. 723–728.
DAC-2011-SaripalliMDN #energy #hybrid: An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores (VS, AKM, SD, VN), pp. 729–734.
DAC-2011-LiMCMS #modelling #network #performance #reliability #simulation: Device modeling and system simulation of nanophotonic on-chip networks for reliability, power and performance (ZL, MM, XC, ARM, LS), pp. 735–740.
DAC-2011-HuangSH #power management: Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips (TWH, HYS, TYH), pp. 741–746.
DAC-2011-UmetonSSLPN #design #robust: Design of robust metabolic pathways (RU, GS, AS, PL, AP, GN), pp. 747–752.
DAC-2011-ChenKCH #analysis #multi #reliability: Reliability analysis and improvement for multi-level non-volatile memories with soft information (SLC, BRK, JNC, CTH), pp. 753–758.
DAC-2011-ChangC #3d #array #image #metric #performance #quality #specification: Image quality aware metrics for performance specification of ADC array in 3D CMOS imagers (HMC, KT(C), pp. 759–764.
DAC-2011-YinKL #effectiveness: High effective-resolution built-in jitter characterization with quantization noise shaping (LY, YK, PL), pp. 765–770.
DAC-2011-LiLWCDCHCLHHMBWTWKHC #interface #low cost #testing: A low-cost wireless interface with no external antenna and crystal oscillator for cm-range contactless testing (CFL, CYL, CHW, SLC, LMD, CCC, HJH, MYC, JJL, SYH, PCH, HPM, JCB, CWW, CCT, CHW, YSK, CTH, TYC), pp. 771–776.
DAC-2011-OnaissiTLN #analysis #approach #performance: A fast approach for static timing analysis covering all PVT corners (SO, FT, JL, FNN), pp. 777–782.
DAC-2011-LiuSCKKL #3d #analysis #optimisation: Full-chip TSV-to-TSV coupling analysis and optimization in 3D IC (CL, TS, JC, JK, JK, SKL), pp. 783–788.
DAC-2011-BanLP #2d #composition #flexibility #framework #layout: Flexible 2D layout decomposition framework for spacer-type double pattering lithography (YB, KL, DZP), pp. 789–794.
DAC-2011-DingGYP #detection #learning #named: AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection (DD, JRG, KY, DZP), pp. 795–800.
DAC-2011-BardhanH #performance: A fast solver for nonlocal electrostatic theory in biomolecular science and engineering (JPB, AH), pp. 801–805.
DAC-2011-ToettcherCTW #analysis #constraints: Biochemical oscillator sensitivity analysis in the presence of conservation constraints (JET, AC, BT, JW), pp. 806–811.
DAC-2011-EisenbergAS: In silico synchronization of cellular populations through expression data deconvolution (ME, JNA, DSG), pp. 812–817.
DAC-2011-RajavelA #clustering #named: MO-pack: many-objective clustering for FPGA CAD (STR, AA), pp. 818–823.
DAC-2011-PatilBC #architecture #contract #synthesis: Enforcing architectural contracts in high-level synthesis (NAP, AB, DC), pp. 824–829.
DAC-2011-ChenM #configuration management #manycore: Shared reconfigurable fabric for multi-core customization (LC, TM), pp. 830–835.
DAC-2011-JiangRP: Synchronous sequential computation with molecular reactions (HJ, MDR, KKP), pp. 836–841.
DAC-2011-KadryMGAK #approach #challenge #design #effectiveness #verification: Facing the challenge of new design features: an effective verification approach (WK, RM, AG, EA, CAK), pp. 842–847.
DAC-2011-KatzRZS #architecture #behaviour #generative #learning #quality: Learning microarchitectural behaviors to improve stimuli generation quality (YK, MR, AZ, GS), pp. 848–853.
DAC-2011-MoffittSV #clustering #functional #robust #verification: Robust partitioning for hardware-accelerated functional verification (MDM, MAS, PGV), pp. 854–859.
DAC-2011-AdirGLNSSZ #concurrent #multi #named #thread: Threadmill: a post-silicon exerciser for multi-threaded processors (AA, MG, SL, AN, GS, VS, AZ), pp. 860–865.
DAC-2011-LeeJ #framework #modelling #named #process: CACTI-FinFET: an integrated delay and power modeling framework for FinFET-based caches under process variations (CYL, NKJ), pp. 866–871.
DAC-2011-HenrySN #embedded #power management: A case for NEMS-based functional-unit power gating of low-power embedded microprocessors (MBH, MS, LN), pp. 872–877.
DAC-2011-ChenEWDXN #array #automation #configuration management: Automated mapping for reconfigurable single-electron transistor arrays (YCC, SE, CYW, SD, YX, VN), pp. 878–883.
DAC-2011-ZukoskiYM #logic: Universal logic modules based on double-gate carbon nanotube transistors (AZ, XY, KM), pp. 884–889.
DAC-2011-AuerbachBCRS #hardware #object-oriented: Virtualization of heterogeneous machines hardware description in a synthesizable object-oriented language (JSA, DFB, PC, RMR, SS), pp. 890–894.
DAC-2011-Hazelwood #adaptation #embedded #runtime: Process-level virtualization for runtime adaptation of embedded software (KMH), pp. 895–900.
DAC-2011-Heiser #embedded #question #why: Virtualizing embedded systems: why bother? (GH), pp. 901–905.
DAC-2011-Vitek #embedded #java #realtime: Virtualizing real-time embedded systems with Java (JV), pp. 906–911.
DAC-2011-DeOrioABP #architecture #distributed #manycore #named: DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips (AD, KA, VB, LSP), pp. 912–917.
DAC-2011-TsaiZCH #bidirectional #fault tolerance #using: A fault-tolerant NoC scheme using bidirectional channel (WCT, DYZ, SJC, YHH), pp. 918–923.
DAC-2011-SharifiK #multi #process: Process variation-aware routing in NoC based multicores (AS, MTK), pp. 924–929.
DAC-2011-AisoposCP #fault #modelling: Enabling system-level modeling of variation-induced faults in networks-on-chips (KA, CHOC, LSP), pp. 930–935.
DAC-2011-KimKY #named #network #power management: FlexiBuffer: reducing leakage power in on-chip network routers (GK, JK, SY), pp. 936–941.
DAC-2011-WalterKCK #capacity #multi: Capacity optimized NoC for multi-mode SoC (IW, EK, IC, SK), pp. 942–947.
DAC-2011-WangMR #clustering #configuration management #energy #manycore #optimisation #realtime: Dynamic cache reconfiguration and partitioning for energy optimization in real-time multi-core systems (WW, PM, SR), pp. 948–953.
DAC-2011-KandemirYK #clustering #concurrent #parallel #thread: A helper thread based dynamic cache partitioning scheme for multithreaded applications (MTK, TY, EK), pp. 954–959.
DAC-2011-CongHLZ #memory management: A reuse-aware prefetching scheme for scratchpad memory (JC, HH, CL, YZ), pp. 960–965.
DAC-2011-FajardoFIGLZ #architecture #effectiveness #embedded #named #platform: Buffer-integrated-Cache: a cost-effective SRAM architecture for handheld and embedded platforms (CFF, ZF, RI, GFG, SEL, LZ), pp. 966–971.
DAC-2011-DongZHWL: Wear rate leveling: lifetime enhancement of PRAM with endurance variation (JD, LZ, YH, YW, XL), pp. 972–977.
DAC-2011-ChoiYLA #behaviour #fault #performance: Matching cache access behavior and bit error pattern for high performance low Vcc L1 cache (YGC, SY, SL, JHA), pp. 978–983.
DAC-2011-FuketaIYTNSS #logic: A closed-form expression for estimating minimum operating voltage (VDDmin) of CMOS logic gates (HF, SI, TY, MT, MN, HS, TS), pp. 984–989.
DAC-2011-SeokJCBS #design #energy #performance #pipes and filters: Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design (MS, DJ, CC, DB, DS), pp. 990–995.
DAC-2011-KoseF #algorithm #analysis #information retrieval #locality #performance: Fast algorithms for IR voltage drop analysis exploiting locality (SK, EGF), pp. 996–1001.
DAC-2011-XuLY #design #power management: Decoupling for power gating: sources of power noise and design strategies (TX, PL, BY), pp. 1002–1007.
DAC-2011-WhatmoughDBD #power management: Error-resilient low-power DSP via path-delay shaping (PNW, SD, DMB, ID), pp. 1008–1013.
DAC-2011-CevreroRSBIL #library #logic #power management #standard: Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library (AC, FR, MS, SB, PI, YL), pp. 1014–1019.
DAC-2011-ClemonsJPSA #embedded #feature model #named: EFFEX: an embedded processor for computer vision based feature extraction (JC, AJ, RP, SS, TMA), pp. 1020–1025.
DAC-2011-ZattSSABH #adaptation #energy #estimation #multi #runtime #video: Run-time adaptive energy-aware motion and disparity estimation in multiview video coding (BZ, MS, FS, LVA, SB, JH), pp. 1026–1031.
DAC-2011-JavaidSPH #adaptation #case study #multi #pipes and filters #power management #video: Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study (HJ, MS, SP, JH), pp. 1032–1037.
DAC-2011-NadeemBS #embedded #java #named: RJOP: a customized Java processor for reactive embedded systems (MN, MBA, ZS), pp. 1038–1043.
DAC-2011-ZhuDC #architecture #cpu #gpu #named: Hermes: an integrated CPU/GPU microarchitecture for IP routing (YZ, YD, YC), pp. 1044–1049.
DAC-2011-PatelACG #manycore #named: MARSS: a full system simulator for multicore x86 CPUs (AP, FA, SC, KG), pp. 1050–1055.

Leon Stok, Nikil D. Dutt, Soha HassounProceedings of the 48th Design Automation ConferenceDAC, 2011.

Contents (187 items)

Leon Stok, Nikil D. Dutt, Soha Hassoun
Proceedings of the 48th Design Automation Conference
DAC, 2011.