Design Space exploration of FPGA-based accelerators with multi-level parallelism
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Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang 0001, Tulika Mitra, Smaïl Niar
Design Space exploration of FPGA-based accelerators with multi-level parallelism
DATE, 2017.

DATE 2017
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@inproceedings{DATE-2017-ZhongPWLMN,
	author        = "Guanwen Zhong and Alok Prakash and Siqi Wang and Yun Liang 0001 and Tulika Mitra and Smaïl Niar",
	booktitle     = "{Proceedings of the 21st Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.23919/DATE.2017.7927161",
	isbn          = "978-3-9815370-8-6",
	pages         = "1141--1146",
	publisher     = "{IEEE}",
	title         = "{Design Space exploration of FPGA-based accelerators with multi-level parallelism}",
	year          = 2017,
}


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