Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
Efficient synthesis of approximate threshold logic circuits with an error rate guarantee
DATE, 2018.
@inproceedings{DATE-2018-LaiLWCW,
author = "Yung-An Lai and Chia-Chun Lin and Chia-Cheng Wu and Yung-Chih Chen and Chun-Yao Wang",
booktitle = "{Proceedings of the 22nd Conference and Exhibition on Design, Automation and Test in Europe}",
doi = "10.23919/DATE.2018.8342111",
isbn = "978-3-9819263-0-9",
pages = "773--778",
publisher = "{IEEE}",
title = "{Efficient synthesis of approximate threshold logic circuits with an error rate guarantee}",
year = 2018,
}