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Travelled to:
2 × USA
Collaborated with:
Z.Yu M.Yu K.Khoo
Talks about:
represent (2) carri (2) save (2) use (2) synthesi (1) synchron (1) circuit (1) signal (1) select (1) retim (1)

Person: Alan N. Willson Jr.

DBLP DBLP: Willson Jr.:Alan_N=

Contributed to:

DAC 20012001
DAC 20002000

Wrote 2 papers:

DAC-2001-YuYW #representation #synthesis #using
Signal Representation Guided Synthesis Using Carry-Save Adders For Synchronous Data-path Circuits (ZY, MLY, ANWJ), pp. 456–461.
DAC-2000-YuKW #representation #using
The use of carry-save representation in joint module selection and retiming (ZY, KYK, ANWJ), pp. 768–773.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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