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Travelled to:
1 × China
1 × Russia
1 × USA
Collaborated with:
M.Gu Y.Jiang H.Liu X.Song F.Wu J.Sun H.Zhang J.Sun Z.Li Y.Deng W.N.N.Hung X.Zhao C.Sun
Talks about:
system (6) embed (3) design (2) multi (2) model (2) clock (2) heterogen (1) techniqu (1) synthesi (1) synchron (1)

Person: Hehua Zhang

DBLP DBLP: Zhang:Hehua

Contributed to:

FSE 20142014
ESEC/FSE 20132013
SEKE 20132013
ASE 20162016

Wrote 5 papers:

FSE-2014-JiangZZZLSSGS #embedded #modelling #multi #named #synthesis #tool support #validation
Tsmart-GalsBlock: a toolkit for modeling, validation, and synthesis of multi-clocked embedded systems (YJ, HZ, HZ, XZ, HL, CS, XS, MG, JGS), pp. 711–714.
ESEC-FSE-2013-JiangLZDSGS #design #embedded #multi #optimisation #using
Design and optimization of multi-clocked embedded systems using formal technique (YJ, ZL, HZ, YD, XS, MG, JS), pp. 703–706.
ESEC-FSE-2013-JiangZLSHGS #analysis #reliability #runtime
System reliability calculation based on the run-time analysis of ladder program (YJ, HZ, HL, XS, WNNH, MG, JS), pp. 695–698.
SEKE-2013-WuZG #named #requirements
DOPROPC: a domain property pattern system helping to specify control system requirements (FW, HZ, MG), pp. 695–698.
ASE-2016-ZhangJLZGS #design #embedded #modelling
Model driven design of heterogeneous synchronous embedded systems (HZ, YJ, HL, HZ, MG, JGS), pp. 774–779.

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