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Travelled to:
1 × USA
Collaborated with:
S.Malik
Talks about:
synthesi (1) statist (1) design (1) model (1) logic (1) delay (1)

Person: Horng-Fei Jyu

DBLP DBLP: Jyu:Horng=Fei

Contributed to:

DAC 19941994

Wrote 1 papers:

DAC-1994-JyuM #design #logic #modelling #statistics #synthesis
Statistical Delay Modeling in Logic Design and Synthesis (HFJ, SM), pp. 126–130.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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