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Travelled to:
3 × USA
Collaborated with:
T.Y.Kuo J.Y.Lee S.H.Huang Y.L.Jeang C.T.Hwang Y.C.Hsu
Talks about:
circuit (3) fault (2) algorithm (1) synchron (1) sequenti (1) approach (1) schedul (1) control (1) analysi (1) robust (1)

Person: J. F. Wang

DBLP DBLP: Wang:J=_F=

Contributed to:

DAC 19931993
DAC 19901990
DAC 19891989

Wrote 3 papers:

DAC-1993-HuangJHHW #algorithm #scheduling
A Tree-Based Scheduling Algorithm for Control-Dominated Circuits (SHH, YLJ, CTH, YCH, JFW), pp. 578–582.
DAC-1990-KuoLW #analysis #fault
A Fault Analysis Method for Synchronous Sequential Circuits (TYK, JYL, JFW), pp. 732–735.
DAC-1989-WangKL #approach #fault #logic #robust #set
A New Approach to Derive Robust Sets for Stuck-open Faults in CMOS Combinational Logic Circuits (JFW, TYK, JYL), pp. 726–729.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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