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Travelled to:
1 × France
Collaborated with:
D.Ferrer R.González R.Fleitas R.Canetti
Talks about:
implement (1) programm (1) artifici (1) network (1) neural (1) neuro (1) logic (1) devic (1) fpga (1)

Person: Julio Pérez Acle

DBLP DBLP: Acle:Julio_P=eacute=rez

Contributed to:

DATE DF 20042004

Wrote 1 papers:

DATE-DF-2004-FerrerGFAC #implementation #logic #named #network #programmable
NeuroFPGA — Implementing Artificial Neural Networks on Programmable Logic Devices (DF, RG, RF, JPA, RC), pp. 218–223.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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