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programmable
Google programmable

Tag #programmable

160 papers:

POPLPOPL-2020-LewCSCM #probability #semantics
Trace types and denotational semantics for sound programmable inference in probabilistic languages (AKL, MFCT, BS, MC, VKM), p. 32.
ASPLOSASPLOS-2020-Ainsworth0 #hardware #parallel #security
The Guardian Council: Parallel Programmable Hardware Security (SA, TMJ0), pp. 1277–1293.
PLDIPLDI-2019-Cusumano-Towner #named #probability #programming
Gen: a general-purpose probabilistic programming system with programmable inference (MFCT, FAS, AKL, VKM), pp. 221–236.
ASPLOSASPLOS-2019-AnkitHCNFWFHS0M #machine learning #named
PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference (AA, IEH, SRC, GN, MF, RSW, PF, WmWH, JPS, KR0, DSM), pp. 715–731.
CASECASE-2019-TheisMD #logic #mining #process
Process Mining of Programmable Logic Controllers: Input/Output Event Logs (JT, IM, HD), pp. 216–221.
ICFP-2018-OmarA
Reasonably programmable literal notation (CO, JA), p. 32.
OOPSLAOOPSLA-2018-BostonGC #execution #fault tolerance #hardware #modelling #named #verification
Leto: verifying application-specific hardware fault tolerance with programmable execution models (BB, ZG, MC), p. 30.
PLDIPLDI-2018-MansinghkaSHRCR #probability #programming
Probabilistic programming with programmable inference (VKM, US, SH, AR, YC, MR), pp. 603–616.
ASPLOSASPLOS-2018-AchourR
Time Dilation and Contraction for Programmable Analog Devices with Jaunt (SA, MR), pp. 229–242.
ASPLOSASPLOS-2018-Ainsworth0
An Event-Triggered Programmable Prefetcher for Irregular Workloads (SA, TMJ0), pp. 578–592.
ESEC-FSEESEC-FSE-2017-GuoWW #execution #logic #symbolic computation
Symbolic execution of programmable logic controller code (SG, MW, CW0), pp. 326–336.
CASECASE-2017-MaP #framework #modelling #testing
A model-based testing framework with reduced set of test cases for programmable controllers (CM, JP), pp. 944–949.
PLDIPLDI-2016-AchourSR #synthesis
Configuration synthesis for programmable analog devices with Arco (SA, RS, MCR), pp. 177–193.
SASSAS-2016-NamjoshiS #named
Loopy: Programmable and Formally Verified Loop Transformations (KSN, NS), pp. 383–402.
GPCEGPCE-2016-OmarA #design #implementation #semantics
Programmable semantic fragments: the design and implementation of typy (CO, JA), pp. 81–92.
CASECASE-2016-MaP #approach #embedded #named #testing
DTT-MAT: A software toolbox on a design-to-test approach for testing of embedded programmable controllers (CM, JP), pp. 878–884.
SIGITESIGITE-2015-BradyWGAW #learning #low cost #smarttech
The CCL-Parallax Programmable Badge: Learning with Low-Cost, Communicative Wearable Computers (CEB, DW, KG, GA, UW), pp. 139–144.
SCAMSCAM-2015-DarizRS #analysis
A static microcode analysis tool for programmable load drivers (LD, MR, MS), pp. 265–270.
RTARTA-2015-CirsteaLM #encoding #term rewriting
A faithful encoding of programmable strategies into term rewriting systems (HC, SL, PEM), pp. 74–88.
ASPLOSASPLOS-2015-MaSSLYHXYCWZB #architecture #on-demand
Supporting Differentiated Services in Computers via Programmable Architecture for Resourcing-on-Demand (PARD) (JM, XS, NS, YL, ZY, BH, TX, ZY, YC, HW, LZ, YB), pp. 131–143.
CASECASE-2015-MaP #approach #black box #testing
Design-to-test approach for black-box testing of programmable controllers (CM, JP), pp. 1018–1024.
DATEDATE-2015-CalayirDWP #multi
Analog neuromorphic computing enabled by multi-gate programmable resistive devices (VC, MD, JAW, LP), pp. 928–931.
DATEDATE-2015-LeeSLKKL
DSP based programmable FHD HEVC decoder (SL, JS, WL, DHK, JK, SL), pp. 972–973.
HPCAHPCA-2015-MoreauWNSECO #approximate #named
SNNAP: Approximate computing on programmable SoCs via neural acceleration (TM, MW, JN, AS, HE, LC, MO), pp. 603–614.
DATEDATE-2014-BurgioDMCB #clustering #hardware #scalability
A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters (PB, RD, AM, PC, LB), pp. 1–4.
DATEDATE-2014-LiuSXL #injection #thread
Programmable decoder and shadow threads: Tolerate remote code injection exploits with diversified redundancy (ZL, WS, SX, ZL), pp. 1–6.
HPCAHPCA-2014-FytrakiVKFG #monitoring #named
FADE: A programmable filtering accelerator for instruction-grain monitoring (SF, EV, YOK, BF, BG), pp. 108–119.
HPDCHPDC-2014-ZhangJLGXI #in memory #memory management #named
TOP-PIM: throughput-oriented programmable processing in memory (DPZ, NJ, AL, JLG, LX, MI), pp. 85–98.
OSDIOSDI-2014-SeshadriGBBDJLS #named
Willow: A User-Programmable SSD (SS, MG, MSB, TB, AD, YJ, YL, SS), pp. 67–80.
WCREWCRE-2013-LeottaCRT #assessment #empirical #evolution #testing #web
Capture-replay vs. programmable web testing: An empirical assessment during test case evolution (ML, DC, FR, PT), pp. 272–281.
ESEC-FSEESEC-FSE-2013-Nenashev #automation #hardware #named #re-engineering
PHRT: a model and programmable tool for hardware reengineering automation (ON), pp. 719–722.
DACDAC-2013-CongX #fault
Defect tolerance in nanodevice-based programmable interconnects: utilization beyond avoidance (JC, BX), p. 8.
DACDAC-2013-GrissomB
A field-programmable pin-constrained digital microfluidic biochip (DG, PB), p. 9.
DATEDATE-2013-PiriouDRR #architecture #estimation #performance #reduction
A fast and accurate methodology for power estimation and reduction of programmable architectures (EP, RD, FR, SR), pp. 1054–1055.
ICSTSAT-2013-MihalT #approach #constraints #logic
A Constraint Satisfaction Approach for Programmable Logic Detailed Placement (AM, ST), pp. 208–223.
CIKMCIKM-2012-BaoKLRY #quality #tool support
Gumshoe quality toolkit: administering programmable search (ZB, BK, YL, SR, HY), pp. 2716–2718.
POPLPOPL-2012-Rexford #network #programming language
Programming languages for programmable networks (JR), pp. 215–216.
ASEASE-2012-BiallasBK #framework #logic #platform #verification
Arcade.PLC: a verification platform for programmable logic controllers (SB, JB, SK), pp. 338–341.
ICSEICSE-2012-LutzLLKHMS #requirements #self #verification
Engineering and verifying requirements for programmable self-assembling nanomachines (RRL, JHL, JIL, TK, EH, DM, DAS), pp. 1361–1364.
DATEDATE-2012-KesslerDTNRDBTP #aspect-oriented #manycore #performance
Programmability and performance portability aspects of heterogeneous multi-/manycore systems (CWK, UD, ST, RN, AR, UD, SB, JLT, SP), pp. 1403–1408.
PPoPPPPoPP-2012-StoneDS
Establishing a Miniapp as a programmability proxy (AS, JD, MS), pp. 333–334.
CHICHI-2011-LevesqueOMCMJCP #interactive
Enhancing physicality in touch interaction with programmable friction (VL, LO, KEM, AC, NDM, DJ, JEC, MAP), pp. 2481–2490.
OOPSLAOOPSLA-2011-JoshiGS #injection #multi #named
PREFAIL: a programmable tool for multiple-failure injection (PJ, HSG, KS), pp. 171–188.
CGOCGO-2011-Yi #automation #compilation #optimisation
Automated programmable control and parameterization of compiler optimizations (QY), pp. 97–106.
DACDAC-2011-ZhengSXHBC #array #framework #platform
Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability (RZ, JS, CX, NH, BB, YC), pp. 322–327.
DATEDATE-2011-LopezMBPGE #design #interface #process
Systematic design of a programmable low-noise CMOS neural interface for cell activity recording (CML, SM, CB, RP, GGEG, WE), pp. 818–823.
PLDIPLDI-2010-PrabhuRV #parallel
Safe programmable speculative parallelism (PP, GR, KV), pp. 50–61.
ASPLOSASPLOS-2010-WooL #gpu #named #using
COMPASS: a programmable data prefetcher using idle GPU shaders (DHW, HHSL), pp. 297–310.
DATEDATE-2010-FanucciPDSTCLT
An high voltage CMOS voltage regulator for automotive alternators with programmable functionalities and full reverse polarity capability (LF, GP, PD, RS, FT, PC, LL, PT), pp. 526–531.
DATEDATE-2010-VazquezCTST #safety
Programmable aging sensor for automotive safety-critical applications (JCV, VHC, ICT, MBS, JPT), pp. 618–621.
DACDAC-2009-HuangOSC
Programmable neural processing on a smartdust (SH, JO, YS, ACC), pp. 619–620.
DATEDATE-2009-AhmedERCST #performance #pipes and filters #reduction
Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor (SZA, JE, LR, JBC, GS, LT), pp. 184–189.
DATEDATE-2009-ZhengH #array #logic #satisfiability
Defect-aware logic mapping for nanowire-based programmable logic arrays via satisfiability (YZ, CH), pp. 1279–1283.
HPCAHPCA-2009-FanKDM
Bridging the computation gap between programmable processors and hardwired accelerators (KF, MK, GSD, SAM), pp. 313–322.
PDPPDP-2009-MathesSHF #logic #named #web #web service
SOAP4PLC: Web Services for Programmable Logic Controllers (MM, CS, SH, BF), pp. 210–219.
PPoPPPPoPP-2009-Dennis #how #manycore
How to build programmable multi-core chips (JBD), pp. 283–284.
SIGMODSIGMOD-2008-BlakeleyRKPHK #database #dot-net #sql
.NET database programmability and extensibility in microsoft SQL server (JAB, VR, IK, AP, MH, CK), pp. 1087–1098.
PLDIPLDI-2008-AminTVWJ #automation
Automatic volume management for programmable microfluidics (AMA, MT, TNV, SW, SCJ), pp. 56–67.
SACSAC-2008-ChengC #monitoring #named #thread
SoftMon: programmable software monitoring with minimum overhead by helper-threading (YPC, HSC), pp. 741–747.
ASPLOSASPLOS-2008-WeinsbergDABW #operating system
Tapping into the fountain of CPUs: on operating system support for programmable devices (YW, DD, TA, MBY, PW), pp. 179–188.
DACDAC-2008-BrockmanLKKM #array #design #memory management #multi #using
Design of a mask-programmable memory/multiplier array using G4-FET technology (JBB, SL, PMK, AK, MMM), pp. 337–338.
DACDAC-2008-JamaaALM #logic
Programmable logic circuits based on ambipolar CNFET (MHBJ, DA, YL, GDM), pp. 339–340.
DATEDATE-2008-DAscoliBMFRPVFM
A Programmable and Low-EMI Integrated Half-Bridge Driver in BCD Technology (FD, LB, MM, LF, GR, EP, FV, MF, MDM), pp. 879–884.
DATEDATE-2008-LiBXNPC #architecture #detection #optimisation #parallel
Optimizing Near-ML MIMO Detector for SDR Baseband on Parallel Programmable Architectures (ML, BB, WX, DN, LVdP, FC), pp. 444–449.
DATEDATE-2008-ThoguluvaRC #architecture #performance #security #using
Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor (JT, AR, STC), pp. 1148–1153.
HPCAHPCA-2008-VenkataramaniDSP #named
FlexiTaint: A programmable accelerator for dynamic taint propagation (GV, ID, YS, MP), pp. 173–184.
GPCEGPCE-2007-MaraninchiB #approach #component #embedded #modelling #named
42: programmable models of computation for a component-based approach to heterogeneous embedded systems (FM, TB), pp. 53–62.
DATEDATE-2007-KhanA #architecture #configuration management #implementation #pipes and filters #realtime
Pipelined implementation of a real time programmable encoder for low density parity check code on a reconfigurable instruction cell architecture (ZK, TA), pp. 349–354.
DATEDATE-2007-ManetMTCMGLAGLB #configuration management #hardware #interactive
Interactive presentation: RECOPS: reconfiguring programmable devices for military hardware electronics (PM, DM, LT, MDC, OM, YG, JDL, DA, CG, RL, VLB), pp. 994–999.
HPCAHPCA-2007-VenkataramaniRSP #debugging #memory management #monitoring #named #performance
MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging (GV, BR, YS, MP), pp. 273–284.
PDPPDP-2007-CilardoCMR #delivery #hardware #security #web #web service
Combining Programmable Hardware and Web Services Technologies for Delivering High-Performance and Interoperable Security (AC, LC, AM, LR), pp. 381–386.
PODSPODS-2006-GollapudiKS #clustering
Programmable clustering (SG, RK, DS), pp. 348–354.
DACDAC-2006-MrugalskiRT
Test response compactor with programmable selector (GM, JR, JT), pp. 1089–1094.
DATEDATE-2006-RobellySCF #architecture #design #energy #performance #trade-off
Energy efficiency vs. programmability trade-off: architectures and design principles (PR, HS, KCC, GF), pp. 587–592.
DATEDATE-DF-2006-MartinaMMVSV #approach
A new approach to compress the configuration information of programmable devices (MM, GM, AM, FV, LS, MV), pp. 48–51.
DATEDATE-DF-2006-YehWLW #multi
A 124.8Msps, 15.6mW field-programmable variable-length codec for multimedia applications (CY, CCW, LCL, JSW), pp. 239–243.
CASECASE-2005-AbdelhameedD #debugging #logic #network #source code
Diagnosis and debugging of programmable logic controller control programs by neural networks (MMA, HD), pp. 313–318.
CGOCGO-2005-VaswaniTS #hardware #profiling
A Programmable Hardware Path Profiler (KV, MJT, YNS), pp. 217–228.
DATEDATE-2005-HungBK #multi #symmetry
Symmetric Multiprocessing on Programmable Chips Made Easy (AH, WDB, AAK), pp. 240–245.
DATEDATE-2005-MannionHCV #network #synthesis
System Synthesis for Networks of Programmable Blocks (RM, HH, SC, FV), pp. 888–893.
HPCAHPCA-2005-WillmannKRP #interface #network #performance
An Efficient Programmable 10 Gigabit Ethernet Network Interface Card (PW, HyK, SR, VSP), pp. 96–107.
ITiCSEITiCSE-2004-JippingKKL #network #using
Investigating wired and wireless networks using a java-based programmable sniffer (MJJ, AJK, NK, KL), pp. 12–16.
AdaEuropeAdaEurope-2004-HiltonH #ada #logic
High-Integrity Interfacing to Programmable Logic with Ada (AJH, JGH), pp. 249–260.
PEPMPEPM-2004-HuMT #bidirectional #documentation #editing
A programmable editor for developing structured documents based on bidirectional transformations (ZH, SCM, MT), pp. 178–189.
ATEMATEM-2003-NaikB04 #analysis #framework #reverse engineering
A Programmable Analysis and Transformation Framework for Reverse Engineering (RN, AB), pp. 39–49.
DACDAC-2004-ShenoyKC #automation #design
Design automation for mask programmable fabrics (NVS, JK, RC), pp. 192–197.
DATEDATE-DF-2004-FerrerGFAC #implementation #logic #named #network
NeuroFPGA — Implementing Artificial Neural Networks on Programmable Logic Devices (DF, RG, RF, JPA, RC), pp. 218–223.
DATEDATE-v2-2004-HuangTL #fault tolerance
Fault Tolerance of Programmable Switch Blocks (JH, MBT, FL), pp. 1358–1359.
LCTESLCTES-2004-WillmannBP #architecture #interface #named #network
Spinach: a liberty-based simulator for programmable network interface architectures (PW, MB, VSP), pp. 20–29.
PDPPDP-2004-ArdaizN #deployment #framework #internet #named #network
Xweb: A Framework for Application Network Deployment in a Programmable Internet Service Infrastructure (OA, LN), p. 398–?.
ASEASE-2003-ConselR #domain-specific language #robust
A Programmable Client-Server Model: Robust Extensibility via DSLs (CC, LR), pp. 70–79.
DACDAC-2003-ChenRRD #scalability #self
A scalable software-based self-test methodology for programmable processors (LC, SR, AR, SD), pp. 548–553.
DACDAC-2003-KornarosPNZ #memory management #multi #optimisation #queue
A fully-programmable memory management system optimizing queue handling at multi-gigabit rates (GK, IP, AN, NZ), pp. 54–59.
DACDAC-2003-PaulBNPT #design #modelling #multi
Schedulers as model-based design elements in programmable heterogeneous multiprocessors (JMP, AB, JEN, JJP, DET), pp. 408–411.
DATEDATE-2003-BernardiRRV #approach #embedded
A P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories (PB, MR, MSR, MV), pp. 10720–10725.
DATEDATE-2003-KoorapatyCTPPS #architecture #logic
Heterogeneous Programmable Logic Block Architectures (AK, VC, KYT, CP, LTP, HS), pp. 11118–11119.
DATEDATE-2003-PanBKK #analysis #architecture #design
Design and Analysis of a Programmable Single-Chip Architecture for DVB-T Base-Band Receiver (CP, NB, AHK, AK), pp. 10468–10475.
PDPPDP-2003-GazzottiMZ #middleware #mobile #pervasive
A Programmable Event-based Middleware for Pervasive Mobile Agent Organizations (MG, MM, FZ), pp. 517–524.
PPoPPPPoPP-2003-KimPR #concurrent #interface #network
Exploiting task-level concurrency in a programmable network interface (HyK, VSP, SR), pp. 61–72.
DocEngDocEng-2002-FurutaN #community #documentation #semantics #web
Applying caT’s programmable browsing semantics to specify world-wide web documents that reflect place, time, reader, and community (RF, JCN), pp. 10–17.
HTHT-2002-FurutaN #semantics #web
Applying programmable browsing semantics within the context of the World-Wide Web (RF, JCN), pp. 23–24.
VLDBVLDB-2002-LaudBCSR #framework #prototype
The gRNA: A Highly Programmable Infrastructure for Prototyping, Developing and Deploying Genomics-Centric Applications (AVL, SSB, PC, DTS, GR), pp. 928–939.
DATEDATE-2002-CarmonaJDER #design
Bio-Inspired Analog VLSI Design Realizes Programmable Complex Spatio-Temporal Dynamics on a Single Chip (RCG, FJG, RDC, SEM, ÁRV), pp. 362–366.
ISMMISMM-2002-KumarL #memory management
Dynamic memory management for programmable devices (SK, KL), pp. 245–255.
PDPPDP-2002-KalteLVBR #configuration management
Dynamically Reconfigurable System-on-Programmable-Chip (HK, DL, EV, AB, UR), pp. 235–242.
PLDIPLDI-2001-KumarMYL #named
ESP: A Language for Programmable Devices (SK, YM, XY, KL), pp. 309–320.
DATEDATE-2001-LockCM #framework #platform #question
The programmable platform: does one size fit all? (AL, RC, HM), pp. 226–227.
HPCAHPCA-2001-ZillesS #profiling
A Programmable Co-Processor for Profiling (CBZ, GSS), pp. 241–252.
ASPLOSASPLOS-2000-NandaMSSSS #design #hardware #multi #named #realtime
MemorIES: A Programmable, Real-Time Hardware Emulation Tool for Multiprocessor Server Design (AKN, KKM, KS, RKS, VS, TBS), pp. 37–48.
DACDAC-2000-CongH #array #incremental
Depth optimal incremental mapping for field programmable gate arrays (JC, HH), pp. 290–293.
DATEDATE-2000-GanesanV #array
Technology Mapping and Retargeting for Field-Programmable Analog Arrays (SG, RV), pp. 58–64.
DATEDATE-2000-GuptaGMC #analysis #program transformation
Analysis of High-Level Address Code Transformations for Programmable Processors (SG, RKG, MM, FC), pp. 9–13.
AGTIVEAGTIVE-1999-BaresiP #analysis #graph grammar
A Formal Definition of Stuctured Analysis with Programmable Graph Grammars (LB, MP), pp. 193–208.
CHICHI-1999-KaminskyDELSS #named #tool support
SWEETPEA: Software Tools for Programmable Embodied Agents (MK, PD, WKE, AL, MS, IES), pp. 144–151.
TOOLSTOOLS-EUROPE-1999-CabriLRZ #architecture #coordination #design #implementation #mobile
Design and Implementation of a Programmable Coordination Architecture for Mobile Agents (GC, LL, GR, FZ), pp. 10–19.
CCCC-1999-BoekholdKCC #c
A Programmable ANSI C Transformation Engine (MB, IK, HC, AGMC), pp. 292–295.
DACDAC-1999-PeesHZM #architecture #modelling #named
LISA — Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures (SP, AH, VZ, HM), pp. 933–938.
DATEDATE-1999-ZarrinehU #architecture #memory management #on the
On Programmable Memory Built-In Self Test Architectures (KZ, SJU), pp. 708–713.
OSDIOSDI-1999-WangAP #file system
Virtual Log Based File Systems for a Programmable Disk (RYW, TEA, DAP), pp. 29–43.
HTHT-1998-Rosenberg #game studies
Locus Looks at the Turing Play: Hypertextuality vs. Full Programmability (JR), pp. 152–160.
DACDAC-1998-LeeKPM #architecture #multi
Media Architecture: General Purpose vs. Multiple Application-Specific Programmable Processor (CL, JK, MP, WHMS), pp. 321–326.
DACDAC-1998-WittenburgHKOBLKP #image #parallel #performance
Realization of a Programmable Parallel DSP for High Performance Image Processing Applications (JPW, WH, JK, MO, MB, HL, HK, PP), pp. 56–61.
DATEDATE-1998-CalvezHMP #generative #multi
A Programmable Multi-Language Generator for CoDesign (JPC, DH, FM, OP), pp. 927–928.
FMFME-1997-AndersonT #diagrams #programming language
Diagrams and Programming Languages for Programmable Controllers (SA, KT), pp. 1–19.
DACDAC-1997-KimKP #synthesis
Synthesis of Application Specific Programmable Processors (KK, RK, MP), pp. 353–358.
DATEEDTC-1997-ChakrabortyM #bound #functional #parallel #testing
A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs (KC, PM), pp. 330–334.
DATEEDTC-1997-FauraHKCAI #integration
A new field programmable system-on-a-chip for mixed signal integration (JF, CH, BK, JC, MAA, JMI), p. 610.
DATEEDTC-1997-SmeetsAEK #video
Delay management for programmable video signal processors (MLGS, EHLA, GE, EAdK), pp. 126–133.
DACDAC-1996-BrownMVCGGGLZS #design #experience #multi #scalability #tool support #using
Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools (SDB, NM, ZGV, SC, AG, RG, MG, KL, ZZ, SS), pp. 427–432.
DACDAC-1996-SrivastavaP #approach #implementation #linear #optimisation
Power Optimization in Programmable Processors and ASIC Implementations of Linear Systems: Transformation-based Approach (MBS, MP), pp. 343–348.
HPDCHPDC-1996-LazarL #multi #network
Programmability and Service Creation for Multimedia Networks (AAL, KSL), pp. 217–223.
LCTESLCT-RTS-1995-BonfattiGM #design #logic
Re-usable Software Design for Programmable Logic Controllers (FB, GG, PDM), pp. 31–40.
CHICHI-1994-EisenbergF94a #design #programming
Programmable design environments: integrating end-user programming with domain-oriented assistance (ME, GF), pp. 431–437.
DACDAC-1994-Casavant #design #named #pipes and filters
MIST — A Design Aid for Programmable Pipelined Processors (AEC), pp. 532–536.
DACDAC-1994-LanZG #multi
Placement and Routing for a Field Programmable Multi-Chip Module (SL, AZ, AEG), pp. 295–300.
DATEEDAC-1994-WuM #2d #array #performance
An Efficient Router for 2-D Field Programmable Gate Arrays (YLW, MMS), pp. 412–416.
PLDIPLDI-1993-WeiseC #metaprogramming #syntax
Programmable Syntax Macros (DW, RFC), pp. 156–165.
DACDAC-1993-ChanSZ #array #on the #predict
On Routability Prediction for Field-Programmable Gate Arrays (PKC, MDFS, JYZ), pp. 326–330.
DACDAC-1993-MurgaiBS #array #synthesis
Sequential Synthesis for Table Look Up Programmable Gate Arrays (RM, RKB, ALSV), pp. 224–229.
DACDAC-1992-SawkarT #array
Area and Delay Mapping for Table-Look-Up Based Field Programmable Gate Arrays (PS, DET), pp. 368–373.
DACDAC-1991-ErcolaniM #array
Technology Mapping for Electrically Programmable Gate Arrays (SE, GDM), pp. 234–239.
DACDAC-1991-Hill #array #design
A CAD System for the Design of Field Programmable Gate Arrays (DDH), pp. 187–192.
DACDAC-1991-Karplus #array #named
Xmap: A Technology Mapper for Table-Lookup Field-Programmable Gate Arrays (KK), pp. 240–243.
DACDAC-1991-Karplus91a #array #named
Amap: A Technology Mapper for Selector-Based Field-Programmable Gate Arrays (KK), pp. 244–247.
DACDAC-1990-FrancisRC #array #named
Chortle: A Technology Mapping Program for Lookup Table-Based Field Programmable Gate Arrays (RJF, JR, KC), pp. 613–619.
DACDAC-1990-MurgaiNSBS #array #logic #synthesis
Logic Synthesis for Programmable Gate Arrays (RM, YN, NVS, RKB, ALSV), pp. 620–625.
HTHT-1989-FurutaS #semantics
Programmable Browsing Semantics in Trellis (RF, PDS), pp. 27–42.
CHICHI-1989-YoungGS #design #evaluation #interface #modelling #predict
Programmable user models for predictive evaluation of interface designs (RMY, TRGG, TJS), pp. 15–19.
DACDAC-1989-GoreR #array #automation #equation #logic #synthesis #using
Automatic Synthesis of Boolean Equations Using Programmable Array Logic (RG, KR), pp. 283–289.
DACDAC-1989-LeeGHHBBG #design #named
GABRIEL: A Design Environment for Programmable DSPs (EAL, EG, HH, WHH, SSB, JCB, EG), pp. 141–146.
DACDAC-1988-Lewis #hardware #simulation
A Programmable Hardware Accelerator for Compiled Electrical Simulation (DML), pp. 172–177.
DACDAC-1987-LiuSU #array #design #logic #named #scalability #self
BIST-PLA: A Built-in Self-Test Design of Large Programmable Logic Arrays (CYL, KKS, SJU), pp. 385–391.
DACDAC-1987-Wey #array #design #logic #on the
On Yield Consideration for the Design of Redundant Programmable Logic Arrays (CLW), pp. 622–628.
DACDAC-1985-CollinsK #tutorial
The impact of technological advances on programmable controller s(tutorial session) (RPC, WJK), pp. 498–502.
DACDAC-1983-HuK #array #logic #reduction
Optimum reduction of programmable logic array (TCH, YSK), pp. 553–558.
DACDAC-1983-MicheliS #array #logic #multi #named
PLEASURE: a computer program for simple/multiple constrained/unconstrained folding of Programmable Logic Arrays (GDM, ALSV), pp. 530–537.
DACDAC-1982-BoseA #array #generative #logic #testing
Test generation for programmable logic arrays (PB, JAA), pp. 574–580.
DACDAC-1982-HachtelNS #array #logic
Techniques for programmable logic array folding (GDH, ARN, ALSV), pp. 147–155.
DACDAC-1974-BeugerSLL
A programmable configurator (FB, TS, LWL, AGL), pp. 177–185.
DACDAC-1974-SlemakerMLL
A programmable printed-wiring router (CSS, RCM, LWL, AGL), pp. 314–321.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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