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Collaborated with:
X.Tang Mahmut Taylan Kandemir M.Karaköy
Talks about:
parallel (2) level (2) memori (1) optim (1) cach (1)

Person: Meenakshi Arunachalam

DBLP DBLP: Arunachalam:Meenakshi

Contributed to:

PLDI 20192019

Wrote 1 papers:

PLDI-2019-TangKKA #parallel
Co-optimizing memory-level parallelism and cache-level parallelism (XT, MTK, MK, MA), pp. 935–949.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.