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Travelled to:
1 × Germany
Collaborated with:
J.Göppert Y.Manoli
Talks about:
threshold (1) circuit (1) model (1) digit (1) time (1) sub (1)

Person: Niklas Lotze

DBLP DBLP: Lotze:Niklas

Contributed to:

DATE 20102010

Wrote 1 papers:

DATE-2010-LotzeGM #modelling
Timing modeling for digital sub-threshold circuits (NL, JG, YM), pp. 299–302.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.