Travelled to:1 × Canada
1 × France
Collaborated with:B.Li Y.Shen U.Schlichtmann J.Hu C.Weidenbach D.Dimova A.Fietzke M.Suda P.Wischnewski
Talks about:version (1) circuit (1) integr (1) verif (1) spass (1) adapt (1) time (1)
Person: Rohit Kumar
DBLP: Kumar:Rohit
Contributed to:
2015
2009Wrote 2 papers:
- DATE-2015-KumarLSSH #adaptation #verification
- Timing verification for adaptive integrated circuits (RK, BL, YS, US, JH), pp. 1587–1590.
- CADE-2009-WeidenbachDFKSW
- SPASS Version 3.5 (CW, DD, AF, RK, MS, PW), pp. 140–145.